rtw89: update STA scheduler parameters for v1 chip
The v1 chip has additional setting of STA scheduler, so add it. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220325060055.58482-10-pkshih@realtek.com
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@ -1560,6 +1560,17 @@ static bool dle_is_txq_empty(struct rtw89_dev *rtwdev)
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return false;
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}
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static void _patch_ss2f_path(struct rtw89_dev *rtwdev)
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{
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const struct rtw89_chip_info *chip = rtwdev->chip;
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if (chip->chip_id == RTL8852A || chip->chip_id == RTL8852B)
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return;
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rtw89_write32_mask(rtwdev, R_AX_SS2FINFO_PATH, B_AX_SS_DEST_QUEUE_MASK,
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SS2F_PATH_WLCPU);
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}
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static int sta_sch_init(struct rtw89_dev *rtwdev)
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{
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u32 p_val;
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@ -1581,7 +1592,10 @@ static int sta_sch_init(struct rtw89_dev *rtwdev)
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return ret;
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}
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rtw89_write32_set(rtwdev, R_AX_SS_CTRL, B_AX_SS_WARM_INIT_FLG);
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rtw89_write32_set(rtwdev, R_AX_SS_CTRL, B_AX_SS_WARM_INIT_FLG |
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B_AX_SS_NONEMPTY_SS2FINFO_EN);
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_patch_ss2f_path(rtwdev);
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return 0;
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}
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@ -801,8 +801,17 @@
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#define R_AX_SS_CTRL 0x9E10
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#define B_AX_SS_INIT_DONE_1 BIT(31)
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#define B_AX_SS_WARM_INIT_FLG BIT(29)
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#define B_AX_SS_NONEMPTY_SS2FINFO_EN BIT(28)
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#define B_AX_SS_EN BIT(0)
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#define R_AX_SS2FINFO_PATH 0x9E50
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#define B_AX_SS_UL_REL BIT(31)
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#define B_AX_SS_REL_QUEUE_MASK GENMASK(29, 24)
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#define B_AX_SS_REL_PORT_MASK GENMASK(18, 16)
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#define B_AX_SS_DEST_QUEUE_MASK GENMASK(13, 8)
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#define SS2F_PATH_WLCPU 0x0A
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#define B_AX_SS_DEST_PORT_MASK GENMASK(2, 0)
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#define R_AX_SS_MACID_PAUSE_0 0x9EB0
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#define B_AX_SS_MACID31_0_PAUSE_SH 0
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#define B_AX_SS_MACID31_0_PAUSE_MASK GENMASK(31, 0)
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