MIPS: ingenic: DTS: Respect cell count of common properties

If N fields of X cells should be provided, then that's what the
devicetree should represent, instead of having one single field of
(N*X) cells.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This commit is contained in:
Paul Cercueil 2020-04-13 17:26:27 +02:00 committed by Thomas Bogendoerfer
parent 59bd128a41
commit cf2e6b8e6f
4 changed files with 30 additions and 36 deletions

View File

@ -55,10 +55,10 @@
#clock-cells = <1>;
clocks = <&cgu JZ4740_CLK_RTC
&cgu JZ4740_CLK_EXT
&cgu JZ4740_CLK_PCLK
&cgu JZ4740_CLK_TCU>;
clocks = <&cgu JZ4740_CLK_RTC>,
<&cgu JZ4740_CLK_EXT>,
<&cgu JZ4740_CLK_PCLK>,
<&cgu JZ4740_CLK_TCU>;
clock-names = "rtc", "ext", "pclk", "tcu";
interrupt-controller;
@ -241,10 +241,10 @@
reg = <0x13010000 0x54>;
#address-cells = <2>;
#size-cells = <1>;
ranges = <1 0 0x18000000 0x4000000
2 0 0x14000000 0x4000000
3 0 0x0c000000 0x4000000
4 0 0x08000000 0x4000000>;
ranges = <1 0 0x18000000 0x4000000>,
<2 0 0x14000000 0x4000000>,
<3 0 0x0c000000 0x4000000>,
<4 0 0x08000000 0x4000000>;
clocks = <&cgu JZ4740_CLK_MCLK>;
};
@ -258,8 +258,7 @@
dmac: dma-controller@13020000 {
compatible = "ingenic,jz4740-dma";
reg = <0x13020000 0xbc
0x13020300 0x14>;
reg = <0x13020000 0xbc>, <0x13020300 0x14>;
#dma-cells = <2>;
interrupt-parent = <&intc>;

View File

@ -55,9 +55,9 @@
#clock-cells = <1>;
clocks = <&cgu JZ4770_CLK_RTC
&cgu JZ4770_CLK_EXT
&cgu JZ4770_CLK_PCLK>;
clocks = <&cgu JZ4770_CLK_RTC>,
<&cgu JZ4770_CLK_EXT>,
<&cgu JZ4770_CLK_PCLK>;
clock-names = "rtc", "ext", "pclk";
interrupt-controller;
@ -219,8 +219,7 @@
dmac0: dma-controller@13420000 {
compatible = "ingenic,jz4770-dma";
reg = <0x13420000 0xC0
0x13420300 0x20>;
reg = <0x13420000 0xC0>, <0x13420300 0x20>;
#dma-cells = <2>;
@ -234,8 +233,7 @@
dmac1: dma-controller@13420100 {
compatible = "ingenic,jz4770-dma";
reg = <0x13420100 0xC0
0x13420400 0x20>;
reg = <0x13420100 0xC0>, <0x13420400 0x20>;
#dma-cells = <2>;

View File

@ -58,9 +58,9 @@
#clock-cells = <1>;
clocks = <&cgu JZ4780_CLK_RTCLK
&cgu JZ4780_CLK_EXCLK
&cgu JZ4780_CLK_PCLK>;
clocks = <&cgu JZ4780_CLK_RTCLK>,
<&cgu JZ4780_CLK_EXCLK>,
<&cgu JZ4780_CLK_PCLK>;
clock-names = "rtc", "ext", "pclk";
interrupt-controller;
@ -196,8 +196,7 @@
gpio-miso = <&gpe 14 0>;
gpio-sck = <&gpe 15 0>;
gpio-mosi = <&gpe 17 0>;
cs-gpios = <&gpe 16 0
&gpe 18 0>;
cs-gpios = <&gpe 16 0>, <&gpe 18 0>;
spidev@0 {
compatible = "spidev";
@ -362,13 +361,13 @@
reg = <0x13410000 0x10000>;
#address-cells = <2>;
#size-cells = <1>;
ranges = <0 0 0x13410000 0x10000
1 0 0x1b000000 0x1000000
2 0 0x1a000000 0x1000000
3 0 0x19000000 0x1000000
4 0 0x18000000 0x1000000
5 0 0x17000000 0x1000000
6 0 0x16000000 0x1000000>;
ranges = <0 0 0x13410000 0x10000>,
<1 0 0x1b000000 0x1000000>,
<2 0 0x1a000000 0x1000000>,
<3 0 0x19000000 0x1000000>,
<4 0 0x18000000 0x1000000>,
<5 0 0x17000000 0x1000000>,
<6 0 0x16000000 0x1000000>;
clocks = <&cgu JZ4780_CLK_NEMC>;
@ -391,8 +390,7 @@
dma: dma@13420000 {
compatible = "ingenic,jz4780-dma";
reg = <0x13420000 0x400
0x13421000 0x40>;
reg = <0x13420000 0x400>, <0x13421000 0x40>;
#dma-cells = <2>;
interrupt-parent = <&intc>;

View File

@ -58,9 +58,9 @@
#clock-cells = <1>;
clocks = <&cgu X1000_CLK_RTCLK
&cgu X1000_CLK_EXCLK
&cgu X1000_CLK_PCLK>;
clocks = <&cgu X1000_CLK_RTCLK>,
<&cgu X1000_CLK_EXCLK>,
<&cgu X1000_CLK_PCLK>;
clock-names = "rtc", "ext", "pclk";
interrupt-controller;
@ -239,8 +239,7 @@
pdma: dma-controller@13420000 {
compatible = "ingenic,x1000-dma";
reg = <0x13420000 0x400
0x13421000 0x40>;
reg = <0x13420000 0x400>, <0x13421000 0x40>;
#dma-cells = <2>;
interrupt-parent = <&intc>;