mt76: mt7915: fix endian issues
Multiple MCU messages were using u16/u32 fields without endian annotations or conversions Fixes:e57b790146
("mt76: add mac80211 driver for MT7915 PCIe-based chipsets") Fixes:5517f78b00
("mt76: mt7915: enable firmware module debug support") Signed-off-by: Felix Fietkau <nbd@nbd.name>
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@ -2824,7 +2824,7 @@ int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level)
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struct {
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u8 ver;
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u8 pad;
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u16 len;
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__le16 len;
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u8 level;
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u8 rsv[3];
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__le32 module_idx;
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@ -3073,12 +3073,12 @@ int mt7915_mcu_rdd_cmd(struct mt7915_dev *dev,
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int mt7915_mcu_set_fcc5_lpn(struct mt7915_dev *dev, int val)
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{
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struct {
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u32 tag;
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u16 min_lpn;
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__le32 tag;
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__le16 min_lpn;
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u8 rsv[2];
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} __packed req = {
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.tag = 0x1,
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.min_lpn = val,
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.tag = cpu_to_le32(0x1),
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.min_lpn = cpu_to_le16(val),
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};
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return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_SET_RDD_TH, &req,
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@ -3089,13 +3089,28 @@ int mt7915_mcu_set_pulse_th(struct mt7915_dev *dev,
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const struct mt7915_dfs_pulse *pulse)
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{
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struct {
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u32 tag;
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struct mt7915_dfs_pulse pulse;
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} __packed req = {
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.tag = 0x3,
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};
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__le32 tag;
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memcpy(&req.pulse, pulse, sizeof(*pulse));
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__le32 max_width; /* us */
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__le32 max_pwr; /* dbm */
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__le32 min_pwr; /* dbm */
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__le32 min_stgr_pri; /* us */
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__le32 max_stgr_pri; /* us */
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__le32 min_cr_pri; /* us */
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__le32 max_cr_pri; /* us */
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} __packed req = {
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.tag = cpu_to_le32(0x3),
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#define __req_field(field) .field = cpu_to_le32(pulse->field)
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__req_field(max_width),
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__req_field(max_pwr),
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__req_field(min_pwr),
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__req_field(min_stgr_pri),
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__req_field(max_stgr_pri),
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__req_field(min_cr_pri),
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__req_field(max_cr_pri),
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#undef __req_field
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};
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return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_SET_RDD_TH, &req,
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sizeof(req), true);
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@ -3105,15 +3120,49 @@ int mt7915_mcu_set_radar_th(struct mt7915_dev *dev, int index,
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const struct mt7915_dfs_pattern *pattern)
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{
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struct {
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u32 tag;
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u16 radar_type;
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struct mt7915_dfs_pattern pattern;
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} __packed req = {
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.tag = 0x2,
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.radar_type = index,
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};
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__le32 tag;
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__le16 radar_type;
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memcpy(&req.pattern, pattern, sizeof(*pattern));
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u8 enb;
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u8 stgr;
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u8 min_crpn;
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u8 max_crpn;
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u8 min_crpr;
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u8 min_pw;
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u32 min_pri;
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u32 max_pri;
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u8 max_pw;
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u8 min_crbn;
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u8 max_crbn;
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u8 min_stgpn;
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u8 max_stgpn;
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u8 min_stgpr;
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u8 rsv[2];
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u32 min_stgpr_diff;
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} __packed req = {
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.tag = cpu_to_le32(0x2),
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.radar_type = cpu_to_le16(index),
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#define __req_field_u8(field) .field = pattern->field
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#define __req_field_u32(field) .field = cpu_to_le32(pattern->field)
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__req_field_u8(enb),
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__req_field_u8(stgr),
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__req_field_u8(min_crpn),
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__req_field_u8(max_crpn),
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__req_field_u8(min_crpr),
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__req_field_u8(min_pw),
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__req_field_u32(min_pri),
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__req_field_u32(max_pri),
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__req_field_u8(max_pw),
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__req_field_u8(min_crbn),
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__req_field_u8(max_crbn),
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__req_field_u8(min_stgpn),
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__req_field_u8(max_stgpn),
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__req_field_u8(min_stgpr),
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__req_field_u32(min_stgpr_diff),
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#undef __req_field_u8
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#undef __req_field_u32
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};
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return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_SET_RDD_TH, &req,
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sizeof(req), true);
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@ -3389,12 +3438,12 @@ int mt7915_mcu_add_obss_spr(struct mt7915_dev *dev, struct ieee80211_vif *vif,
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u8 drop_tx_idx;
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u8 sta_idx; /* 256 sta */
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u8 rsv[2];
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u32 val;
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__le32 val;
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} __packed req = {
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.action = MT_SPR_ENABLE,
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.arg_num = 1,
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.band_idx = mvif->band_idx,
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.val = enable,
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.val = cpu_to_le32(enable),
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};
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return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_SET_SPR, &req,
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