drm/i915: Perform GGTT restore much earlier during resume
As soon as we re-enable the various functions within the HW, they may go off and read data via a GGTT offset. Hence, if we have not yet restored the GGTT PTE before then, they may read and even *write* random locations in memory. Detected by DMAR faults during resume. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: Martin Peres <martin.peres@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: stable@vger.kernel.org Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190909110011.8958-4-chris@chris-wilson.co.uk
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@ -242,9 +242,6 @@ void i915_gem_resume(struct drm_i915_private *i915)
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mutex_lock(&i915->drm.struct_mutex);
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intel_uncore_forcewake_get(&i915->uncore, FORCEWAKE_ALL);
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i915_gem_restore_gtt_mappings(i915);
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i915_gem_restore_fences(i915);
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if (i915_gem_init_hw(i915))
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goto err_wedged;
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@ -1914,6 +1914,11 @@ static int i915_drm_resume(struct drm_device *dev)
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if (ret)
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DRM_ERROR("failed to re-enable GGTT\n");
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mutex_lock(&dev_priv->drm.struct_mutex);
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i915_gem_restore_gtt_mappings(dev_priv);
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i915_gem_restore_fences(dev_priv);
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mutex_unlock(&dev_priv->drm.struct_mutex);
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intel_csr_ucode_resume(dev_priv);
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i915_restore_state(dev_priv);
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@ -118,6 +118,12 @@ static void pm_resume(struct drm_i915_private *i915)
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with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
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intel_gt_sanitize(&i915->gt, false);
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i915_gem_sanitize(i915);
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mutex_lock(&i915->drm.struct_mutex);
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i915_gem_restore_gtt_mappings(i915);
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i915_gem_restore_fences(i915);
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mutex_unlock(&i915->drm.struct_mutex);
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i915_gem_resume(i915);
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}
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}
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