amd-xgbe: Use the new DMA memory barriers where appropriate
Use the new lighter weight memory barriers when working with the device descriptors. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -1068,7 +1068,7 @@ static void xgbe_tx_desc_reset(struct xgbe_ring_data *rdata)
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rdesc->desc3 = 0;
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/* Make sure ownership is written to the descriptor */
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wmb();
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dma_wmb();
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}
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static void xgbe_tx_desc_init(struct xgbe_channel *channel)
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@ -1124,12 +1124,12 @@ static void xgbe_rx_desc_reset(struct xgbe_ring_data *rdata)
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* is written to the descriptor(s) before setting the OWN bit
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* for the descriptor
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*/
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wmb();
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dma_wmb();
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XGMAC_SET_BITS_LE(rdesc->desc3, RX_NORMAL_DESC3, OWN, 1);
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/* Make sure ownership is written to the descriptor */
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wmb();
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dma_wmb();
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}
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static void xgbe_rx_desc_init(struct xgbe_channel *channel)
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@ -1358,6 +1358,9 @@ static void xgbe_tx_start_xmit(struct xgbe_channel *channel,
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struct xgbe_prv_data *pdata = channel->pdata;
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struct xgbe_ring_data *rdata;
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/* Make sure everything is written before the register write */
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wmb();
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/* Issue a poll command to Tx DMA by writing address
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* of next immediate free descriptor */
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rdata = XGBE_GET_DESC_DATA(ring, ring->cur);
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@ -1565,7 +1568,7 @@ static void xgbe_dev_xmit(struct xgbe_channel *channel)
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* is written to the descriptor(s) before setting the OWN bit
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* for the first descriptor
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*/
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wmb();
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dma_wmb();
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/* Set OWN bit for the first descriptor */
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rdata = XGBE_GET_DESC_DATA(ring, start_index);
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@ -1577,7 +1580,7 @@ static void xgbe_dev_xmit(struct xgbe_channel *channel)
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#endif
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/* Make sure ownership is written to the descriptor */
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wmb();
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dma_wmb();
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ring->cur = cur_index + 1;
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if (!packet->skb->xmit_more ||
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@ -1613,7 +1616,7 @@ static int xgbe_dev_read(struct xgbe_channel *channel)
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return 1;
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/* Make sure descriptor fields are read after reading the OWN bit */
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rmb();
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dma_rmb();
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#ifdef XGMAC_ENABLE_RX_DESC_DUMP
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xgbe_dump_rx_desc(ring, rdesc, ring->cur);
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@ -1800,6 +1800,9 @@ static void xgbe_rx_refresh(struct xgbe_channel *channel)
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ring->dirty++;
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}
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/* Make sure everything is written before the register write */
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wmb();
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/* Update the Rx Tail Pointer Register with address of
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* the last cleaned entry */
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rdata = XGBE_GET_DESC_DATA(ring, ring->dirty - 1);
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@ -1863,7 +1866,7 @@ static int xgbe_tx_poll(struct xgbe_channel *channel)
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/* Make sure descriptor fields are read after reading the OWN
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* bit */
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rmb();
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dma_rmb();
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#ifdef XGMAC_ENABLE_TX_DESC_DUMP
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xgbe_dump_tx_desc(ring, ring->dirty, 1, 0);
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