V4L/DVB: cx23885, cx25840: Report IR max pulse width regardless of mod/demod use
Compute and report the maximum IR pulse measurment width, even if we are set to perform carrier modulation or demodulation and the number is fixed by the carrier freq. Signed-off-by: Andy Walls <awalls@md.metrocast.net> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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@ -771,12 +771,15 @@ static int cx23888_ir_rx_s_parameters(struct v4l2_subdev *sd,
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&p->carrier_range_upper);
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o->carrier_range_lower = p->carrier_range_lower;
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o->carrier_range_upper = p->carrier_range_upper;
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p->max_pulse_width =
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(u32) pulse_width_count_to_ns(FIFO_RXTX, rxclk_divider);
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} else {
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p->max_pulse_width =
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rxclk_rx_s_max_pulse_width(dev, p->max_pulse_width,
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&rxclk_divider);
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o->max_pulse_width = p->max_pulse_width;
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}
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o->max_pulse_width = p->max_pulse_width;
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atomic_set(&state->rxclk_divider, rxclk_divider);
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p->noise_filter_min_width =
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@ -889,12 +892,15 @@ static int cx23888_ir_tx_s_parameters(struct v4l2_subdev *sd,
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p->duty_cycle = cduty_tx_s_duty_cycle(dev, p->duty_cycle);
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o->duty_cycle = p->duty_cycle;
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p->max_pulse_width =
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(u32) pulse_width_count_to_ns(FIFO_RXTX, txclk_divider);
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} else {
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p->max_pulse_width =
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txclk_tx_s_max_pulse_width(dev, p->max_pulse_width,
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&txclk_divider);
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o->max_pulse_width = p->max_pulse_width;
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}
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o->max_pulse_width = p->max_pulse_width;
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atomic_set(&state->txclk_divider, txclk_divider);
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p->resolution = clock_divider_to_resolution(txclk_divider);
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@ -1000,12 +1006,10 @@ static int cx23888_ir_log_status(struct v4l2_subdev *sd)
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"-%1d/+%1d, %u to %u Hz\n", i, j,
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clock_divider_to_freq(rxclk, 16 + j),
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clock_divider_to_freq(rxclk, 16 - i));
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} else {
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v4l2_info(sd, "\tMax measurable pulse width: %u us, "
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"%llu ns\n",
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pulse_width_count_to_us(FIFO_RXTX, rxclk),
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pulse_width_count_to_ns(FIFO_RXTX, rxclk));
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}
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v4l2_info(sd, "\tMax measurable pulse width: %u us, %llu ns\n",
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pulse_width_count_to_us(FIFO_RXTX, rxclk),
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pulse_width_count_to_ns(FIFO_RXTX, rxclk));
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v4l2_info(sd, "\tLow pass filter: %s\n",
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filtr ? "enabled" : "disabled");
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if (filtr)
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@ -1047,12 +1051,10 @@ static int cx23888_ir_log_status(struct v4l2_subdev *sd)
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clock_divider_to_carrier_freq(txclk));
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v4l2_info(sd, "\tCarrier duty cycle: %2u/16\n",
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cduty + 1);
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} else {
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v4l2_info(sd, "\tMax pulse width: %u us, "
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"%llu ns\n",
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pulse_width_count_to_us(FIFO_RXTX, txclk),
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pulse_width_count_to_ns(FIFO_RXTX, txclk));
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}
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v4l2_info(sd, "\tMax pulse width: %u us, %llu ns\n",
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pulse_width_count_to_us(FIFO_RXTX, txclk),
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pulse_width_count_to_ns(FIFO_RXTX, txclk));
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v4l2_info(sd, "\tBusy: %s\n",
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stats & STATS_TBY ? "yes" : "no");
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v4l2_info(sd, "\tFIFO service requested: %s\n",
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@ -791,12 +791,15 @@ static int cx25840_ir_rx_s_parameters(struct v4l2_subdev *sd,
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&p->carrier_range_upper);
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o->carrier_range_lower = p->carrier_range_lower;
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o->carrier_range_upper = p->carrier_range_upper;
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p->max_pulse_width =
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(u32) pulse_width_count_to_ns(FIFO_RXTX, rxclk_divider);
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} else {
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p->max_pulse_width =
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rxclk_rx_s_max_pulse_width(c, p->max_pulse_width,
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&rxclk_divider);
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o->max_pulse_width = p->max_pulse_width;
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}
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o->max_pulse_width = p->max_pulse_width;
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atomic_set(&ir_state->rxclk_divider, rxclk_divider);
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p->noise_filter_min_width =
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@ -970,12 +973,15 @@ static int cx25840_ir_tx_s_parameters(struct v4l2_subdev *sd,
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p->duty_cycle = cduty_tx_s_duty_cycle(c, p->duty_cycle);
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o->duty_cycle = p->duty_cycle;
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p->max_pulse_width =
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(u32) pulse_width_count_to_ns(FIFO_RXTX, txclk_divider);
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} else {
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p->max_pulse_width =
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txclk_tx_s_max_pulse_width(c, p->max_pulse_width,
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&txclk_divider);
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o->max_pulse_width = p->max_pulse_width;
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}
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o->max_pulse_width = p->max_pulse_width;
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atomic_set(&ir_state->txclk_divider, txclk_divider);
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p->resolution = clock_divider_to_resolution(txclk_divider);
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@ -1094,12 +1100,10 @@ int cx25840_ir_log_status(struct v4l2_subdev *sd)
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"-%1d/+%1d, %u to %u Hz\n", i, j,
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clock_divider_to_freq(rxclk, 16 + j),
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clock_divider_to_freq(rxclk, 16 - i));
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} else {
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v4l2_info(sd, "\tMax measurable pulse width: %u us, "
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"%llu ns\n",
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pulse_width_count_to_us(FIFO_RXTX, rxclk),
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pulse_width_count_to_ns(FIFO_RXTX, rxclk));
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}
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v4l2_info(sd, "\tMax measurable pulse width: %u us, %llu ns\n",
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pulse_width_count_to_us(FIFO_RXTX, rxclk),
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pulse_width_count_to_ns(FIFO_RXTX, rxclk));
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v4l2_info(sd, "\tLow pass filter: %s\n",
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filtr ? "enabled" : "disabled");
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if (filtr)
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@ -1139,12 +1143,10 @@ int cx25840_ir_log_status(struct v4l2_subdev *sd)
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clock_divider_to_carrier_freq(txclk));
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v4l2_info(sd, "\tCarrier duty cycle: %2u/16\n",
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cduty + 1);
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} else {
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v4l2_info(sd, "\tMax pulse width: %u us, "
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"%llu ns\n",
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pulse_width_count_to_us(FIFO_RXTX, txclk),
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pulse_width_count_to_ns(FIFO_RXTX, txclk));
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}
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v4l2_info(sd, "\tMax pulse width: %u us, %llu ns\n",
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pulse_width_count_to_us(FIFO_RXTX, txclk),
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pulse_width_count_to_ns(FIFO_RXTX, txclk));
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v4l2_info(sd, "\tBusy: %s\n",
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stats & STATS_TBY ? "yes" : "no");
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v4l2_info(sd, "\tFIFO service requested: %s\n",
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