ARM: Add Versatile Express support
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King
parent
9bf5b2ef67
commit
ceade897f3
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@ -276,6 +276,20 @@ config ARCH_VERSATILE
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help
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This enables support for ARM Ltd Versatile board.
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config ARCH_VEXPRESS
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bool "ARM Ltd. Versatile Express family"
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select ARCH_WANT_OPTIONAL_GPIOLIB
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select ARM_AMBA
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select ARM_TIMER_SP804
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select COMMON_CLKDEV
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select GENERIC_CLOCKEVENTS
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select GENERIC_TIME
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select HAVE_CLK
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select ICST
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select PLAT_VERSATILE
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help
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This enables support for the ARM Ltd Versatile Express boards.
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config ARCH_AT91
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bool "Atmel AT91"
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select GENERIC_GPIO
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@ -926,6 +940,8 @@ source "arch/arm/mach-ux500/Kconfig"
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source "arch/arm/mach-versatile/Kconfig"
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source "arch/arm/mach-vexpress/Kconfig"
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source "arch/arm/mach-w90x900/Kconfig"
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# Definitions to make life easier
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@ -175,6 +175,7 @@ machine-$(CONFIG_ARCH_STMP37XX) := stmp37xx
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machine-$(CONFIG_ARCH_U300) := u300
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machine-$(CONFIG_ARCH_U8500) := ux500
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machine-$(CONFIG_ARCH_VERSATILE) := versatile
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machine-$(CONFIG_ARCH_VEXPRESS) := vexpress
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machine-$(CONFIG_ARCH_W90X900) := w90x900
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machine-$(CONFIG_ARCH_NUC93X) := nuc93x
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machine-$(CONFIG_FOOTBRIDGE) := footbridge
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@ -0,0 +1,4 @@
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menu "Versatile Express platform type"
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depends on ARCH_VEXPRESS
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endmenu
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@ -0,0 +1,5 @@
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#
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# Makefile for the linux kernel.
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#
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obj-y := v2m.o
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@ -0,0 +1,3 @@
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zreladdr-y := 0x60008000
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params_phys-y := 0x60000100
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initrd_phys-y := 0x60800000
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@ -0,0 +1,26 @@
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#define __MMIO_P2V(x) (((x) & 0xfffff) | (((x) & 0x0f000000) >> 4) | 0xf8000000)
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#define MMIO_P2V(x) ((void __iomem *)__MMIO_P2V(x))
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#define AMBA_DEVICE(name,busid,base,plat) \
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struct amba_device name##_device = { \
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.dev = { \
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.coherent_dma_mask = ~0UL, \
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.init_name = busid, \
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.platform_data = plat, \
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}, \
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.res = { \
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.start = base, \
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.end = base + SZ_4K - 1, \
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.flags = IORESOURCE_MEM, \
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}, \
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.dma_mask = ~0UL, \
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.irq = IRQ_##base, \
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/* .dma = DMA_##base,*/ \
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}
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struct map_desc;
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void v2m_map_io(struct map_desc *tile, size_t num);
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extern struct sys_timer v2m_timer;
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extern void __iomem *gic_cpu_base_addr;
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@ -0,0 +1,15 @@
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#ifndef __ASM_MACH_CLKDEV_H
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#define __ASM_MACH_CLKDEV_H
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#include <plat/clock.h>
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struct clk {
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const struct clk_ops *ops;
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unsigned long rate;
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const struct icst_params *params;
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};
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#define __clk_get(clk) ({ 1; })
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#define __clk_put(clk) do { } while (0)
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#endif
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@ -0,0 +1,23 @@
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/* arch/arm/mach-realview/include/mach/debug-macro.S
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*
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* Debugging macro include header
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*
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* Copyright (C) 1994-1999 Russell King
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* Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#define DEBUG_LL_UART_OFFSET 0x00009000
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.macro addruart,rx,tmp
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mrc p15, 0, \rx, c1, c0
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tst \rx, #1 @ MMU enabled?
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moveq \rx, #0x10000000
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movne \rx, #0xf8000000 @ virtual base
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orr \rx, \rx, #DEBUG_LL_UART_OFFSET
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.endm
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#include <asm/hardware/debug-pl01x.S>
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@ -0,0 +1,67 @@
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#include <asm/hardware/gic.h>
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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ldr \base, =gic_cpu_base_addr
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ldr \base, [\base]
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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/*
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* The interrupt numbering scheme is defined in the
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* interrupt controller spec. To wit:
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*
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* Interrupts 0-15 are IPI
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* 16-28 are reserved
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* 29-31 are local. We allow 30 to be used for the watchdog.
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* 32-1020 are global
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* 1021-1022 are reserved
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* 1023 is "spurious" (no interrupt)
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*
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* For now, we ignore all local interrupts so only return an interrupt if it's
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* between 30 and 1020. The test_for_ipi routine below will pick up on IPIs.
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*
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* A simple read from the controller will tell us the number of the highest
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* priority enabled interrupt. We then just need to check whether it is in the
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* valid range for an IRQ (30-1020 inclusive).
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*/
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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ldr \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */
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ldr \tmp, =1021
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bic \irqnr, \irqstat, #0x1c00
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cmp \irqnr, #29
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cmpcc \irqnr, \irqnr
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cmpne \irqnr, \tmp
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cmpcs \irqnr, \irqnr
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.endm
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/* We assume that irqstat (the raw value of the IRQ acknowledge
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* register) is preserved from the macro above.
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* If there is an IPI, we immediately signal end of interrupt on the
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* controller, since this requires the original irqstat value which
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* we won't easily be able to recreate later.
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*/
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.macro test_for_ipi, irqnr, irqstat, base, tmp
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bic \irqnr, \irqstat, #0x1c00
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cmp \irqnr, #16
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strcc \irqstat, [\base, #GIC_CPU_EOI]
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cmpcs \irqnr, \irqnr
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.endm
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/* As above, this assumes that irqstat and base are preserved.. */
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.macro test_for_ltirq, irqnr, irqstat, base, tmp
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bic \irqnr, \irqstat, #0x1c00
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mov \tmp, #0
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cmp \irqnr, #29
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moveq \tmp, #1
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streq \irqstat, [\base, #GIC_CPU_EOI]
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cmp \tmp, #0
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.endm
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@ -0,0 +1 @@
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/* empty */
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@ -0,0 +1,28 @@
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/*
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* arch/arm/mach-vexpress/include/mach/io.h
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*
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* Copyright (C) 2003 ARM Limited
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __ASM_ARM_ARCH_IO_H
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#define __ASM_ARM_ARCH_IO_H
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#define IO_SPACE_LIMIT 0xffffffff
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#define __io(a) __typesafe_io(a)
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#define __mem_pci(a) (a)
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#endif
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@ -0,0 +1,4 @@
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#define IRQ_LOCALTIMER 29
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#define IRQ_LOCALWDOG 30
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#define NR_IRQS 128
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@ -0,0 +1,25 @@
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/*
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* arch/arm/mach-vexpress/include/mach/memory.h
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*
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* Copyright (C) 2003 ARM Limited
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __ASM_ARCH_MEMORY_H
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#define __ASM_ARCH_MEMORY_H
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#define PHYS_OFFSET UL(0x60000000)
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#endif
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@ -0,0 +1,121 @@
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#ifndef __MACH_MOTHERBOARD_H
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#define __MACH_MOTHERBOARD_H
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/*
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* Physical addresses, offset from V2M_PA_CS0-3
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*/
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#define V2M_NOR0 (V2M_PA_CS0)
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#define V2M_NOR1 (V2M_PA_CS1)
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#define V2M_SRAM (V2M_PA_CS2)
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#define V2M_VIDEO_SRAM (V2M_PA_CS3 + 0x00000000)
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#define V2M_LAN9118 (V2M_PA_CS3 + 0x02000000)
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#define V2M_ISP1761 (V2M_PA_CS3 + 0x03000000)
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/*
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* Physical addresses, offset from V2M_PA_CS7
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*/
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#define V2M_SYSREGS (V2M_PA_CS7 + 0x00000000)
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#define V2M_SYSCTL (V2M_PA_CS7 + 0x00001000)
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#define V2M_SERIAL_BUS_PCI (V2M_PA_CS7 + 0x00002000)
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#define V2M_AACI (V2M_PA_CS7 + 0x00004000)
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#define V2M_MMCI (V2M_PA_CS7 + 0x00005000)
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#define V2M_KMI0 (V2M_PA_CS7 + 0x00006000)
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#define V2M_KMI1 (V2M_PA_CS7 + 0x00007000)
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#define V2M_UART0 (V2M_PA_CS7 + 0x00009000)
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#define V2M_UART1 (V2M_PA_CS7 + 0x0000a000)
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#define V2M_UART2 (V2M_PA_CS7 + 0x0000b000)
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#define V2M_UART3 (V2M_PA_CS7 + 0x0000c000)
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#define V2M_WDT (V2M_PA_CS7 + 0x0000f000)
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#define V2M_TIMER01 (V2M_PA_CS7 + 0x00011000)
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#define V2M_TIMER23 (V2M_PA_CS7 + 0x00012000)
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#define V2M_SERIAL_BUS_DVI (V2M_PA_CS7 + 0x00016000)
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#define V2M_RTC (V2M_PA_CS7 + 0x00017000)
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#define V2M_CF (V2M_PA_CS7 + 0x0001a000)
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#define V2M_CLCD (V2M_PA_CS7 + 0x0001f000)
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#define V2M_SYS_ID (V2M_SYSREGS + 0x000)
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#define V2M_SYS_SW (V2M_SYSREGS + 0x004)
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#define V2M_SYS_LED (V2M_SYSREGS + 0x008)
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#define V2M_SYS_100HZ (V2M_SYSREGS + 0x024)
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#define V2M_SYS_FLAGS (V2M_SYSREGS + 0x030)
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#define V2M_SYS_FLAGSSET (V2M_SYSREGS + 0x030)
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#define V2M_SYS_FLAGSCLR (V2M_SYSREGS + 0x034)
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#define V2M_SYS_NVFLAGS (V2M_SYSREGS + 0x038)
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#define V2M_SYS_NVFLAGSSET (V2M_SYSREGS + 0x038)
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#define V2M_SYS_NVFLAGSCLR (V2M_SYSREGS + 0x03c)
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#define V2M_SYS_MCI (V2M_SYSREGS + 0x048)
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#define V2M_SYS_FLASH (V2M_SYSREGS + 0x03c)
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#define V2M_SYS_CFGSW (V2M_SYSREGS + 0x058)
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#define V2M_SYS_24MHZ (V2M_SYSREGS + 0x05c)
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#define V2M_SYS_MISC (V2M_SYSREGS + 0x060)
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#define V2M_SYS_DMA (V2M_SYSREGS + 0x064)
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#define V2M_SYS_PROCID0 (V2M_SYSREGS + 0x084)
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#define V2M_SYS_PROCID1 (V2M_SYSREGS + 0x088)
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#define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0)
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#define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4)
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#define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8)
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#define V2M_TIMER0 (V2M_TIMER01 + 0x000)
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#define V2M_TIMER1 (V2M_TIMER01 + 0x020)
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#define V2M_TIMER2 (V2M_TIMER23 + 0x000)
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#define V2M_TIMER3 (V2M_TIMER23 + 0x020)
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/*
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* Interrupts. Those in {} are for AMBA devices
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*/
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#define IRQ_V2M_WDT { (32 + 0) }
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#define IRQ_V2M_TIMER0 (32 + 2)
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#define IRQ_V2M_TIMER1 (32 + 2)
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#define IRQ_V2M_TIMER2 (32 + 3)
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#define IRQ_V2M_TIMER3 (32 + 3)
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#define IRQ_V2M_RTC { (32 + 4) }
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#define IRQ_V2M_UART0 { (32 + 5) }
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#define IRQ_V2M_UART1 { (32 + 6) }
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#define IRQ_V2M_UART2 { (32 + 7) }
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#define IRQ_V2M_UART3 { (32 + 8) }
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#define IRQ_V2M_MMCI { (32 + 9), (32 + 10) }
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#define IRQ_V2M_AACI { (32 + 11) }
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#define IRQ_V2M_KMI0 { (32 + 12) }
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#define IRQ_V2M_KMI1 { (32 + 13) }
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#define IRQ_V2M_CLCD { (32 + 14) }
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#define IRQ_V2M_LAN9118 (32 + 15)
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#define IRQ_V2M_ISP1761 (32 + 16)
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#define IRQ_V2M_PCIE (32 + 17)
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/*
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* Configuration
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*/
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#define SYS_CFG_START (1 << 31)
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#define SYS_CFG_WRITE (1 << 30)
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#define SYS_CFG_OSC (1 << 20)
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#define SYS_CFG_VOLT (2 << 20)
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#define SYS_CFG_AMP (3 << 20)
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#define SYS_CFG_TEMP (4 << 20)
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#define SYS_CFG_RESET (5 << 20)
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#define SYS_CFG_SCC (6 << 20)
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#define SYS_CFG_MUXFPGA (7 << 20)
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#define SYS_CFG_SHUTDOWN (8 << 20)
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#define SYS_CFG_REBOOT (9 << 20)
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#define SYS_CFG_DVIMODE (11 << 20)
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#define SYS_CFG_POWER (12 << 20)
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#define SYS_CFG_SITE_MB (0 << 16)
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#define SYS_CFG_SITE_DB1 (1 << 16)
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#define SYS_CFG_SITE_DB2 (2 << 16)
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#define SYS_CFG_STACK(n) ((n) << 12)
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#define SYS_CFG_ERR (1 << 1)
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#define SYS_CFG_COMPLETE (1 << 0)
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int v2m_cfg_write(u32 devfn, u32 data);
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int v2m_cfg_read(u32 devfn, u32 *data);
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#endif
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@ -0,0 +1,37 @@
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/*
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* arch/arm/mach-vexpress/include/mach/system.h
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*
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* Copyright (C) 2003 ARM Limited
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* Copyright (C) 2000 Deep Blue Solutions Ltd
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
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* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __ASM_ARCH_SYSTEM_H
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#define __ASM_ARCH_SYSTEM_H
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static inline void arch_idle(void)
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{
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/*
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* This should do all the clock switching
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* and wait for interrupt tricks
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*/
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cpu_do_idle();
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}
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static inline void arch_reset(char mode, const char *cmd)
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{
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}
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#endif
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@ -0,0 +1,23 @@
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/*
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* arch/arm/mach-vexpress/include/mach/timex.h
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*
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* RealView architecture timex specifications
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*
|
||||
* Copyright (C) 2003 ARM Limited
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#define CLOCK_TICK_RATE (50000000 / 16)
|
||||
|
|
@ -0,0 +1,52 @@
|
|||
/*
|
||||
* arch/arm/mach-vexpress/include/mach/uncompress.h
|
||||
*
|
||||
* Copyright (C) 2003 ARM Limited
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
#define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00))
|
||||
#define AMBA_UART_LCRH(base) (*(volatile unsigned char *)((base) + 0x2c))
|
||||
#define AMBA_UART_CR(base) (*(volatile unsigned char *)((base) + 0x30))
|
||||
#define AMBA_UART_FR(base) (*(volatile unsigned char *)((base) + 0x18))
|
||||
|
||||
#define get_uart_base() (0x10000000 + 0x00009000)
|
||||
|
||||
/*
|
||||
* This does not append a newline
|
||||
*/
|
||||
static inline void putc(int c)
|
||||
{
|
||||
unsigned long base = get_uart_base();
|
||||
|
||||
while (AMBA_UART_FR(base) & (1 << 5))
|
||||
barrier();
|
||||
|
||||
AMBA_UART_DR(base) = c;
|
||||
}
|
||||
|
||||
static inline void flush(void)
|
||||
{
|
||||
unsigned long base = get_uart_base();
|
||||
|
||||
while (AMBA_UART_FR(base) & (1 << 3))
|
||||
barrier();
|
||||
}
|
||||
|
||||
/*
|
||||
* nothing to do
|
||||
*/
|
||||
#define arch_decomp_setup()
|
||||
#define arch_decomp_wdog()
|
||||
|
|
@ -0,0 +1,21 @@
|
|||
/*
|
||||
* arch/arm/mach-vexpress/include/mach/vmalloc.h
|
||||
*
|
||||
* Copyright (C) 2003 ARM Limited
|
||||
* Copyright (C) 2000 Russell King.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
#define VMALLOC_END 0xf8000000UL
|
||||
|
|
@ -0,0 +1,361 @@
|
|||
/*
|
||||
* Versatile Express V2M Motherboard Support
|
||||
*/
|
||||
#include <linux/device.h>
|
||||
#include <linux/amba/bus.h>
|
||||
#include <linux/amba/mmci.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/smsc911x.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/sysdev.h>
|
||||
#include <linux/usb/isp1760.h>
|
||||
|
||||
#include <asm/clkdev.h>
|
||||
#include <asm/sizes.h>
|
||||
#include <asm/mach/flash.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/time.h>
|
||||
#include <asm/hardware/arm_timer.h>
|
||||
|
||||
#include <mach/clkdev.h>
|
||||
#include <mach/motherboard.h>
|
||||
|
||||
#include <plat/timer-sp.h>
|
||||
|
||||
#include "core.h"
|
||||
|
||||
#define V2M_PA_CS0 0x40000000
|
||||
#define V2M_PA_CS1 0x44000000
|
||||
#define V2M_PA_CS2 0x48000000
|
||||
#define V2M_PA_CS3 0x4c000000
|
||||
#define V2M_PA_CS7 0x10000000
|
||||
|
||||
static struct map_desc v2m_io_desc[] __initdata = {
|
||||
{
|
||||
.virtual = __MMIO_P2V(V2M_PA_CS7),
|
||||
.pfn = __phys_to_pfn(V2M_PA_CS7),
|
||||
.length = SZ_128K,
|
||||
.type = MT_DEVICE,
|
||||
},
|
||||
};
|
||||
|
||||
void __init v2m_map_io(struct map_desc *tile, size_t num)
|
||||
{
|
||||
iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc));
|
||||
iotable_init(tile, num);
|
||||
}
|
||||
|
||||
|
||||
static void v2m_timer_init(void)
|
||||
{
|
||||
writel(0, MMIO_P2V(V2M_TIMER0) + TIMER_CTRL);
|
||||
writel(0, MMIO_P2V(V2M_TIMER1) + TIMER_CTRL);
|
||||
|
||||
sp804_clocksource_init(MMIO_P2V(V2M_TIMER1));
|
||||
sp804_clockevents_init(MMIO_P2V(V2M_TIMER0), IRQ_V2M_TIMER0);
|
||||
}
|
||||
|
||||
struct sys_timer v2m_timer = {
|
||||
.init = v2m_timer_init,
|
||||
};
|
||||
|
||||
|
||||
static DEFINE_SPINLOCK(v2m_cfg_lock);
|
||||
|
||||
int v2m_cfg_write(u32 devfn, u32 data)
|
||||
{
|
||||
/* Configuration interface broken? */
|
||||
u32 val;
|
||||
|
||||
printk("%s: writing %08x to %08x\n", __func__, data, devfn);
|
||||
|
||||
devfn |= SYS_CFG_START | SYS_CFG_WRITE;
|
||||
|
||||
spin_lock(&v2m_cfg_lock);
|
||||
val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
|
||||
writel(val & ~SYS_CFG_COMPLETE, MMIO_P2V(V2M_SYS_CFGSTAT));
|
||||
|
||||
writel(data, MMIO_P2V(V2M_SYS_CFGDATA));
|
||||
writel(devfn, MMIO_P2V(V2M_SYS_CFGCTRL));
|
||||
|
||||
do {
|
||||
val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
|
||||
} while (val == 0);
|
||||
spin_unlock(&v2m_cfg_lock);
|
||||
|
||||
return !!(val & SYS_CFG_ERR);
|
||||
}
|
||||
|
||||
int v2m_cfg_read(u32 devfn, u32 *data)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
devfn |= SYS_CFG_START;
|
||||
|
||||
spin_lock(&v2m_cfg_lock);
|
||||
writel(0, MMIO_P2V(V2M_SYS_CFGSTAT));
|
||||
writel(devfn, MMIO_P2V(V2M_SYS_CFGCTRL));
|
||||
|
||||
mb();
|
||||
|
||||
do {
|
||||
cpu_relax();
|
||||
val = readl(MMIO_P2V(V2M_SYS_CFGSTAT));
|
||||
} while (val == 0);
|
||||
|
||||
*data = readl(MMIO_P2V(V2M_SYS_CFGDATA));
|
||||
spin_unlock(&v2m_cfg_lock);
|
||||
|
||||
return !!(val & SYS_CFG_ERR);
|
||||
}
|
||||
|
||||
|
||||
static struct resource v2m_pcie_i2c_resource = {
|
||||
.start = V2M_SERIAL_BUS_PCI,
|
||||
.end = V2M_SERIAL_BUS_PCI + SZ_4K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device v2m_pcie_i2c_device = {
|
||||
.name = "versatile-i2c",
|
||||
.id = 0,
|
||||
.num_resources = 1,
|
||||
.resource = &v2m_pcie_i2c_resource,
|
||||
};
|
||||
|
||||
static struct resource v2m_ddc_i2c_resource = {
|
||||
.start = V2M_SERIAL_BUS_DVI,
|
||||
.end = V2M_SERIAL_BUS_DVI + SZ_4K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
static struct platform_device v2m_ddc_i2c_device = {
|
||||
.name = "versatile-i2c",
|
||||
.id = 1,
|
||||
.num_resources = 1,
|
||||
.resource = &v2m_ddc_i2c_resource,
|
||||
};
|
||||
|
||||
static struct resource v2m_eth_resources[] = {
|
||||
{
|
||||
.start = V2M_LAN9118,
|
||||
.end = V2M_LAN9118 + SZ_64K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
}, {
|
||||
.start = IRQ_V2M_LAN9118,
|
||||
.end = IRQ_V2M_LAN9118,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct smsc911x_platform_config v2m_eth_config = {
|
||||
.flags = SMSC911X_USE_32BIT,
|
||||
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
|
||||
.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
|
||||
.phy_interface = PHY_INTERFACE_MODE_MII,
|
||||
};
|
||||
|
||||
static struct platform_device v2m_eth_device = {
|
||||
.name = "smsc911x",
|
||||
.id = -1,
|
||||
.resource = v2m_eth_resources,
|
||||
.num_resources = ARRAY_SIZE(v2m_eth_resources),
|
||||
.dev.platform_data = &v2m_eth_config,
|
||||
};
|
||||
|
||||
static struct resource v2m_usb_resources[] = {
|
||||
{
|
||||
.start = V2M_ISP1761,
|
||||
.end = V2M_ISP1761 + SZ_128K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
}, {
|
||||
.start = IRQ_V2M_ISP1761,
|
||||
.end = IRQ_V2M_ISP1761,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct isp1760_platform_data v2m_usb_config = {
|
||||
.is_isp1761 = true,
|
||||
.bus_width_16 = false,
|
||||
.port1_otg = true,
|
||||
.analog_oc = false,
|
||||
.dack_polarity_high = false,
|
||||
.dreq_polarity_high = false,
|
||||
};
|
||||
|
||||
static struct platform_device v2m_usb_device = {
|
||||
.name = "isp1760",
|
||||
.id = -1,
|
||||
.resource = v2m_usb_resources,
|
||||
.num_resources = ARRAY_SIZE(v2m_usb_resources),
|
||||
.dev.platform_data = &v2m_usb_config,
|
||||
};
|
||||
|
||||
static int v2m_flash_init(void)
|
||||
{
|
||||
writel(0, MMIO_P2V(V2M_SYS_FLASH));
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void v2m_flash_exit(void)
|
||||
{
|
||||
writel(0, MMIO_P2V(V2M_SYS_FLASH));
|
||||
}
|
||||
|
||||
static void v2m_flash_set_vpp(int on)
|
||||
{
|
||||
writel(on != 0, MMIO_P2V(V2M_SYS_FLASH));
|
||||
}
|
||||
|
||||
static struct flash_platform_data v2m_flash_data = {
|
||||
.map_name = "cfi_probe",
|
||||
.width = 4,
|
||||
.init = v2m_flash_init,
|
||||
.exit = v2m_flash_exit,
|
||||
.set_vpp = v2m_flash_set_vpp,
|
||||
};
|
||||
|
||||
static struct resource v2m_flash_resources[] = {
|
||||
{
|
||||
.start = V2M_NOR0,
|
||||
.end = V2M_NOR0 + SZ_64M - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
}, {
|
||||
.start = V2M_NOR1,
|
||||
.end = V2M_NOR1 + SZ_64M - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device v2m_flash_device = {
|
||||
.name = "armflash",
|
||||
.id = -1,
|
||||
.resource = v2m_flash_resources,
|
||||
.num_resources = ARRAY_SIZE(v2m_flash_resources),
|
||||
.dev.platform_data = &v2m_flash_data,
|
||||
};
|
||||
|
||||
|
||||
static unsigned int v2m_mmci_status(struct device *dev)
|
||||
{
|
||||
return !(readl(MMIO_P2V(V2M_SYS_MCI)) & (1 << 0));
|
||||
}
|
||||
|
||||
static struct mmci_platform_data v2m_mmci_data = {
|
||||
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
|
||||
.status = v2m_mmci_status,
|
||||
};
|
||||
|
||||
static AMBA_DEVICE(aaci, "mb:aaci", V2M_AACI, NULL);
|
||||
static AMBA_DEVICE(mmci, "mb:mmci", V2M_MMCI, &v2m_mmci_data);
|
||||
static AMBA_DEVICE(kmi0, "mb:kmi0", V2M_KMI0, NULL);
|
||||
static AMBA_DEVICE(kmi1, "mb:kmi1", V2M_KMI1, NULL);
|
||||
static AMBA_DEVICE(uart0, "mb:uart0", V2M_UART0, NULL);
|
||||
static AMBA_DEVICE(uart1, "mb:uart1", V2M_UART1, NULL);
|
||||
static AMBA_DEVICE(uart2, "mb:uart2", V2M_UART2, NULL);
|
||||
static AMBA_DEVICE(uart3, "mb:uart3", V2M_UART3, NULL);
|
||||
static AMBA_DEVICE(wdt, "mb:wdt", V2M_WDT, NULL);
|
||||
static AMBA_DEVICE(rtc, "mb:rtc", V2M_RTC, NULL);
|
||||
|
||||
static struct amba_device *v2m_amba_devs[] __initdata = {
|
||||
&aaci_device,
|
||||
&mmci_device,
|
||||
&kmi0_device,
|
||||
&kmi1_device,
|
||||
&uart0_device,
|
||||
&uart1_device,
|
||||
&uart2_device,
|
||||
&uart3_device,
|
||||
&wdt_device,
|
||||
&rtc_device,
|
||||
};
|
||||
|
||||
|
||||
static long v2m_osc_round(struct clk *clk, unsigned long rate)
|
||||
{
|
||||
return rate;
|
||||
}
|
||||
|
||||
static int v2m_osc1_set(struct clk *clk, unsigned long rate)
|
||||
{
|
||||
return v2m_cfg_write(SYS_CFG_OSC | SYS_CFG_SITE_MB | 1, rate);
|
||||
}
|
||||
|
||||
static const struct clk_ops osc1_clk_ops = {
|
||||
.round = v2m_osc_round,
|
||||
.set = v2m_osc1_set,
|
||||
};
|
||||
|
||||
static struct clk osc1_clk = {
|
||||
.ops = &osc1_clk_ops,
|
||||
.rate = 24000000,
|
||||
};
|
||||
|
||||
static struct clk osc2_clk = {
|
||||
.rate = 24000000,
|
||||
};
|
||||
|
||||
static struct clk_lookup v2m_lookups[] = {
|
||||
{ /* UART0 */
|
||||
.dev_id = "mb:uart0",
|
||||
.clk = &osc2_clk,
|
||||
}, { /* UART1 */
|
||||
.dev_id = "mb:uart1",
|
||||
.clk = &osc2_clk,
|
||||
}, { /* UART2 */
|
||||
.dev_id = "mb:uart2",
|
||||
.clk = &osc2_clk,
|
||||
}, { /* UART3 */
|
||||
.dev_id = "mb:uart3",
|
||||
.clk = &osc2_clk,
|
||||
}, { /* KMI0 */
|
||||
.dev_id = "mb:kmi0",
|
||||
.clk = &osc2_clk,
|
||||
}, { /* KMI1 */
|
||||
.dev_id = "mb:kmi1",
|
||||
.clk = &osc2_clk,
|
||||
}, { /* MMC0 */
|
||||
.dev_id = "mb:mmci",
|
||||
.clk = &osc2_clk,
|
||||
}, { /* CLCD */
|
||||
.dev_id = "mb:clcd",
|
||||
.clk = &osc1_clk,
|
||||
},
|
||||
};
|
||||
|
||||
static void v2m_power_off(void)
|
||||
{
|
||||
if (v2m_cfg_write(SYS_CFG_SHUTDOWN | SYS_CFG_SITE_MB, 0))
|
||||
printk(KERN_EMERG "Unable to shutdown\n");
|
||||
}
|
||||
|
||||
static void v2m_restart(char str, const char *cmd)
|
||||
{
|
||||
if (v2m_cfg_write(SYS_CFG_REBOOT | SYS_CFG_SITE_MB, 0))
|
||||
printk(KERN_EMERG "Unable to reboot\n");
|
||||
}
|
||||
|
||||
static int __init v2m_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
clkdev_add_table(v2m_lookups, ARRAY_SIZE(v2m_lookups));
|
||||
|
||||
platform_device_register(&v2m_pcie_i2c_device);
|
||||
platform_device_register(&v2m_ddc_i2c_device);
|
||||
platform_device_register(&v2m_flash_device);
|
||||
platform_device_register(&v2m_eth_device);
|
||||
platform_device_register(&v2m_usb_device);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(v2m_amba_devs); i++)
|
||||
amba_device_register(v2m_amba_devs[i], &iomem_resource);
|
||||
|
||||
pm_power_off = v2m_power_off;
|
||||
arm_pm_restart = v2m_restart;
|
||||
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(v2m_init);
|
||||
|
|
@ -564,7 +564,7 @@ config I2C_STU300
|
|||
|
||||
config I2C_VERSATILE
|
||||
tristate "ARM Versatile/Realview I2C bus support"
|
||||
depends on ARCH_VERSATILE || ARCH_REALVIEW
|
||||
depends on ARCH_VERSATILE || ARCH_REALVIEW || ARCH_VEXPRESS
|
||||
select I2C_ALGOBIT
|
||||
help
|
||||
Say yes if you want to support the I2C serial bus on ARMs Versatile
|
||||
|
|
|
|||
Loading…
Reference in New Issue