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pinctrl: renesas: r8a779[56]x: Add MediaLB pins 

This adds pins, groups, and functions for MediaLB devices on Renesas
R-Car H3 and M3-W/N SoCs.

Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: LUU HOAI <hoai.luu.ub@renesas.com>
Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Link: https://lore.kernel.org/r/20211007200250.20661-1-nikita.yoush@cogentembedded.com
[geert: Fix automotive handling]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Andrey Gusakov 2021-10-07 23:02:50 +03:00 committed by Geert Uytterhoeven
parent fcfb63148c
commit ce34fb3cb4
4 changed files with 74 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
drivers/pinctrl/renesas/pfc-r8a77950.c
View File

@ -2369,6 +2369,14 @@ static const unsigned int intc_ex_irq5_mux[] = {
IRQ5_MARK,
};
/* - MLB+ ------------------------------------------------------------------- */
static const unsigned int mlb_3pin_pins[] = {
RCAR_GP_PIN(5, 23), RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25),
};
static const unsigned int mlb_3pin_mux[] = {
MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK,
};
/* - MSIOF0 ----------------------------------------------------------------- */
static const unsigned int msiof0_clk_pins[] = {
/* SCK */
@ -3987,6 +3995,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(intc_ex_irq3),
SH_PFC_PIN_GROUP(intc_ex_irq4),
SH_PFC_PIN_GROUP(intc_ex_irq5),
SH_PFC_PIN_GROUP(mlb_3pin),
SH_PFC_PIN_GROUP(msiof0_clk),
SH_PFC_PIN_GROUP(msiof0_sync),
SH_PFC_PIN_GROUP(msiof0_ss1),
@ -4380,6 +4389,10 @@ static const char * const intc_ex_groups[] = {
"intc_ex_irq5",
};
static const char * const mlb_3pin_groups[] = {
"mlb_3pin",
};
static const char * const msiof0_groups[] = {
"msiof0_clk",
"msiof0_sync",
@ -4709,6 +4722,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(i2c5),
SH_PFC_FUNCTION(i2c6),
SH_PFC_FUNCTION(intc_ex),
SH_PFC_FUNCTION(mlb_3pin),
SH_PFC_FUNCTION(msiof0),
SH_PFC_FUNCTION(msiof1),
SH_PFC_FUNCTION(msiof2),

22
drivers/pinctrl/renesas/pfc-r8a77951.c
View File

@ -2453,6 +2453,16 @@ static const unsigned int intc_ex_irq5_mux[] = {
IRQ5_MARK,
};
#ifdef CONFIG_PINCTRL_PFC_R8A77951
/* - MLB+ ------------------------------------------------------------------- */
static const unsigned int mlb_3pin_pins[] = {
RCAR_GP_PIN(5, 23), RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25),
};
static const unsigned int mlb_3pin_mux[] = {
MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK,
};
#endif /* CONFIG_PINCTRL_PFC_R8A77951 */
/* - MSIOF0 ----------------------------------------------------------------- */
static const unsigned int msiof0_clk_pins[] = {
/* SCK */
@ -4235,7 +4245,7 @@ static const unsigned int vin5_clk_mux[] = {
static const struct {
struct sh_pfc_pin_group common[328];
#ifdef CONFIG_PINCTRL_PFC_R8A77951
struct sh_pfc_pin_group automotive[30];
struct sh_pfc_pin_group automotive[31];
#endif
} pinmux_groups = {
.common = {
@ -4600,6 +4610,7 @@ static const struct {
SH_PFC_PIN_GROUP(drif3_ctrl_b),
SH_PFC_PIN_GROUP(drif3_data0_b),
SH_PFC_PIN_GROUP(drif3_data1_b),
SH_PFC_PIN_GROUP(mlb_3pin),
}
#endif /* CONFIG_PINCTRL_PFC_R8A77951 */
};
@ -4795,6 +4806,12 @@ static const char * const intc_ex_groups[] = {
"intc_ex_irq5",
};
#ifdef CONFIG_PINCTRL_PFC_R8A77951
static const char * const mlb_3pin_groups[] = {
"mlb_3pin",
};
#endif /* CONFIG_PINCTRL_PFC_R8A77951 */
static const char * const msiof0_groups[] = {
"msiof0_clk",
"msiof0_sync",
@ -5144,7 +5161,7 @@ static const char * const vin5_groups[] = {
static const struct {
struct sh_pfc_function common[55];
#ifdef CONFIG_PINCTRL_PFC_R8A77951
struct sh_pfc_function automotive[4];
struct sh_pfc_function automotive[5];
#endif
} pinmux_functions = {
.common = {
@ -5210,6 +5227,7 @@ static const struct {
SH_PFC_FUNCTION(drif1),
SH_PFC_FUNCTION(drif2),
SH_PFC_FUNCTION(drif3),
SH_PFC_FUNCTION(mlb_3pin),
}
#endif /* CONFIG_PINCTRL_PFC_R8A77951 */
};

22
drivers/pinctrl/renesas/pfc-r8a7796.c
View File

@ -2458,6 +2458,16 @@ static const unsigned int intc_ex_irq5_mux[] = {
IRQ5_MARK,
};
#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)
/* - MLB+ ------------------------------------------------------------------- */
static const unsigned int mlb_3pin_pins[] = {
RCAR_GP_PIN(5, 23), RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25),
};
static const unsigned int mlb_3pin_mux[] = {
MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK,
};
#endif /* CONFIG_PINCTRL_PFC_R8A77960 || CONFIG_PINCTRL_PFC_R8A77961 */
/* - MSIOF0 ----------------------------------------------------------------- */
static const unsigned int msiof0_clk_pins[] = {
/* SCK */
@ -4210,7 +4220,7 @@ static const unsigned int vin5_clk_mux[] = {
static const struct {
struct sh_pfc_pin_group common[324];
#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)
struct sh_pfc_pin_group automotive[30];
struct sh_pfc_pin_group automotive[31];
#endif
} pinmux_groups = {
.common = {
@ -4571,6 +4581,7 @@ static const struct {
SH_PFC_PIN_GROUP(drif3_ctrl_b),
SH_PFC_PIN_GROUP(drif3_data0_b),
SH_PFC_PIN_GROUP(drif3_data1_b),
SH_PFC_PIN_GROUP(mlb_3pin),
}
#endif /* CONFIG_PINCTRL_PFC_R8A77960 || CONFIG_PINCTRL_PFC_R8A77961 */
};
@ -4766,6 +4777,12 @@ static const char * const intc_ex_groups[] = {
"intc_ex_irq5",
};
#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)
static const char * const mlb_3pin_groups[] = {
"mlb_3pin",
};
#endif /* CONFIG_PINCTRL_PFC_R8A77960 || CONFIG_PINCTRL_PFC_R8A77961 */
static const char * const msiof0_groups[] = {
"msiof0_clk",
"msiof0_sync",
@ -5102,7 +5119,7 @@ static const char * const vin5_groups[] = {
static const struct {
struct sh_pfc_function common[52];
#if defined(CONFIG_PINCTRL_PFC_R8A77960) || defined(CONFIG_PINCTRL_PFC_R8A77961)
struct sh_pfc_function automotive[4];
struct sh_pfc_function automotive[5];
#endif
} pinmux_functions = {
.common = {
@ -5165,6 +5182,7 @@ static const struct {
SH_PFC_FUNCTION(drif1),
SH_PFC_FUNCTION(drif2),
SH_PFC_FUNCTION(drif3),
SH_PFC_FUNCTION(mlb_3pin),
}
#endif /* CONFIG_PINCTRL_PFC_R8A77960 || CONFIG_PINCTRL_PFC_R8A77961 */
};

22
drivers/pinctrl/renesas/pfc-r8a77965.c
View File

@ -2609,6 +2609,16 @@ static const unsigned int intc_ex_irq5_mux[] = {
IRQ5_MARK,
};
#ifdef CONFIG_PINCTRL_PFC_R8A77965
/* - MLB+ ------------------------------------------------------------------- */
static const unsigned int mlb_3pin_pins[] = {
RCAR_GP_PIN(5, 23), RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 25),
};
static const unsigned int mlb_3pin_mux[] = {
MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK,
};
#endif /* CONFIG_PINCTRL_PFC_R8A77965 */
/* - MSIOF0 ----------------------------------------------------------------- */
static const unsigned int msiof0_clk_pins[] = {
/* SCK */
@ -4460,7 +4470,7 @@ static const unsigned int vin5_clk_mux[] = {
static const struct {
struct sh_pfc_pin_group common[326];
#ifdef CONFIG_PINCTRL_PFC_R8A77965
struct sh_pfc_pin_group automotive[30];
struct sh_pfc_pin_group automotive[31];
#endif
} pinmux_groups = {
.common = {
@ -4823,6 +4833,7 @@ static const struct {
SH_PFC_PIN_GROUP(drif3_ctrl_b),
SH_PFC_PIN_GROUP(drif3_data0_b),
SH_PFC_PIN_GROUP(drif3_data1_b),
SH_PFC_PIN_GROUP(mlb_3pin),
}
#endif /* CONFIG_PINCTRL_PFC_R8A77965 */
};
@ -5018,6 +5029,12 @@ static const char * const intc_ex_groups[] = {
"intc_ex_irq5",
};
#ifdef CONFIG_PINCTRL_PFC_R8A77965
static const char * const mlb_3pin_groups[] = {
"mlb_3pin",
};
#endif /* CONFIG_PINCTRL_PFC_R8A77965 */
static const char * const msiof0_groups[] = {
"msiof0_clk",
"msiof0_sync",
@ -5358,7 +5375,7 @@ static const char * const vin5_groups[] = {
static const struct {
struct sh_pfc_function common[53];
#ifdef CONFIG_PINCTRL_PFC_R8A77965
struct sh_pfc_function automotive[4];
struct sh_pfc_function automotive[5];
#endif
} pinmux_functions = {
.common = {
@ -5422,6 +5439,7 @@ static const struct {
SH_PFC_FUNCTION(drif1),
SH_PFC_FUNCTION(drif2),
SH_PFC_FUNCTION(drif3),
SH_PFC_FUNCTION(mlb_3pin),
}
#endif /* CONFIG_PINCTRL_PFC_R8A77965 */
};