iommu/arm-smmu-v3: Maintain a SID->device structure
When handling faults from the event or PRI queue, we need to find the struct device associated with a SID. Add a rb_tree to keep track of SIDs. Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Keqian Zhu <zhukeqian1@huawei.com> Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Acked-by: Will Deacon <will@kernel.org> Link: https://lore.kernel.org/r/20210401154718.307519-8-jean-philippe@linaro.org Signed-off-by: Joerg Roedel <jroedel@suse.de>
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@ -909,8 +909,8 @@ static void arm_smmu_sync_cd(struct arm_smmu_domain *smmu_domain,
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spin_lock_irqsave(&smmu_domain->devices_lock, flags);
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list_for_each_entry(master, &smmu_domain->devices, domain_head) {
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for (i = 0; i < master->num_sids; i++) {
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cmd.cfgi.sid = master->sids[i];
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for (i = 0; i < master->num_streams; i++) {
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cmd.cfgi.sid = master->streams[i].id;
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arm_smmu_cmdq_batch_add(smmu, &cmds, &cmd);
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}
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}
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@ -1355,6 +1355,29 @@ static int arm_smmu_init_l2_strtab(struct arm_smmu_device *smmu, u32 sid)
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return 0;
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}
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__maybe_unused
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static struct arm_smmu_master *
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arm_smmu_find_master(struct arm_smmu_device *smmu, u32 sid)
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{
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struct rb_node *node;
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struct arm_smmu_stream *stream;
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lockdep_assert_held(&smmu->streams_mutex);
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node = smmu->streams.rb_node;
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while (node) {
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stream = rb_entry(node, struct arm_smmu_stream, node);
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if (stream->id < sid)
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node = node->rb_right;
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else if (stream->id > sid)
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node = node->rb_left;
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else
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return stream->master;
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}
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return NULL;
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}
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/* IRQ and event handlers */
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static irqreturn_t arm_smmu_evtq_thread(int irq, void *dev)
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{
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@ -1588,8 +1611,8 @@ static int arm_smmu_atc_inv_master(struct arm_smmu_master *master)
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arm_smmu_atc_inv_to_cmd(0, 0, 0, &cmd);
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for (i = 0; i < master->num_sids; i++) {
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cmd.atc.sid = master->sids[i];
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for (i = 0; i < master->num_streams; i++) {
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cmd.atc.sid = master->streams[i].id;
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arm_smmu_cmdq_issue_cmd(master->smmu, &cmd);
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}
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@ -1632,8 +1655,8 @@ int arm_smmu_atc_inv_domain(struct arm_smmu_domain *smmu_domain, int ssid,
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if (!master->ats_enabled)
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continue;
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for (i = 0; i < master->num_sids; i++) {
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cmd.atc.sid = master->sids[i];
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for (i = 0; i < master->num_streams; i++) {
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cmd.atc.sid = master->streams[i].id;
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arm_smmu_cmdq_batch_add(smmu_domain->smmu, &cmds, &cmd);
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}
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}
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@ -2065,13 +2088,13 @@ static void arm_smmu_install_ste_for_dev(struct arm_smmu_master *master)
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int i, j;
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struct arm_smmu_device *smmu = master->smmu;
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for (i = 0; i < master->num_sids; ++i) {
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u32 sid = master->sids[i];
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for (i = 0; i < master->num_streams; ++i) {
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u32 sid = master->streams[i].id;
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__le64 *step = arm_smmu_get_step_for_sid(smmu, sid);
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/* Bridged PCI devices may end up with duplicated IDs */
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for (j = 0; j < i; j++)
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if (master->sids[j] == sid)
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if (master->streams[j].id == sid)
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break;
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if (j < i)
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continue;
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@ -2345,11 +2368,101 @@ static bool arm_smmu_sid_in_range(struct arm_smmu_device *smmu, u32 sid)
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return sid < limit;
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}
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static int arm_smmu_insert_master(struct arm_smmu_device *smmu,
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struct arm_smmu_master *master)
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{
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int i;
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int ret = 0;
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struct arm_smmu_stream *new_stream, *cur_stream;
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struct rb_node **new_node, *parent_node = NULL;
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struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(master->dev);
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master->streams = kcalloc(fwspec->num_ids, sizeof(*master->streams),
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GFP_KERNEL);
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if (!master->streams)
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return -ENOMEM;
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master->num_streams = fwspec->num_ids;
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mutex_lock(&smmu->streams_mutex);
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for (i = 0; i < fwspec->num_ids; i++) {
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u32 sid = fwspec->ids[i];
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new_stream = &master->streams[i];
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new_stream->id = sid;
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new_stream->master = master;
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/*
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* Check the SIDs are in range of the SMMU and our stream table
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*/
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if (!arm_smmu_sid_in_range(smmu, sid)) {
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ret = -ERANGE;
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break;
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}
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/* Ensure l2 strtab is initialised */
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if (smmu->features & ARM_SMMU_FEAT_2_LVL_STRTAB) {
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ret = arm_smmu_init_l2_strtab(smmu, sid);
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if (ret)
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break;
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}
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/* Insert into SID tree */
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new_node = &(smmu->streams.rb_node);
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while (*new_node) {
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cur_stream = rb_entry(*new_node, struct arm_smmu_stream,
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node);
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parent_node = *new_node;
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if (cur_stream->id > new_stream->id) {
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new_node = &((*new_node)->rb_left);
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} else if (cur_stream->id < new_stream->id) {
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new_node = &((*new_node)->rb_right);
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} else {
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dev_warn(master->dev,
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"stream %u already in tree\n",
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cur_stream->id);
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ret = -EINVAL;
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break;
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}
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}
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if (ret)
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break;
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rb_link_node(&new_stream->node, parent_node, new_node);
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rb_insert_color(&new_stream->node, &smmu->streams);
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}
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if (ret) {
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for (i--; i >= 0; i--)
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rb_erase(&master->streams[i].node, &smmu->streams);
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kfree(master->streams);
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}
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mutex_unlock(&smmu->streams_mutex);
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return ret;
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}
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static void arm_smmu_remove_master(struct arm_smmu_master *master)
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{
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int i;
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struct arm_smmu_device *smmu = master->smmu;
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struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(master->dev);
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if (!smmu || !master->streams)
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return;
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mutex_lock(&smmu->streams_mutex);
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for (i = 0; i < fwspec->num_ids; i++)
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rb_erase(&master->streams[i].node, &smmu->streams);
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mutex_unlock(&smmu->streams_mutex);
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kfree(master->streams);
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}
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static struct iommu_ops arm_smmu_ops;
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static struct iommu_device *arm_smmu_probe_device(struct device *dev)
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{
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int i, ret;
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int ret;
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struct arm_smmu_device *smmu;
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struct arm_smmu_master *master;
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struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
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@ -2370,27 +2483,12 @@ static struct iommu_device *arm_smmu_probe_device(struct device *dev)
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master->dev = dev;
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master->smmu = smmu;
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master->sids = fwspec->ids;
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master->num_sids = fwspec->num_ids;
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INIT_LIST_HEAD(&master->bonds);
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dev_iommu_priv_set(dev, master);
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/* Check the SIDs are in range of the SMMU and our stream table */
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for (i = 0; i < master->num_sids; i++) {
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u32 sid = master->sids[i];
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if (!arm_smmu_sid_in_range(smmu, sid)) {
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ret = -ERANGE;
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goto err_free_master;
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}
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/* Ensure l2 strtab is initialised */
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if (smmu->features & ARM_SMMU_FEAT_2_LVL_STRTAB) {
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ret = arm_smmu_init_l2_strtab(smmu, sid);
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if (ret)
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goto err_free_master;
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}
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}
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ret = arm_smmu_insert_master(smmu, master);
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if (ret)
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goto err_free_master;
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device_property_read_u32(dev, "pasid-num-bits", &master->ssid_bits);
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master->ssid_bits = min(smmu->ssid_bits, master->ssid_bits);
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@ -2429,6 +2527,7 @@ static void arm_smmu_release_device(struct device *dev)
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WARN_ON(arm_smmu_master_sva_enabled(master));
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arm_smmu_detach_dev(master);
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arm_smmu_disable_pasid(master);
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arm_smmu_remove_master(master);
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kfree(master);
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iommu_fwspec_free(dev);
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}
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@ -2852,6 +2951,9 @@ static int arm_smmu_init_structures(struct arm_smmu_device *smmu)
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{
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int ret;
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mutex_init(&smmu->streams_mutex);
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smmu->streams = RB_ROOT;
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ret = arm_smmu_init_queues(smmu);
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if (ret)
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return ret;
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@ -639,6 +639,15 @@ struct arm_smmu_device {
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/* IOMMU core code handle */
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struct iommu_device iommu;
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struct rb_root streams;
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struct mutex streams_mutex;
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};
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struct arm_smmu_stream {
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u32 id;
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struct arm_smmu_master *master;
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struct rb_node node;
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};
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/* SMMU private data for each master */
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@ -647,8 +656,8 @@ struct arm_smmu_master {
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struct device *dev;
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struct arm_smmu_domain *domain;
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struct list_head domain_head;
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u32 *sids;
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unsigned int num_sids;
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struct arm_smmu_stream *streams;
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unsigned int num_streams;
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bool ats_enabled;
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bool sva_enabled;
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struct list_head bonds;
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