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drm/amd/include:cleanup vega10 gc header files. 

Cleanup asic_reg/vega10/GC folder.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Feifei Xu 2017-11-24 10:29:00 +08:00 committed by Alex Deucher
parent 18297a215b
commit cde5c34f63
10 changed files with 14 additions and 14 deletions
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4
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
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@ -29,8 +29,8 @@
#include "soc15d.h"
#include "vega10/soc15ip.h"
#include "vega10/GC/gc_9_0_offset.h"
#include "vega10/GC/gc_9_0_sh_mask.h"
#include "gc/gc_9_0_offset.h"
#include "gc/gc_9_0_sh_mask.h"
#include "vega10/vega10_enum.h"
#include "hdp/hdp_4_0_offset.h"

6
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
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@ -24,9 +24,9 @@
#include "gfxhub_v1_0.h"
#include "vega10/soc15ip.h"
#include "vega10/GC/gc_9_0_offset.h"
#include "vega10/GC/gc_9_0_sh_mask.h"
#include "vega10/GC/gc_9_0_default.h"
#include "gc/gc_9_0_offset.h"
#include "gc/gc_9_0_sh_mask.h"
#include "gc/gc_9_0_default.h"
#include "vega10/vega10_enum.h"
#include "soc15_common.h"

2
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
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@ -28,7 +28,7 @@
#include "vega10/soc15ip.h"
#include "hdp/hdp_4_0_offset.h"
#include "hdp/hdp_4_0_sh_mask.h"
#include "vega10/GC/gc_9_0_sh_mask.h"
#include "gc/gc_9_0_sh_mask.h"
#include "dce/dce_12_0_offset.h"
#include "dce/dce_12_0_sh_mask.h"
#include "vega10/vega10_enum.h"

4
drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
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@ -25,8 +25,8 @@
#include "vega10/soc15ip.h"
#include "vega10/NBIO/nbio_6_1_offset.h"
#include "vega10/NBIO/nbio_6_1_sh_mask.h"
#include "vega10/GC/gc_9_0_offset.h"
#include "vega10/GC/gc_9_0_sh_mask.h"
#include "gc/gc_9_0_offset.h"
#include "gc/gc_9_0_sh_mask.h"
#include "soc15.h"
#include "vega10_ih.h"
#include "soc15_common.h"

2
drivers/gpu/drm/amd/amdgpu/psp_v3_1.c
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@ -34,7 +34,7 @@
#include "vega10/soc15ip.h"
#include "mp/mp_9_0_offset.h"
#include "mp/mp_9_0_sh_mask.h"
#include "vega10/GC/gc_9_0_offset.h"
#include "gc/gc_9_0_offset.h"
#include "sdma0/sdma0_4_0_offset.h"
#include "vega10/NBIO/nbio_6_1_offset.h"

4
drivers/gpu/drm/amd/amdgpu/soc15.c
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@ -36,8 +36,8 @@
#include "vega10/soc15ip.h"
#include "uvd/uvd_7_0_offset.h"
#include "vega10/GC/gc_9_0_offset.h"
#include "vega10/GC/gc_9_0_sh_mask.h"
#include "gc/gc_9_0_offset.h"
#include "gc/gc_9_0_sh_mask.h"
#include "sdma0/sdma0_4_0_offset.h"
#include "sdma1/sdma1_4_0_offset.h"
#include "hdp/hdp_4_0_offset.h"

0
drivers/gpu/drm/amd/include/asic_reg/vega10/GC/gc_9_0_default.h → drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_default.h
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0
drivers/gpu/drm/amd/include/asic_reg/vega10/GC/gc_9_0_offset.h → drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h
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0
drivers/gpu/drm/amd/include/asic_reg/vega10/GC/gc_9_0_sh_mask.h → drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h
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6
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_inc.h
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@ -31,9 +31,9 @@
#include "asic_reg/mp/mp_9_0_offset.h"
#include "asic_reg/mp/mp_9_0_sh_mask.h"
#include "asic_reg/vega10/GC/gc_9_0_default.h"
#include "asic_reg/vega10/GC/gc_9_0_offset.h"
#include "asic_reg/vega10/GC/gc_9_0_sh_mask.h"
#include "asic_reg/gc/gc_9_0_default.h"
#include "asic_reg/gc/gc_9_0_offset.h"
#include "asic_reg/gc/gc_9_0_sh_mask.h"
#include "asic_reg/vega10/NBIO/nbio_6_1_default.h"
#include "asic_reg/vega10/NBIO/nbio_6_1_offset.h"