staging: sm750fb: change defintion of PANEL_PLL_CTRL multi-bit fields
Use more straight-forward definitions for multi-bit field of PANEL_PLL_CTRL register and use open-coded implementation for register manipulations. Signed-off-by: Mike Rapoport <mike.rapoport@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -36,10 +36,10 @@ static unsigned int get_mxclk_freq(void)
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return MHz(130);
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pll_reg = PEEK32(MXCLK_PLL_CTRL);
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M = FIELD_GET(pll_reg, PLL_CTRL, M);
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N = FIELD_GET(pll_reg, PLL_CTRL, N);
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OD = FIELD_GET(pll_reg, PLL_CTRL, OD);
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POD = FIELD_GET(pll_reg, PLL_CTRL, POD);
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M = (pll_reg & PLL_CTRL_M_MASK) >> PLL_CTRL_M_SHIFT;
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N = (pll_reg & PLL_CTRL_N_MASK) >> PLL_CTRL_M_SHIFT;
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OD = (pll_reg & PLL_CTRL_OD_MASK) >> PLL_CTRL_OD_SHIFT;
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POD = (pll_reg & PLL_CTRL_POD_MASK) >> PLL_CTRL_POD_SHIFT;
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return DEFAULT_INPUT_CLOCK * M / N / (1 << OD) / (1 << POD);
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}
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@ -355,6 +355,12 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll)
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unsigned int formatPllReg(pll_value_t *pPLL)
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{
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#ifndef VALIDATION_CHIP
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unsigned int POD = pPLL->POD;
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#endif
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unsigned int OD = pPLL->OD;
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unsigned int M = pPLL->M;
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unsigned int N = pPLL->N;
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unsigned int reg = 0;
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/*
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@ -363,13 +369,13 @@ unsigned int formatPllReg(pll_value_t *pPLL)
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* register. On returning a 32 bit number, the value can be
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* applied to any PLL in the calling function.
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*/
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reg = PLL_CTRL_POWER
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reg = PLL_CTRL_POWER |
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#ifndef VALIDATION_CHIP
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| FIELD_VALUE(0, PLL_CTRL, POD, pPLL->POD)
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((POD << PLL_CTRL_POD_SHIFT) & PLL_CTRL_POD_MASK) |
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#endif
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| FIELD_VALUE(0, PLL_CTRL, OD, pPLL->OD)
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| FIELD_VALUE(0, PLL_CTRL, N, pPLL->N)
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| FIELD_VALUE(0, PLL_CTRL, M, pPLL->M);
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((OD << PLL_CTRL_OD_SHIFT) & PLL_CTRL_OD_MASK) |
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((N << PLL_CTRL_N_SHIFT) & PLL_CTRL_N_MASK) |
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((M << PLL_CTRL_M_SHIFT) & PLL_CTRL_M_MASK);
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return reg;
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}
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@ -521,13 +521,18 @@
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#define PLL_CTRL_POWER BIT(17)
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#define PLL_CTRL_INPUT BIT(16)
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#ifdef VALIDATION_CHIP
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#define PLL_CTRL_OD 15:14
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#define PLL_CTRL_OD_SHIFT 14
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#define PLL_CTRL_OD_MASK (0x3 << 14)
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#else
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#define PLL_CTRL_POD 15:14
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#define PLL_CTRL_OD 13:12
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#define PLL_CTRL_POD_SHIFT 14
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#define PLL_CTRL_POD_MASK (0x3 << 14)
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#define PLL_CTRL_OD_SHIFT 12
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#define PLL_CTRL_OD_MASK (0x3 << 12)
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#endif
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#define PLL_CTRL_N 11:8
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#define PLL_CTRL_M 7:0
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#define PLL_CTRL_N_SHIFT 8
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#define PLL_CTRL_N_MASK (0xf << 8)
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#define PLL_CTRL_M_SHIFT 0
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#define PLL_CTRL_M_MASK 0xff
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#define CRT_PLL_CTRL 0x000060
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#define CRT_PLL_CTRL_BYPASS 18:18
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