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staging: sm750fb: change defintion of PANEL_PLL_CTRL multi-bit fields 

Use more straight-forward definitions for multi-bit field of
PANEL_PLL_CTRL register and use open-coded implementation for register
manipulations.

Signed-off-by: Mike Rapoport <mike.rapoport@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Mike Rapoport 2016-02-10 18:33:58 +02:00 committed by Greg Kroah-Hartman
parent 5557eb17b3
commit cdd5df644a
2 changed files with 25 additions and 14 deletions
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24
drivers/staging/sm750fb/ddk750_chip.c
View File

@ -36,10 +36,10 @@ static unsigned int get_mxclk_freq(void)
return MHz(130); return MHz(130);
pll_reg = PEEK32(MXCLK_PLL_CTRL); pll_reg = PEEK32(MXCLK_PLL_CTRL);
M = FIELD_GET(pll_reg, PLL_CTRL, M); M = (pll_reg & PLL_CTRL_M_MASK) >> PLL_CTRL_M_SHIFT;
N = FIELD_GET(pll_reg, PLL_CTRL, N); N = (pll_reg & PLL_CTRL_N_MASK) >> PLL_CTRL_M_SHIFT;
OD = FIELD_GET(pll_reg, PLL_CTRL, OD); OD = (pll_reg & PLL_CTRL_OD_MASK) >> PLL_CTRL_OD_SHIFT;
POD = FIELD_GET(pll_reg, PLL_CTRL, POD); POD = (pll_reg & PLL_CTRL_POD_MASK) >> PLL_CTRL_POD_SHIFT;
return DEFAULT_INPUT_CLOCK * M / N / (1 << OD) / (1 << POD); return DEFAULT_INPUT_CLOCK * M / N / (1 << OD) / (1 << POD);
} }
@ -355,6 +355,12 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll)
unsigned int formatPllReg(pll_value_t *pPLL) unsigned int formatPllReg(pll_value_t *pPLL)
{ {
#ifndef VALIDATION_CHIP
unsigned int POD = pPLL->POD;
#endif
unsigned int OD = pPLL->OD;
unsigned int M = pPLL->M;
unsigned int N = pPLL->N;
unsigned int reg = 0; unsigned int reg = 0;
/* /*
@ -363,13 +369,13 @@ unsigned int formatPllReg(pll_value_t *pPLL)
* register. On returning a 32 bit number, the value can be * register. On returning a 32 bit number, the value can be
* applied to any PLL in the calling function. * applied to any PLL in the calling function.
*/ */
reg = PLL_CTRL_POWER reg = PLL_CTRL_POWER |
#ifndef VALIDATION_CHIP #ifndef VALIDATION_CHIP
| FIELD_VALUE(0, PLL_CTRL, POD, pPLL->POD) ((POD << PLL_CTRL_POD_SHIFT) & PLL_CTRL_POD_MASK) |
#endif #endif
| FIELD_VALUE(0, PLL_CTRL, OD, pPLL->OD) ((OD << PLL_CTRL_OD_SHIFT) & PLL_CTRL_OD_MASK) |
| FIELD_VALUE(0, PLL_CTRL, N, pPLL->N) ((N << PLL_CTRL_N_SHIFT) & PLL_CTRL_N_MASK) |
| FIELD_VALUE(0, PLL_CTRL, M, pPLL->M); ((M << PLL_CTRL_M_SHIFT) & PLL_CTRL_M_MASK);
return reg; return reg;
} }

15
drivers/staging/sm750fb/ddk750_reg.h
View File

@ -521,13 +521,18 @@
#define PLL_CTRL_POWER BIT(17) #define PLL_CTRL_POWER BIT(17)
#define PLL_CTRL_INPUT BIT(16) #define PLL_CTRL_INPUT BIT(16)
#ifdef VALIDATION_CHIP #ifdef VALIDATION_CHIP
#define PLL_CTRL_OD 15:14 #define PLL_CTRL_OD_SHIFT 14
#define PLL_CTRL_OD_MASK (0x3 << 14)
#else #else
#define PLL_CTRL_POD 15:14 #define PLL_CTRL_POD_SHIFT 14
#define PLL_CTRL_OD 13:12 #define PLL_CTRL_POD_MASK (0x3 << 14)
#define PLL_CTRL_OD_SHIFT 12
#define PLL_CTRL_OD_MASK (0x3 << 12)
#endif #endif
#define PLL_CTRL_N 11:8 #define PLL_CTRL_N_SHIFT 8
#define PLL_CTRL_M 7:0 #define PLL_CTRL_N_MASK (0xf << 8)
#define PLL_CTRL_M_SHIFT 0
#define PLL_CTRL_M_MASK 0xff
#define CRT_PLL_CTRL 0x000060 #define CRT_PLL_CTRL 0x000060
#define CRT_PLL_CTRL_BYPASS 18:18 #define CRT_PLL_CTRL_BYPASS 18:18