MIPS: MIPS16e: Add instruction formats.
Add structures for all the MIPS16e instructions. Also add the enumerations for all the bit fields for opcodes, functions, etc. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
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@ -423,6 +423,47 @@ enum mm_16d_minor_op {
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mm_addiusp_func,
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};
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/*
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* (MIPS16e) opcodes.
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*/
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enum MIPS16e_ops {
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MIPS16e_jal_op = 003,
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MIPS16e_ld_op = 007,
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MIPS16e_i8_op = 014,
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MIPS16e_sd_op = 017,
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MIPS16e_lb_op = 020,
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MIPS16e_lh_op = 021,
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MIPS16e_lwsp_op = 022,
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MIPS16e_lw_op = 023,
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MIPS16e_lbu_op = 024,
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MIPS16e_lhu_op = 025,
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MIPS16e_lwpc_op = 026,
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MIPS16e_lwu_op = 027,
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MIPS16e_sb_op = 030,
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MIPS16e_sh_op = 031,
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MIPS16e_swsp_op = 032,
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MIPS16e_sw_op = 033,
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MIPS16e_rr_op = 035,
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MIPS16e_extend_op = 036,
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MIPS16e_i64_op = 037,
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};
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enum MIPS16e_i64_func {
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MIPS16e_ldsp_func,
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MIPS16e_sdsp_func,
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MIPS16e_sdrasp_func,
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MIPS16e_dadjsp_func,
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MIPS16e_ldpc_func,
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};
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enum MIPS16e_rr_func {
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MIPS16e_jr_func,
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};
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enum MIPS6e_i8_func {
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MIPS16e_swrasp_func = 02,
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};
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/*
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* (microMIPS & MIPS16e) NOP instruction.
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*/
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@ -745,6 +786,64 @@ struct mm16_r5_format { /* Load/store from stack pointer format */
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;))))
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};
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/*
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* MIPS16e instruction formats (16-bit length)
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*/
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struct m16e_rr {
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BITFIELD_FIELD(unsigned int opcode : 5,
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BITFIELD_FIELD(unsigned int rx : 3,
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BITFIELD_FIELD(unsigned int nd : 1,
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BITFIELD_FIELD(unsigned int l : 1,
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BITFIELD_FIELD(unsigned int ra : 1,
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BITFIELD_FIELD(unsigned int func : 5,
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;))))))
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};
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struct m16e_jal {
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BITFIELD_FIELD(unsigned int opcode : 5,
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BITFIELD_FIELD(unsigned int x : 1,
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BITFIELD_FIELD(unsigned int imm20_16 : 5,
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BITFIELD_FIELD(signed int imm25_21 : 5,
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;))))
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};
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struct m16e_i64 {
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BITFIELD_FIELD(unsigned int opcode : 5,
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BITFIELD_FIELD(unsigned int func : 3,
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BITFIELD_FIELD(unsigned int imm : 8,
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;)))
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};
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struct m16e_ri64 {
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BITFIELD_FIELD(unsigned int opcode : 5,
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BITFIELD_FIELD(unsigned int func : 3,
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BITFIELD_FIELD(unsigned int ry : 3,
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BITFIELD_FIELD(unsigned int imm : 5,
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;))))
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};
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struct m16e_ri {
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BITFIELD_FIELD(unsigned int opcode : 5,
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BITFIELD_FIELD(unsigned int rx : 3,
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BITFIELD_FIELD(unsigned int imm : 8,
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;)))
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};
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struct m16e_rri {
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BITFIELD_FIELD(unsigned int opcode : 5,
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BITFIELD_FIELD(unsigned int rx : 3,
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BITFIELD_FIELD(unsigned int ry : 3,
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BITFIELD_FIELD(unsigned int imm : 5,
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;))))
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};
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struct m16e_i8 {
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BITFIELD_FIELD(unsigned int opcode : 5,
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BITFIELD_FIELD(unsigned int func : 3,
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BITFIELD_FIELD(unsigned int imm : 8,
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;)))
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};
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union mips_instruction {
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unsigned int word;
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unsigned short halfword[2];
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@ -782,4 +881,15 @@ union mips_instruction {
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struct mm16_r5_format mm16_r5_format;
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};
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union mips16e_instruction {
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unsigned int full : 16;
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struct m16e_rr rr;
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struct m16e_jal jal;
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struct m16e_i64 i64;
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struct m16e_ri64 ri64;
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struct m16e_ri ri;
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struct m16e_rri rri;
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struct m16e_i8 i8;
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};
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#endif /* _UAPI_ASM_INST_H */
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