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drm/imx: plane, ldb, and ipu-v3 fixes 

- Fix CSI register offsets for i.MX51 and i.MX53.
 - Fix delayed page flip completion events on i.MX6QP due to unexpected
   behaviour of the PRE when issuing NOP buffer updates to the same
   buffer address.
 - Stop throwing errors for plane updates on disabled CRTCs when a
   userspace process is killed while a plane update is pending.
 - Add missing of_node_put cleanup in imx_ldb_bind.
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Merge tag 'imx-drm-fixes-2019-02-12' of git://git.pengutronix.de/pza/linux into drm-fixes

drm/imx: plane, ldb, and ipu-v3 fixes

- Fix CSI register offsets for i.MX51 and i.MX53.
- Fix delayed page flip completion events on i.MX6QP due to unexpected
  behaviour of the PRE when issuing NOP buffer updates to the same
  buffer address.
- Stop throwing errors for plane updates on disabled CRTCs when a
  userspace process is killed while a plane update is pending.
- Add missing of_node_put cleanup in imx_ldb_bind.

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://patchwork.freedesktop.org/patch/msgid/1549990602.4800.11.camel@pengutronix.de
This commit is contained in:
Dave Airlie 2019-02-13 13:05:03 +10:00
parent d13937116f eb0200a435
commit cd4c5a4874
4 changed files with 29 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

25
drivers/gpu/drm/imx/imx-ldb.c
View File

@ -643,8 +643,10 @@ static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
int bus_format;
ret = of_property_read_u32(child, "reg", &i);
if (ret || i < 0 || i > 1)
return -EINVAL;
if (ret || i < 0 || i > 1) {
ret = -EINVAL;
goto free_child;
}
if (!of_device_is_available(child))
continue;
@ -657,7 +659,6 @@ static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
channel = &imx_ldb->channel[i];
channel->ldb = imx_ldb;
channel->chno = i;
channel->child = child;
/*
* The output port is port@4 with an external 4-port mux or
@ -667,13 +668,13 @@ static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
imx_ldb->lvds_mux ? 4 : 2, 0,
&channel->panel, &channel->bridge);
if (ret && ret != -ENODEV)
return ret;
goto free_child;
/* panel ddc only if there is no bridge */
if (!channel->bridge) {
ret = imx_ldb_panel_ddc(dev, channel, child);
if (ret)
return ret;
goto free_child;
}
bus_format = of_get_bus_format(dev, child);
@ -689,18 +690,26 @@ static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
if (bus_format < 0) {
dev_err(dev, "could not determine data mapping: %d\n",
bus_format);
return bus_format;
ret = bus_format;
goto free_child;
}
channel->bus_format = bus_format;
channel->child = child;
ret = imx_ldb_register(drm, channel);
if (ret)
return ret;
if (ret) {
channel->child = NULL;
goto free_child;
}
}
dev_set_drvdata(dev, imx_ldb);
return 0;
free_child:
of_node_put(child);
return ret;
}
static void imx_ldb_unbind(struct device *dev, struct device *master,

4
drivers/gpu/drm/imx/ipuv3-plane.c
View File

@ -370,9 +370,9 @@ static int ipu_plane_atomic_check(struct drm_plane *plane,
if (ret)
return ret;
/* CRTC should be enabled */
/* nothing to check when disabling or disabled */
if (!crtc_state->enable)
return -EINVAL;
return 0;
switch (plane->type) {
case DRM_PLANE_TYPE_PRIMARY:

8
drivers/gpu/ipu-v3/ipu-common.c
View File

@ -898,8 +898,8 @@ static struct ipu_devtype ipu_type_imx51 = {
.cpmem_ofs = 0x1f000000,
.srm_ofs = 0x1f040000,
.tpm_ofs = 0x1f060000,
.csi0_ofs = 0x1f030000,
.csi1_ofs = 0x1f038000,
.csi0_ofs = 0x1e030000,
.csi1_ofs = 0x1e038000,
.ic_ofs = 0x1e020000,
.disp0_ofs = 0x1e040000,
.disp1_ofs = 0x1e048000,
@ -914,8 +914,8 @@ static struct ipu_devtype ipu_type_imx53 = {
.cpmem_ofs = 0x07000000,
.srm_ofs = 0x07040000,
.tpm_ofs = 0x07060000,
.csi0_ofs = 0x07030000,
.csi1_ofs = 0x07038000,
.csi0_ofs = 0x06030000,
.csi1_ofs = 0x06038000,
.ic_ofs = 0x06020000,
.disp0_ofs = 0x06040000,
.disp1_ofs = 0x06048000,

6
drivers/gpu/ipu-v3/ipu-pre.c
View File

@ -106,6 +106,7 @@ struct ipu_pre {
void *buffer_virt;
bool in_use;
unsigned int safe_window_end;
unsigned int last_bufaddr;
};
static DEFINE_MUTEX(ipu_pre_list_mutex);
@ -185,6 +186,7 @@ void ipu_pre_configure(struct ipu_pre *pre, unsigned int width,
writel(bufaddr, pre->regs + IPU_PRE_CUR_BUF);
writel(bufaddr, pre->regs + IPU_PRE_NEXT_BUF);
pre->last_bufaddr = bufaddr;
val = IPU_PRE_PREF_ENG_CTRL_INPUT_PIXEL_FORMAT(0) |
IPU_PRE_PREF_ENG_CTRL_INPUT_ACTIVE_BPP(active_bpp) |
@ -242,7 +244,11 @@ void ipu_pre_update(struct ipu_pre *pre, unsigned int bufaddr)
unsigned short current_yblock;
u32 val;
if (bufaddr == pre->last_bufaddr)
return;
writel(bufaddr, pre->regs + IPU_PRE_NEXT_BUF);
pre->last_bufaddr = bufaddr;
do {
if (time_after(jiffies, timeout)) {