Fix preemption and SMP problems in the FP emulator code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
parent
63b2d2f4d2
commit
cd21dfcfbb
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@ -551,6 +551,14 @@ asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
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preempt_disable();
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#ifdef CONFIG_PREEMPT
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if (!is_fpu_owner()) {
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/* We might lose fpu before disabling preempt... */
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own_fpu();
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BUG_ON(!used_math());
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restore_fp(current);
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}
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#endif
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/*
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* Unimplemented operation exception. If we've got the full
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* software emulator on-board, let's use it...
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@ -562,11 +570,18 @@ asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
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* a bit extreme for what should be an infrequent event.
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*/
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save_fp(current);
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/* Ensure 'resume' not overwrite saved fp context again. */
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lose_fpu();
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preempt_enable();
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/* Run the emulator */
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sig = fpu_emulator_cop1Handler (0, regs,
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¤t->thread.fpu.soft);
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preempt_disable();
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own_fpu(); /* Using the FPU again. */
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/*
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* We can't allow the emulated instruction to leave any of
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* the cause bit set in $fcr31.
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@ -712,6 +727,8 @@ asmlinkage void do_cpu(struct pt_regs *regs)
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set_used_math();
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}
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preempt_enable();
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if (!cpu_has_fpu) {
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int sig = fpu_emulator_cop1Handler(0, regs,
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¤t->thread.fpu.soft);
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@ -719,8 +736,6 @@ asmlinkage void do_cpu(struct pt_regs *regs)
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force_sig(sig, current);
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}
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preempt_enable();
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return;
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case 2:
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@ -79,7 +79,17 @@ struct mips_fpu_emulator_private fpuemuprivate;
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/* Convert Mips rounding mode (0..3) to IEEE library modes. */
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static const unsigned char ieee_rm[4] = {
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IEEE754_RN, IEEE754_RZ, IEEE754_RU, IEEE754_RD
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[FPU_CSR_RN] = IEEE754_RN,
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[FPU_CSR_RZ] = IEEE754_RZ,
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[FPU_CSR_RU] = IEEE754_RU,
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[FPU_CSR_RD] = IEEE754_RD,
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};
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/* Convert IEEE library modes to Mips rounding mode (0..3). */
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static const unsigned char mips_rm[4] = {
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[IEEE754_RN] = FPU_CSR_RN,
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[IEEE754_RZ] = FPU_CSR_RZ,
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[IEEE754_RD] = FPU_CSR_RD,
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[IEEE754_RU] = FPU_CSR_RU,
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};
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#if __mips >= 4
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@ -368,6 +378,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
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}
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if (MIPSInst_RD(ir) == FPCREG_CSR) {
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value = ctx->fcr31;
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value = (value & ~0x3) | mips_rm[value & 0x3];
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#ifdef CSRTRACE
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printk("%p gpr[%d]<-csr=%08x\n",
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(void *) (xcp->cp0_epc),
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@ -400,11 +411,10 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx)
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(void *) (xcp->cp0_epc),
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MIPSInst_RT(ir), value);
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#endif
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ctx->fcr31 = value;
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/* copy new rounding mode and
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flush bit to ieee library state! */
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ieee754_csr.nod = (ctx->fcr31 & 0x1000000) != 0;
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ieee754_csr.rm = ieee_rm[value & 0x3];
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value &= (FPU_CSR_FLUSH | FPU_CSR_ALL_E | FPU_CSR_ALL_S | 0x03);
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ctx->fcr31 &= ~(FPU_CSR_FLUSH | FPU_CSR_ALL_E | FPU_CSR_ALL_S | 0x03);
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/* convert to ieee library modes */
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ctx->fcr31 |= (value & ~0x3) | ieee_rm[value & 0x3];
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}
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if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {
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return SIGFPE;
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@ -570,7 +580,7 @@ static const unsigned char cmptab[8] = {
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static ieee754##p fpemu_##p##_##name (ieee754##p r, ieee754##p s, \
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ieee754##p t) \
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{ \
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struct ieee754_csr ieee754_csr_save; \
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struct _ieee754_csr ieee754_csr_save; \
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s = f1 (s, t); \
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ieee754_csr_save = ieee754_csr; \
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s = f2 (s, r); \
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@ -699,8 +709,6 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_soft_struct *ctx,
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rcsr |= FPU_CSR_INV_X | FPU_CSR_INV_S;
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ctx->fcr31 = (ctx->fcr31 & ~FPU_CSR_ALL_X) | rcsr;
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if (ieee754_csr.nod)
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ctx->fcr31 |= 0x1000000;
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if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {
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/*printk ("SIGFPE: fpu csr = %08x\n",
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ctx->fcr31); */
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@ -1297,12 +1305,17 @@ int fpu_emulator_cop1Handler(int xcptno, struct pt_regs *xcp,
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if (insn == 0)
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xcp->cp0_epc += 4; /* skip nops */
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else {
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/* Update ieee754_csr. Only relevant if we have a
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h/w FPU */
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ieee754_csr.nod = (ctx->fcr31 & 0x1000000) != 0;
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ieee754_csr.rm = ieee_rm[ctx->fcr31 & 0x3];
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ieee754_csr.cx = (ctx->fcr31 >> 12) & 0x1f;
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/*
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* The 'ieee754_csr' is an alias of
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* ctx->fcr31. No need to copy ctx->fcr31 to
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* ieee754_csr. But ieee754_csr.rm is ieee
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* library modes. (not mips rounding mode)
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*/
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/* convert to ieee library modes */
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ieee754_csr.rm = ieee_rm[ieee754_csr.rm];
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sig = cop1Emulate(xcp, ctx);
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/* revert to mips rounding mode */
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ieee754_csr.rm = mips_rm[ieee754_csr.rm];
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}
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if (cpu_has_fpu)
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@ -37,7 +37,7 @@ static const unsigned table[] = {
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ieee754dp ieee754dp_sqrt(ieee754dp x)
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{
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struct ieee754_csr oldcsr;
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struct _ieee754_csr oldcsr;
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ieee754dp y, z, t;
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unsigned scalx, yh;
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COMPXDP;
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@ -50,10 +50,6 @@ const char *const ieee754_cname[] = {
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"SNaN",
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};
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/* the control status register
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*/
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struct ieee754_csr ieee754_csr;
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/* special constants
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*/
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@ -1,13 +1,8 @@
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/* single and double precision fp ops
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* missing extended precision.
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*/
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/*
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* MIPS floating point support
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* Copyright (C) 1994-2000 Algorithmics Ltd.
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* http://www.algor.co.uk
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*
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* ########################################################################
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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@ -21,20 +16,16 @@
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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*
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* ########################################################################
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*/
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/**************************************************************************
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* Nov 7, 2000
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* Modification to allow integration with Linux kernel
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*
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* Kevin D. Kissell, kevink@mips.com and Carsten Langgard, carstenl@mips.com
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* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
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*************************************************************************/
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*/
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#ifdef __KERNEL__
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/* Going from Algorithmics to Linux native environment, add this */
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#include <asm/byteorder.h>
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#include <linux/types.h>
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#include <linux/sched.h>
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/*
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* Not very pretty, but the Linux kernel's normal va_list definition
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#include <stdarg.h>
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#endif
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#else
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/* Note that __KERNEL__ is taken to mean Linux kernel */
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#if #system(OpenBSD)
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#include <machine/types.h>
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#endif
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#include <machine/endian.h>
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#endif /* __KERNEL__ */
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#if (defined(BYTE_ORDER) && BYTE_ORDER == LITTLE_ENDIAN) || defined(__MIPSEL__)
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#ifdef __LITTLE_ENDIAN
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struct ieee754dp_konst {
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unsigned mantlo:32;
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unsigned manthi:20;
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@ -86,13 +66,14 @@ typedef union _ieee754sp {
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} ieee754sp;
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#endif
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#if (defined(BYTE_ORDER) && BYTE_ORDER == BIG_ENDIAN) || defined(__MIPSEB__)
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#ifdef __BIG_ENDIAN
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struct ieee754dp_konst {
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unsigned sign:1;
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unsigned bexp:11;
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unsigned manthi:20;
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unsigned mantlo:32;
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};
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typedef union _ieee754dp {
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struct ieee754dp_konst oparts;
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struct {
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/* "normal" comparisons
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*/
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static __inline int ieee754sp_eq(ieee754sp x, ieee754sp y)
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static inline int ieee754sp_eq(ieee754sp x, ieee754sp y)
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{
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return ieee754sp_cmp(x, y, IEEE754_CEQ, 0);
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}
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static __inline int ieee754sp_ne(ieee754sp x, ieee754sp y)
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static inline int ieee754sp_ne(ieee754sp x, ieee754sp y)
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{
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return ieee754sp_cmp(x, y,
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IEEE754_CLT | IEEE754_CGT | IEEE754_CUN, 0);
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}
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static __inline int ieee754sp_lt(ieee754sp x, ieee754sp y)
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static inline int ieee754sp_lt(ieee754sp x, ieee754sp y)
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{
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return ieee754sp_cmp(x, y, IEEE754_CLT, 0);
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}
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static __inline int ieee754sp_le(ieee754sp x, ieee754sp y)
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static inline int ieee754sp_le(ieee754sp x, ieee754sp y)
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{
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return ieee754sp_cmp(x, y, IEEE754_CLT | IEEE754_CEQ, 0);
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}
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static __inline int ieee754sp_gt(ieee754sp x, ieee754sp y)
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static inline int ieee754sp_gt(ieee754sp x, ieee754sp y)
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{
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return ieee754sp_cmp(x, y, IEEE754_CGT, 0);
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}
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static __inline int ieee754sp_ge(ieee754sp x, ieee754sp y)
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static inline int ieee754sp_ge(ieee754sp x, ieee754sp y)
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{
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return ieee754sp_cmp(x, y, IEEE754_CGT | IEEE754_CEQ, 0);
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}
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static __inline int ieee754dp_eq(ieee754dp x, ieee754dp y)
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static inline int ieee754dp_eq(ieee754dp x, ieee754dp y)
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{
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return ieee754dp_cmp(x, y, IEEE754_CEQ, 0);
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}
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static __inline int ieee754dp_ne(ieee754dp x, ieee754dp y)
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static inline int ieee754dp_ne(ieee754dp x, ieee754dp y)
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{
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return ieee754dp_cmp(x, y,
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IEEE754_CLT | IEEE754_CGT | IEEE754_CUN, 0);
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}
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static __inline int ieee754dp_lt(ieee754dp x, ieee754dp y)
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static inline int ieee754dp_lt(ieee754dp x, ieee754dp y)
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{
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return ieee754dp_cmp(x, y, IEEE754_CLT, 0);
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}
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static __inline int ieee754dp_le(ieee754dp x, ieee754dp y)
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static inline int ieee754dp_le(ieee754dp x, ieee754dp y)
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{
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return ieee754dp_cmp(x, y, IEEE754_CLT | IEEE754_CEQ, 0);
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}
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static __inline int ieee754dp_gt(ieee754dp x, ieee754dp y)
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static inline int ieee754dp_gt(ieee754dp x, ieee754dp y)
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{
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return ieee754dp_cmp(x, y, IEEE754_CGT, 0);
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}
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static __inline int ieee754dp_ge(ieee754dp x, ieee754dp y)
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static inline int ieee754dp_ge(ieee754dp x, ieee754dp y)
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{
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return ieee754dp_cmp(x, y, IEEE754_CGT | IEEE754_CEQ, 0);
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}
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/* like strtod
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*/
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/*
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* Like strtod
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*/
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ieee754dp ieee754dp_fstr(const char *s, char **endp);
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char *ieee754dp_tstr(ieee754dp x, int prec, int fmt, int af);
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/* the control status register
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*/
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struct ieee754_csr {
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unsigned pad:13;
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/*
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* The control status register
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*/
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struct _ieee754_csr {
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#ifdef __BIG_ENDIAN
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unsigned pad0:7;
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unsigned nod:1; /* set 1 for no denormalised numbers */
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unsigned cx:5; /* exceptions this operation */
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unsigned c:1; /* condition */
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unsigned pad1:5;
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unsigned cx:6; /* exceptions this operation */
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unsigned mx:5; /* exception enable mask */
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unsigned sx:5; /* exceptions total */
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unsigned rm:2; /* current rounding mode */
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#endif
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#ifdef __LITTLE_ENDIAN
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unsigned rm:2; /* current rounding mode */
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unsigned sx:5; /* exceptions total */
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unsigned mx:5; /* exception enable mask */
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unsigned cx:6; /* exceptions this operation */
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unsigned pad1:5;
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unsigned c:1; /* condition */
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unsigned nod:1; /* set 1 for no denormalised numbers */
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unsigned pad0:7;
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#endif
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};
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extern struct ieee754_csr ieee754_csr;
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#define ieee754_csr (*(struct _ieee754_csr *)(¤t->thread.fpu.soft.fcr31))
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static __inline unsigned ieee754_getrm(void)
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static inline unsigned ieee754_getrm(void)
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{
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return (ieee754_csr.rm);
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}
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static __inline unsigned ieee754_setrm(unsigned rm)
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static inline unsigned ieee754_setrm(unsigned rm)
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{
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return (ieee754_csr.rm = rm);
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}
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@ -345,14 +342,14 @@ static __inline unsigned ieee754_setrm(unsigned rm)
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/*
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* get current exceptions
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*/
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static __inline unsigned ieee754_getcx(void)
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static inline unsigned ieee754_getcx(void)
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{
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return (ieee754_csr.cx);
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}
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/* test for current exception condition
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*/
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static __inline int ieee754_cxtest(unsigned n)
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static inline int ieee754_cxtest(unsigned n)
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{
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return (ieee754_csr.cx & n);
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}
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@ -360,21 +357,21 @@ static __inline int ieee754_cxtest(unsigned n)
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/*
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* get sticky exceptions
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*/
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static __inline unsigned ieee754_getsx(void)
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static inline unsigned ieee754_getsx(void)
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{
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return (ieee754_csr.sx);
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}
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/* clear sticky conditions
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*/
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static __inline unsigned ieee754_clrsx(void)
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static inline unsigned ieee754_clrsx(void)
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{
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return (ieee754_csr.sx = 0);
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}
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/* test for sticky exception condition
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*/
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static __inline int ieee754_sxtest(unsigned n)
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static inline int ieee754_sxtest(unsigned n)
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{
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return (ieee754_csr.sx & n);
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}
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@ -406,52 +403,34 @@ extern const struct ieee754sp_konst __ieee754sp_spcvals[];
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#define ieee754dp_spcvals ((const ieee754dp *)__ieee754dp_spcvals)
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#define ieee754sp_spcvals ((const ieee754sp *)__ieee754sp_spcvals)
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/* return infinity with given sign
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*/
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#define ieee754dp_inf(sn) \
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(ieee754dp_spcvals[IEEE754_SPCVAL_PINFINITY+(sn)])
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#define ieee754dp_zero(sn) \
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(ieee754dp_spcvals[IEEE754_SPCVAL_PZERO+(sn)])
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#define ieee754dp_one(sn) \
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(ieee754dp_spcvals[IEEE754_SPCVAL_PONE+(sn)])
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#define ieee754dp_ten(sn) \
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(ieee754dp_spcvals[IEEE754_SPCVAL_PTEN+(sn)])
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#define ieee754dp_indef() \
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(ieee754dp_spcvals[IEEE754_SPCVAL_INDEF])
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#define ieee754dp_max(sn) \
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(ieee754dp_spcvals[IEEE754_SPCVAL_PMAX+(sn)])
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#define ieee754dp_min(sn) \
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(ieee754dp_spcvals[IEEE754_SPCVAL_PMIN+(sn)])
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#define ieee754dp_mind(sn) \
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(ieee754dp_spcvals[IEEE754_SPCVAL_PMIND+(sn)])
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#define ieee754dp_1e31() \
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(ieee754dp_spcvals[IEEE754_SPCVAL_P1E31])
|
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#define ieee754dp_1e63() \
|
||||
(ieee754dp_spcvals[IEEE754_SPCVAL_P1E63])
|
||||
/*
|
||||
* Return infinity with given sign
|
||||
*/
|
||||
#define ieee754dp_inf(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PINFINITY+(sn)])
|
||||
#define ieee754dp_zero(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PZERO+(sn)])
|
||||
#define ieee754dp_one(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PONE+(sn)])
|
||||
#define ieee754dp_ten(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PTEN+(sn)])
|
||||
#define ieee754dp_indef() (ieee754dp_spcvals[IEEE754_SPCVAL_INDEF])
|
||||
#define ieee754dp_max(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PMAX+(sn)])
|
||||
#define ieee754dp_min(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PMIN+(sn)])
|
||||
#define ieee754dp_mind(sn) (ieee754dp_spcvals[IEEE754_SPCVAL_PMIND+(sn)])
|
||||
#define ieee754dp_1e31() (ieee754dp_spcvals[IEEE754_SPCVAL_P1E31])
|
||||
#define ieee754dp_1e63() (ieee754dp_spcvals[IEEE754_SPCVAL_P1E63])
|
||||
|
||||
#define ieee754sp_inf(sn) \
|
||||
(ieee754sp_spcvals[IEEE754_SPCVAL_PINFINITY+(sn)])
|
||||
#define ieee754sp_zero(sn) \
|
||||
(ieee754sp_spcvals[IEEE754_SPCVAL_PZERO+(sn)])
|
||||
#define ieee754sp_one(sn) \
|
||||
(ieee754sp_spcvals[IEEE754_SPCVAL_PONE+(sn)])
|
||||
#define ieee754sp_ten(sn) \
|
||||
(ieee754sp_spcvals[IEEE754_SPCVAL_PTEN+(sn)])
|
||||
#define ieee754sp_indef() \
|
||||
(ieee754sp_spcvals[IEEE754_SPCVAL_INDEF])
|
||||
#define ieee754sp_max(sn) \
|
||||
(ieee754sp_spcvals[IEEE754_SPCVAL_PMAX+(sn)])
|
||||
#define ieee754sp_min(sn) \
|
||||
(ieee754sp_spcvals[IEEE754_SPCVAL_PMIN+(sn)])
|
||||
#define ieee754sp_mind(sn) \
|
||||
(ieee754sp_spcvals[IEEE754_SPCVAL_PMIND+(sn)])
|
||||
#define ieee754sp_1e31() \
|
||||
(ieee754sp_spcvals[IEEE754_SPCVAL_P1E31])
|
||||
#define ieee754sp_1e63() \
|
||||
(ieee754sp_spcvals[IEEE754_SPCVAL_P1E63])
|
||||
#define ieee754sp_inf(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PINFINITY+(sn)])
|
||||
#define ieee754sp_zero(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PZERO+(sn)])
|
||||
#define ieee754sp_one(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PONE+(sn)])
|
||||
#define ieee754sp_ten(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PTEN+(sn)])
|
||||
#define ieee754sp_indef() (ieee754sp_spcvals[IEEE754_SPCVAL_INDEF])
|
||||
#define ieee754sp_max(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PMAX+(sn)])
|
||||
#define ieee754sp_min(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PMIN+(sn)])
|
||||
#define ieee754sp_mind(sn) (ieee754sp_spcvals[IEEE754_SPCVAL_PMIND+(sn)])
|
||||
#define ieee754sp_1e31() (ieee754sp_spcvals[IEEE754_SPCVAL_P1E31])
|
||||
#define ieee754sp_1e63() (ieee754sp_spcvals[IEEE754_SPCVAL_P1E63])
|
||||
|
||||
/* indefinite integer value
|
||||
*/
|
||||
/*
|
||||
* Indefinite integer value
|
||||
*/
|
||||
#define ieee754si_indef() INT_MAX
|
||||
#ifdef LONG_LONG_MAX
|
||||
#define ieee754di_indef() LONG_LONG_MAX
|
||||
|
|
Loading…
Reference in New Issue