clocksource/timer-riscv: Refactor riscv_timer_init_dt()
Refactor the timer init function such that few things can be shared by both DT and ACPI based platforms. Co-developed-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230515054928.2079268-18-sunilvl@ventanamicro.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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@ -124,61 +124,28 @@ static irqreturn_t riscv_timer_interrupt(int irq, void *dev_id)
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return IRQ_HANDLED;
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return IRQ_HANDLED;
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}
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}
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static int __init riscv_timer_init_dt(struct device_node *n)
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static int __init riscv_timer_init_common(void)
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{
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{
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int cpuid, error;
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int error;
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unsigned long hartid;
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struct device_node *child;
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struct irq_domain *domain;
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struct irq_domain *domain;
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struct fwnode_handle *intc_fwnode = riscv_get_intc_hwnode();
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error = riscv_of_processor_hartid(n, &hartid);
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domain = irq_find_matching_fwnode(intc_fwnode, DOMAIN_BUS_ANY);
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if (error < 0) {
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pr_warn("Not valid hartid for node [%pOF] error = [%lu]\n",
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n, hartid);
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return error;
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}
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cpuid = riscv_hartid_to_cpuid(hartid);
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if (cpuid < 0) {
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pr_warn("Invalid cpuid for hartid [%lu]\n", hartid);
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return cpuid;
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}
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if (cpuid != smp_processor_id())
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return 0;
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child = of_find_compatible_node(NULL, NULL, "riscv,timer");
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if (child) {
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riscv_timer_cannot_wake_cpu = of_property_read_bool(child,
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"riscv,timer-cannot-wake-cpu");
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of_node_put(child);
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}
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domain = NULL;
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child = of_get_compatible_child(n, "riscv,cpu-intc");
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if (!child) {
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pr_err("Failed to find INTC node [%pOF]\n", n);
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return -ENODEV;
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}
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domain = irq_find_host(child);
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of_node_put(child);
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if (!domain) {
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if (!domain) {
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pr_err("Failed to find IRQ domain for node [%pOF]\n", n);
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pr_err("Failed to find irq_domain for INTC node [%pfwP]\n",
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intc_fwnode);
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return -ENODEV;
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return -ENODEV;
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}
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}
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riscv_clock_event_irq = irq_create_mapping(domain, RV_IRQ_TIMER);
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riscv_clock_event_irq = irq_create_mapping(domain, RV_IRQ_TIMER);
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if (!riscv_clock_event_irq) {
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if (!riscv_clock_event_irq) {
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pr_err("Failed to map timer interrupt for node [%pOF]\n", n);
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pr_err("Failed to map timer interrupt for node [%pfwP]\n", intc_fwnode);
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return -ENODEV;
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return -ENODEV;
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}
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}
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pr_info("%s: Registering clocksource cpuid [%d] hartid [%lu]\n",
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__func__, cpuid, hartid);
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error = clocksource_register_hz(&riscv_clocksource, riscv_timebase);
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error = clocksource_register_hz(&riscv_clocksource, riscv_timebase);
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if (error) {
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if (error) {
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pr_err("RISCV timer register failed [%d] for cpu = [%d]\n",
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pr_err("RISCV timer registration failed [%d]\n", error);
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error, cpuid);
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return error;
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return error;
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}
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}
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@ -207,4 +174,36 @@ static int __init riscv_timer_init_dt(struct device_node *n)
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return error;
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return error;
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}
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}
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static int __init riscv_timer_init_dt(struct device_node *n)
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{
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int cpuid, error;
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unsigned long hartid;
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struct device_node *child;
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error = riscv_of_processor_hartid(n, &hartid);
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if (error < 0) {
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pr_warn("Invalid hartid for node [%pOF] error = [%lu]\n",
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n, hartid);
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return error;
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}
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cpuid = riscv_hartid_to_cpuid(hartid);
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if (cpuid < 0) {
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pr_warn("Invalid cpuid for hartid [%lu]\n", hartid);
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return cpuid;
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}
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if (cpuid != smp_processor_id())
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return 0;
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child = of_find_compatible_node(NULL, NULL, "riscv,timer");
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if (child) {
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riscv_timer_cannot_wake_cpu = of_property_read_bool(child,
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"riscv,timer-cannot-wake-cpu");
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of_node_put(child);
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}
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return riscv_timer_init_common();
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}
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TIMER_OF_DECLARE(riscv_timer, "riscv", riscv_timer_init_dt);
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TIMER_OF_DECLARE(riscv_timer, "riscv", riscv_timer_init_dt);
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