powerpc fixes for 4.7 #2

- ptrace: Fix out of bounds array access warning from Khem Raj
  - pseries: Fix PCI config address for DDW from Gavin Shan
  - pseries: Fix IBM_ARCH_VEC_NRCORES_OFFSET since POWER8NVL was added from Michael Ellerman
  - of: fix autoloading due to broken modalias with no 'compatible' from Wolfram Sang
  - radix: Fix always false comparison against MMU_NO_CONTEXT from Aneesh Kumar K.V
  - hash: Compute the segment size correctly for ISA 3.0 from Aneesh Kumar K.V
  - nohash: Fix build break with 64K pages from Michael Ellerman
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Merge tag 'powerpc-4.7-3Michael Ellerman:' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux

Pull powerpc fixes from
 - ptrace: Fix out of bounds array access warning from Khem Raj
 - pseries: Fix PCI config address for DDW from Gavin Shan
 - pseries: Fix IBM_ARCH_VEC_NRCORES_OFFSET since POWER8NVL was added
   from Michael Ellerman
 - of: fix autoloading due to broken modalias with no 'compatible' from
   Wolfram Sang
 - radix: Fix always false comparison against MMU_NO_CONTEXT from Aneesh
   Kumar K.V
 - hash: Compute the segment size correctly for ISA 3.0 from Aneesh
   Kumar K.V
 - nohash: Fix build break with 64K pages from Michael Ellerman

* tag 'powerpc-4.7-3' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
  powerpc/nohash: Fix build break with 64K pages
  powerpc/mm/hash: Compute the segment size correctly for ISA 3.0
  powerpc/mm/radix: Fix always false comparison against MMU_NO_CONTEXT
  of: fix autoloading due to broken modalias with no 'compatible'
  powerpc/pseries: Fix IBM_ARCH_VEC_NRCORES_OFFSET since POWER8NVL was added
  powerpc/pseries: Fix PCI config address for DDW
  powerpc/ptrace: Fix out of bounds array access warning
This commit is contained in:
Linus Torvalds 2016-06-10 12:23:49 -07:00
commit ccf55f73a6
7 changed files with 16 additions and 12 deletions

View File

@ -172,7 +172,7 @@ static inline pgtable_t pte_alloc_one(struct mm_struct *mm,
static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
{ {
pte_fragment_fre((unsigned long *)pte, 1); pte_fragment_free((unsigned long *)pte, 1);
} }
static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage) static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage)

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@ -719,7 +719,7 @@ unsigned char ibm_architecture_vec[] = {
* must match by the macro below. Update the definition if * must match by the macro below. Update the definition if
* the structure layout changes. * the structure layout changes.
*/ */
#define IBM_ARCH_VEC_NRCORES_OFFSET 125 #define IBM_ARCH_VEC_NRCORES_OFFSET 133
W(NR_CPUS), /* number of cores supported */ W(NR_CPUS), /* number of cores supported */
0, 0,
0, 0,

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@ -377,7 +377,7 @@ static int fpr_get(struct task_struct *target, const struct user_regset *regset,
#else #else
BUILD_BUG_ON(offsetof(struct thread_fp_state, fpscr) != BUILD_BUG_ON(offsetof(struct thread_fp_state, fpscr) !=
offsetof(struct thread_fp_state, fpr[32][0])); offsetof(struct thread_fp_state, fpr[32]));
return user_regset_copyout(&pos, &count, &kbuf, &ubuf, return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
&target->thread.fp_state, 0, -1); &target->thread.fp_state, 0, -1);
@ -405,7 +405,7 @@ static int fpr_set(struct task_struct *target, const struct user_regset *regset,
return 0; return 0;
#else #else
BUILD_BUG_ON(offsetof(struct thread_fp_state, fpscr) != BUILD_BUG_ON(offsetof(struct thread_fp_state, fpscr) !=
offsetof(struct thread_fp_state, fpr[32][0])); offsetof(struct thread_fp_state, fpr[32]));
return user_regset_copyin(&pos, &count, &kbuf, &ubuf, return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
&target->thread.fp_state, 0, -1); &target->thread.fp_state, 0, -1);

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@ -550,7 +550,11 @@ static void hpte_decode(struct hash_pte *hpte, unsigned long slot,
} }
} }
/* This works for all page sizes, and for 256M and 1T segments */ /* This works for all page sizes, and for 256M and 1T segments */
*ssize = hpte_v >> HPTE_V_SSIZE_SHIFT; if (cpu_has_feature(CPU_FTR_ARCH_300))
*ssize = hpte_r >> HPTE_R_3_0_SSIZE_SHIFT;
else
*ssize = hpte_v >> HPTE_V_SSIZE_SHIFT;
shift = mmu_psize_defs[size].shift; shift = mmu_psize_defs[size].shift;
avpn = (HPTE_V_AVPN_VAL(hpte_v) & ~mmu_psize_defs[size].avpnm); avpn = (HPTE_V_AVPN_VAL(hpte_v) & ~mmu_psize_defs[size].avpnm);

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@ -117,7 +117,7 @@ static inline void _tlbie_va(unsigned long va, unsigned long pid,
*/ */
void radix__local_flush_tlb_mm(struct mm_struct *mm) void radix__local_flush_tlb_mm(struct mm_struct *mm)
{ {
unsigned int pid; unsigned long pid;
preempt_disable(); preempt_disable();
pid = mm->context.id; pid = mm->context.id;
@ -130,7 +130,7 @@ EXPORT_SYMBOL(radix__local_flush_tlb_mm);
void radix___local_flush_tlb_page(struct mm_struct *mm, unsigned long vmaddr, void radix___local_flush_tlb_page(struct mm_struct *mm, unsigned long vmaddr,
unsigned long ap, int nid) unsigned long ap, int nid)
{ {
unsigned int pid; unsigned long pid;
preempt_disable(); preempt_disable();
pid = mm ? mm->context.id : 0; pid = mm ? mm->context.id : 0;
@ -160,7 +160,7 @@ static int mm_is_core_local(struct mm_struct *mm)
void radix__flush_tlb_mm(struct mm_struct *mm) void radix__flush_tlb_mm(struct mm_struct *mm)
{ {
unsigned int pid; unsigned long pid;
preempt_disable(); preempt_disable();
pid = mm->context.id; pid = mm->context.id;
@ -185,7 +185,7 @@ EXPORT_SYMBOL(radix__flush_tlb_mm);
void radix___flush_tlb_page(struct mm_struct *mm, unsigned long vmaddr, void radix___flush_tlb_page(struct mm_struct *mm, unsigned long vmaddr,
unsigned long ap, int nid) unsigned long ap, int nid)
{ {
unsigned int pid; unsigned long pid;
preempt_disable(); preempt_disable();
pid = mm ? mm->context.id : 0; pid = mm ? mm->context.id : 0;

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@ -927,7 +927,7 @@ static int query_ddw(struct pci_dev *dev, const u32 *ddw_avail,
dn = pci_device_to_OF_node(dev); dn = pci_device_to_OF_node(dev);
pdn = PCI_DN(dn); pdn = PCI_DN(dn);
buid = pdn->phb->buid; buid = pdn->phb->buid;
cfg_addr = (pdn->busno << 8) | pdn->devfn; cfg_addr = ((pdn->busno << 16) | (pdn->devfn << 8));
ret = rtas_call(ddw_avail[0], 3, 5, (u32 *)query, ret = rtas_call(ddw_avail[0], 3, 5, (u32 *)query,
cfg_addr, BUID_HI(buid), BUID_LO(buid)); cfg_addr, BUID_HI(buid), BUID_LO(buid));
@ -956,7 +956,7 @@ static int create_ddw(struct pci_dev *dev, const u32 *ddw_avail,
dn = pci_device_to_OF_node(dev); dn = pci_device_to_OF_node(dev);
pdn = PCI_DN(dn); pdn = PCI_DN(dn);
buid = pdn->phb->buid; buid = pdn->phb->buid;
cfg_addr = (pdn->busno << 8) | pdn->devfn; cfg_addr = ((pdn->busno << 16) | (pdn->devfn << 8));
do { do {
/* extra outputs are LIOBN and dma-addr (hi, lo) */ /* extra outputs are LIOBN and dma-addr (hi, lo) */

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@ -384,7 +384,7 @@ static void do_of_entry_multi(void *symval, struct module *mod)
len = sprintf(alias, "of:N%sT%s", (*name)[0] ? *name : "*", len = sprintf(alias, "of:N%sT%s", (*name)[0] ? *name : "*",
(*type)[0] ? *type : "*"); (*type)[0] ? *type : "*");
if (compatible[0]) if ((*compatible)[0])
sprintf(&alias[len], "%sC%s", (*type)[0] ? "*" : "", sprintf(&alias[len], "%sC%s", (*type)[0] ? "*" : "",
*compatible); *compatible);