RISC-V: KVM: Implement VCPU interrupts and requests handling
This patch implements VCPU interrupts and requests which are both asynchronous events. The VCPU interrupts can be set/unset using KVM_INTERRUPT ioctl from user-space. In future, the in-kernel IRQCHIP emulation will use kvm_riscv_vcpu_set_interrupt() and kvm_riscv_vcpu_unset_interrupt() functions to set/unset VCPU interrupts. Important VCPU requests implemented by this patch are: KVM_REQ_SLEEP - set whenever VCPU itself goes to sleep state KVM_REQ_VCPU_RESET - set whenever VCPU reset is requested The WFI trap-n-emulate (added later) will use KVM_REQ_SLEEP request and kvm_riscv_vcpu_has_interrupt() function. The KVM_REQ_VCPU_RESET request will be used by SBI emulation (added later) to power-up a VCPU in power-off state. The user-space can use the GET_MPSTATE/SET_MPSTATE ioctls to get/set power state of a VCPU. Signed-off-by: Anup Patel <anup.patel@wdc.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Alexander Graf <graf@amazon.com> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
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@ -127,6 +127,21 @@ struct kvm_vcpu_arch {
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/* CPU CSR context upon Guest VCPU reset */
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struct kvm_vcpu_csr guest_reset_csr;
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/*
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* VCPU interrupts
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*
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* We have a lockless approach for tracking pending VCPU interrupts
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* implemented using atomic bitops. The irqs_pending bitmap represent
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* pending interrupts whereas irqs_pending_mask represent bits changed
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* in irqs_pending. Our approach is modeled around multiple producer
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* and single consumer problem where the consumer is the VCPU itself.
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*/
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unsigned long irqs_pending;
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unsigned long irqs_pending_mask;
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/* VCPU power-off state */
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bool power_off;
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/* Don't run the VCPU (blocked) */
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bool pause;
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@ -150,4 +165,12 @@ int kvm_riscv_vcpu_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
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static inline void __kvm_riscv_switch_to(struct kvm_vcpu_arch *vcpu_arch) {}
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int kvm_riscv_vcpu_set_interrupt(struct kvm_vcpu *vcpu, unsigned int irq);
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int kvm_riscv_vcpu_unset_interrupt(struct kvm_vcpu *vcpu, unsigned int irq);
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void kvm_riscv_vcpu_flush_interrupts(struct kvm_vcpu *vcpu);
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void kvm_riscv_vcpu_sync_interrupts(struct kvm_vcpu *vcpu);
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bool kvm_riscv_vcpu_has_interrupts(struct kvm_vcpu *vcpu, unsigned long mask);
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void kvm_riscv_vcpu_power_off(struct kvm_vcpu *vcpu);
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void kvm_riscv_vcpu_power_on(struct kvm_vcpu *vcpu);
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#endif /* __RISCV_KVM_HOST_H__ */
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@ -18,6 +18,9 @@
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#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
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#define KVM_INTERRUPT_SET -1U
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#define KVM_INTERRUPT_UNSET -2U
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/* for KVM_GET_REGS and KVM_SET_REGS */
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struct kvm_regs {
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};
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@ -11,6 +11,7 @@
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#include <linux/err.h>
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#include <linux/kdebug.h>
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#include <linux/module.h>
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#include <linux/percpu.h>
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#include <linux/uaccess.h>
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#include <linux/vmalloc.h>
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#include <linux/sched/signal.h>
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@ -57,6 +58,9 @@ static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu)
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memcpy(csr, reset_csr, sizeof(*csr));
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memcpy(cntx, reset_cntx, sizeof(*cntx));
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WRITE_ONCE(vcpu->arch.irqs_pending, 0);
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WRITE_ONCE(vcpu->arch.irqs_pending_mask, 0);
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}
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int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
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@ -100,8 +104,7 @@ void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
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int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
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{
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/* TODO: */
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return 0;
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return kvm_riscv_vcpu_has_interrupts(vcpu, 1UL << IRQ_VS_TIMER);
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}
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void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu)
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@ -114,20 +117,18 @@ void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu)
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int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
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{
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/* TODO: */
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return 0;
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return (kvm_riscv_vcpu_has_interrupts(vcpu, -1UL) &&
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!vcpu->arch.power_off && !vcpu->arch.pause);
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}
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int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
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{
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/* TODO: */
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return 0;
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return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
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}
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bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
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{
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/* TODO: */
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return false;
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return (vcpu->arch.guest_context.sstatus & SR_SPP) ? true : false;
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}
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vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
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@ -138,7 +139,21 @@ vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
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long kvm_arch_vcpu_async_ioctl(struct file *filp,
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unsigned int ioctl, unsigned long arg)
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{
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/* TODO; */
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struct kvm_vcpu *vcpu = filp->private_data;
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void __user *argp = (void __user *)arg;
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if (ioctl == KVM_INTERRUPT) {
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struct kvm_interrupt irq;
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if (copy_from_user(&irq, argp, sizeof(irq)))
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return -EFAULT;
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if (irq.irq == KVM_INTERRUPT_SET)
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return kvm_riscv_vcpu_set_interrupt(vcpu, IRQ_VS_EXT);
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else
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return kvm_riscv_vcpu_unset_interrupt(vcpu, IRQ_VS_EXT);
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}
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return -ENOIOCTLCMD;
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}
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@ -187,18 +202,123 @@ int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
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return -EINVAL;
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}
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void kvm_riscv_vcpu_flush_interrupts(struct kvm_vcpu *vcpu)
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{
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struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr;
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unsigned long mask, val;
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if (READ_ONCE(vcpu->arch.irqs_pending_mask)) {
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mask = xchg_acquire(&vcpu->arch.irqs_pending_mask, 0);
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val = READ_ONCE(vcpu->arch.irqs_pending) & mask;
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csr->hvip &= ~mask;
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csr->hvip |= val;
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}
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}
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void kvm_riscv_vcpu_sync_interrupts(struct kvm_vcpu *vcpu)
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{
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unsigned long hvip;
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struct kvm_vcpu_arch *v = &vcpu->arch;
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struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr;
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/* Read current HVIP and VSIE CSRs */
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csr->vsie = csr_read(CSR_VSIE);
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/* Sync-up HVIP.VSSIP bit changes does by Guest */
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hvip = csr_read(CSR_HVIP);
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if ((csr->hvip ^ hvip) & (1UL << IRQ_VS_SOFT)) {
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if (hvip & (1UL << IRQ_VS_SOFT)) {
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if (!test_and_set_bit(IRQ_VS_SOFT,
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&v->irqs_pending_mask))
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set_bit(IRQ_VS_SOFT, &v->irqs_pending);
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} else {
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if (!test_and_set_bit(IRQ_VS_SOFT,
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&v->irqs_pending_mask))
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clear_bit(IRQ_VS_SOFT, &v->irqs_pending);
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}
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}
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}
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int kvm_riscv_vcpu_set_interrupt(struct kvm_vcpu *vcpu, unsigned int irq)
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{
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if (irq != IRQ_VS_SOFT &&
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irq != IRQ_VS_TIMER &&
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irq != IRQ_VS_EXT)
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return -EINVAL;
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set_bit(irq, &vcpu->arch.irqs_pending);
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smp_mb__before_atomic();
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set_bit(irq, &vcpu->arch.irqs_pending_mask);
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kvm_vcpu_kick(vcpu);
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return 0;
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}
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int kvm_riscv_vcpu_unset_interrupt(struct kvm_vcpu *vcpu, unsigned int irq)
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{
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if (irq != IRQ_VS_SOFT &&
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irq != IRQ_VS_TIMER &&
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irq != IRQ_VS_EXT)
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return -EINVAL;
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clear_bit(irq, &vcpu->arch.irqs_pending);
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smp_mb__before_atomic();
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set_bit(irq, &vcpu->arch.irqs_pending_mask);
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return 0;
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}
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bool kvm_riscv_vcpu_has_interrupts(struct kvm_vcpu *vcpu, unsigned long mask)
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{
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unsigned long ie = ((vcpu->arch.guest_csr.vsie & VSIP_VALID_MASK)
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<< VSIP_TO_HVIP_SHIFT) & mask;
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return (READ_ONCE(vcpu->arch.irqs_pending) & ie) ? true : false;
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}
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void kvm_riscv_vcpu_power_off(struct kvm_vcpu *vcpu)
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{
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vcpu->arch.power_off = true;
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kvm_make_request(KVM_REQ_SLEEP, vcpu);
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kvm_vcpu_kick(vcpu);
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}
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void kvm_riscv_vcpu_power_on(struct kvm_vcpu *vcpu)
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{
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vcpu->arch.power_off = false;
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kvm_vcpu_wake_up(vcpu);
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}
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int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
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struct kvm_mp_state *mp_state)
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{
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/* TODO: */
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if (vcpu->arch.power_off)
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mp_state->mp_state = KVM_MP_STATE_STOPPED;
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else
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mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
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return 0;
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}
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int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
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struct kvm_mp_state *mp_state)
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{
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/* TODO: */
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return 0;
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int ret = 0;
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switch (mp_state->mp_state) {
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case KVM_MP_STATE_RUNNABLE:
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vcpu->arch.power_off = false;
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break;
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case KVM_MP_STATE_STOPPED:
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kvm_riscv_vcpu_power_off(vcpu);
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break;
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default:
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ret = -EINVAL;
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}
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return ret;
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}
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int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
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@ -222,7 +342,33 @@ void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
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static void kvm_riscv_check_vcpu_requests(struct kvm_vcpu *vcpu)
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{
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/* TODO: */
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struct rcuwait *wait = kvm_arch_vcpu_get_wait(vcpu);
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if (kvm_request_pending(vcpu)) {
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if (kvm_check_request(KVM_REQ_SLEEP, vcpu)) {
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rcuwait_wait_event(wait,
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(!vcpu->arch.power_off) && (!vcpu->arch.pause),
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TASK_INTERRUPTIBLE);
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if (vcpu->arch.power_off || vcpu->arch.pause) {
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/*
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* Awaken to handle a signal, request to
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* sleep again later.
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*/
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kvm_make_request(KVM_REQ_SLEEP, vcpu);
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}
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}
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if (kvm_check_request(KVM_REQ_VCPU_RESET, vcpu))
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kvm_riscv_reset_vcpu(vcpu);
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}
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}
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static void kvm_riscv_update_hvip(struct kvm_vcpu *vcpu)
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{
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struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr;
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csr_write(CSR_HVIP, csr->hvip);
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}
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int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
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srcu_read_unlock(&vcpu->kvm->srcu, vcpu->arch.srcu_idx);
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smp_mb__after_srcu_read_unlock();
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/*
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* We might have got VCPU interrupts updated asynchronously
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* so update it in HW.
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*/
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kvm_riscv_vcpu_flush_interrupts(vcpu);
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/* Update HVIP CSR for current CPU */
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kvm_riscv_update_hvip(vcpu);
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if (ret <= 0 ||
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kvm_request_pending(vcpu)) {
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vcpu->mode = OUTSIDE_GUEST_MODE;
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trap.htval = csr_read(CSR_HTVAL);
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trap.htinst = csr_read(CSR_HTINST);
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/* Syncup interrupts state with HW */
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kvm_riscv_vcpu_sync_interrupts(vcpu);
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/*
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* We may have taken a host interrupt in VS/VU-mode (i.e.
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* while executing the guest). This interrupt is still
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