staging: xillybus: Add sanity check in interrupt handler

Data arriving from the hardware is verified prior to its use. The lack of
this check has never been reported to cause a problem, but it's necessary
nevertheless.

Signed-off-by: Eli Billauer <eli.billauer@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Eli Billauer 2014-07-05 12:45:07 +03:00 committed by Greg Kroah-Hartman
parent 1f765d9f4c
commit cc6289fa14
1 changed files with 6 additions and 0 deletions

View File

@ -267,6 +267,12 @@ irqreturn_t xillybus_isr(int irq, void *data)
break;
case XILLYMSG_OPCODE_FIFOEOF:
if ((msg_channel > ep->num_channels) ||
(msg_channel == 0) || (!msg_dir) ||
!ep->channels[msg_channel]->num_wr_buffers) {
malformed_message(ep, &buf[i]);
break;
}
channel = ep->channels[msg_channel];
spin_lock(&channel->wr_spinlock);
channel->wr_eof = msg_bufno;