drm/amd/display: fix a potential issue in DSC logic
[why] In compute dsc bandwidth range there is an uninitialized variable [how] Initialize the variable to the correct value. Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com> Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -826,10 +826,16 @@ bool dc_dsc_compute_bandwidth_range(
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struct dc_dsc_config config;
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get_dsc_enc_caps(dc, &dsc_enc_caps, timing->pix_clk_100hz);
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is_dsc_possible = setup_dsc_config(dsc_sink_caps,
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&dsc_enc_caps,
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0,
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timing, &config);
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is_dsc_possible = intersect_dsc_caps(dsc_sink_caps, &dsc_enc_caps,
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timing->pixel_encoding, &dsc_common_caps);
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if (is_dsc_possible)
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is_dsc_possible = setup_dsc_config(dsc_sink_caps,
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&dsc_enc_caps,
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0,
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timing, &config);
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if (is_dsc_possible)
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get_dsc_bandwidth_range(min_bpp, max_bpp, &dsc_common_caps, timing, range);
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