drm/amd/display: fix a potential issue in DSC logic

[why]
In compute dsc bandwidth range there is an uninitialized variable

[how]
Initialize the variable to the correct value.

Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Wenjing Liu 2019-04-25 12:11:50 -04:00 committed by Alex Deucher
parent e34fe1bba6
commit cba4d59c93
1 changed files with 10 additions and 4 deletions

View File

@ -826,10 +826,16 @@ bool dc_dsc_compute_bandwidth_range(
struct dc_dsc_config config;
get_dsc_enc_caps(dc, &dsc_enc_caps, timing->pix_clk_100hz);
is_dsc_possible = setup_dsc_config(dsc_sink_caps,
&dsc_enc_caps,
0,
timing, &config);
is_dsc_possible = intersect_dsc_caps(dsc_sink_caps, &dsc_enc_caps,
timing->pixel_encoding, &dsc_common_caps);
if (is_dsc_possible)
is_dsc_possible = setup_dsc_config(dsc_sink_caps,
&dsc_enc_caps,
0,
timing, &config);
if (is_dsc_possible)
get_dsc_bandwidth_range(min_bpp, max_bpp, &dsc_common_caps, timing, range);