x86: integrate do_boot_cpu
This is a very large patch, because it depends on a lot of auxiliary static functions. But they all have been modified to the point that they're sufficiently close now. So they're just merged in smpboot.c Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Glauber de Oliveira Costa
Ingo Molnar
parent
c70dcb7430
commit
cb3c8b9003
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@ -4,14 +4,42 @@
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#include <linux/sched.h>
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#include <linux/percpu.h>
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#include <linux/bootmem.h>
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#include <linux/err.h>
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#include <linux/nmi.h>
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#include <asm/desc.h>
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#include <asm/nmi.h>
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#include <asm/irq.h>
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#include <asm/smp.h>
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#include <asm/cpu.h>
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#include <asm/numa.h>
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#include <asm/pgtable.h>
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#include <asm/tlbflush.h>
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#include <asm/mtrr.h>
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#include <asm/nmi.h>
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#include <linux/mc146818rtc.h>
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#include <mach_apic.h>
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#include <mach_wakecpu.h>
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#include <smpboot_hooks.h>
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/* Store all idle threads, this can be reused instead of creating
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* a new thread. Also avoids complicated thread destroy functionality
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* for idle threads.
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*/
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#ifdef CONFIG_HOTPLUG_CPU
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/*
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* Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
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* removed after init for !CONFIG_HOTPLUG_CPU.
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*/
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static DEFINE_PER_CPU(struct task_struct *, idle_thread_array);
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#define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
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#define set_idle_for_cpu(x, p) (per_cpu(idle_thread_array, x) = (p))
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#else
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struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
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#define get_idle_for_cpu(x) (idle_thread_array[(x)])
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#define set_idle_for_cpu(x, p) (idle_thread_array[(x)] = (p))
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#endif
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/* Number of siblings per CPU package */
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int smp_num_siblings = 1;
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@ -41,6 +69,8 @@ EXPORT_PER_CPU_SYMBOL(cpu_core_map);
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DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info);
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EXPORT_PER_CPU_SYMBOL(cpu_info);
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static atomic_t init_deasserted;
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/* ready for x86_64, no harm for x86, since it will overwrite after alloc */
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unsigned char *trampoline_base = __va(SMP_TRAMPOLINE_BASE);
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@ -110,6 +140,96 @@ void unmap_cpu_to_logical_apicid(int cpu)
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#define map_cpu_to_logical_apicid() do {} while (0)
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#endif
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/*
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* Report back to the Boot Processor.
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* Running on AP.
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*/
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void __cpuinit smp_callin(void)
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{
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int cpuid, phys_id;
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unsigned long timeout;
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/*
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* If waken up by an INIT in an 82489DX configuration
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* we may get here before an INIT-deassert IPI reaches
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* our local APIC. We have to wait for the IPI or we'll
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* lock up on an APIC access.
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*/
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wait_for_init_deassert(&init_deasserted);
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/*
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* (This works even if the APIC is not enabled.)
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*/
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phys_id = GET_APIC_ID(apic_read(APIC_ID));
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cpuid = smp_processor_id();
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if (cpu_isset(cpuid, cpu_callin_map)) {
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panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__,
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phys_id, cpuid);
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}
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Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
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/*
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* STARTUP IPIs are fragile beasts as they might sometimes
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* trigger some glue motherboard logic. Complete APIC bus
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* silence for 1 second, this overestimates the time the
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* boot CPU is spending to send the up to 2 STARTUP IPIs
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* by a factor of two. This should be enough.
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*/
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/*
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* Waiting 2s total for startup (udelay is not yet working)
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*/
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timeout = jiffies + 2*HZ;
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while (time_before(jiffies, timeout)) {
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/*
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* Has the boot CPU finished it's STARTUP sequence?
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*/
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if (cpu_isset(cpuid, cpu_callout_map))
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break;
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cpu_relax();
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}
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if (!time_before(jiffies, timeout)) {
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panic("%s: CPU%d started up but did not get a callout!\n",
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__func__, cpuid);
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}
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/*
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* the boot CPU has finished the init stage and is spinning
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* on callin_map until we finish. We are free to set up this
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* CPU, first the APIC. (this is probably redundant on most
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* boards)
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*/
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Dprintk("CALLIN, before setup_local_APIC().\n");
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smp_callin_clear_local_apic();
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setup_local_APIC();
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end_local_APIC_setup();
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map_cpu_to_logical_apicid();
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/*
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* Get our bogomips.
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*
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* Need to enable IRQs because it can take longer and then
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* the NMI watchdog might kill us.
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*/
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local_irq_enable();
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calibrate_delay();
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local_irq_disable();
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Dprintk("Stack at about %p\n", &cpuid);
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/*
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* Save our processor parameters
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*/
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smp_store_cpu_info(cpuid);
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/*
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* Allow the master to continue.
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*/
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cpu_set(cpuid, cpu_callin_map);
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}
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static void __cpuinit smp_apply_quirks(struct cpuinfo_x86 *c)
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{
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#ifdef CONFIG_X86_32
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@ -327,6 +447,474 @@ void impress_friends(void)
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Dprintk("Before bogocount - setting activated=1.\n");
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}
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static inline void __inquire_remote_apic(int apicid)
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{
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unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
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char *names[] = { "ID", "VERSION", "SPIV" };
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int timeout;
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u32 status;
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printk(KERN_INFO "Inquiring remote APIC #%d...\n", apicid);
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for (i = 0; i < ARRAY_SIZE(regs); i++) {
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printk(KERN_INFO "... APIC #%d %s: ", apicid, names[i]);
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/*
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* Wait for idle.
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*/
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status = safe_apic_wait_icr_idle();
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if (status)
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printk(KERN_CONT
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"a previous APIC delivery may have failed\n");
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apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
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apic_write_around(APIC_ICR, APIC_DM_REMRD | regs[i]);
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timeout = 0;
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do {
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udelay(100);
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status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
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} while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
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switch (status) {
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case APIC_ICR_RR_VALID:
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status = apic_read(APIC_RRR);
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printk(KERN_CONT "%08x\n", status);
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break;
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default:
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printk(KERN_CONT "failed\n");
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}
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}
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}
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#ifdef WAKE_SECONDARY_VIA_NMI
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/*
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* Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
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* INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
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* won't ... remember to clear down the APIC, etc later.
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*/
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static int __devinit
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wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
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{
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unsigned long send_status, accept_status = 0;
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int maxlvt;
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/* Target chip */
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apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(logical_apicid));
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/* Boot on the stack */
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/* Kick the second */
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apic_write_around(APIC_ICR, APIC_DM_NMI | APIC_DEST_LOGICAL);
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Dprintk("Waiting for send to finish...\n");
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send_status = safe_apic_wait_icr_idle();
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/*
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* Give the other CPU some time to accept the IPI.
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*/
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udelay(200);
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/*
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* Due to the Pentium erratum 3AP.
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*/
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maxlvt = lapic_get_maxlvt();
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if (maxlvt > 3) {
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apic_read_around(APIC_SPIV);
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apic_write(APIC_ESR, 0);
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}
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accept_status = (apic_read(APIC_ESR) & 0xEF);
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Dprintk("NMI sent.\n");
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if (send_status)
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printk(KERN_ERR "APIC never delivered???\n");
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if (accept_status)
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printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
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return (send_status | accept_status);
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}
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#endif /* WAKE_SECONDARY_VIA_NMI */
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extern void start_secondary(void *unused);
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#ifdef WAKE_SECONDARY_VIA_INIT
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static int __devinit
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wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
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{
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unsigned long send_status, accept_status = 0;
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int maxlvt, num_starts, j;
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/*
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* Be paranoid about clearing APIC errors.
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*/
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if (APIC_INTEGRATED(apic_version[phys_apicid])) {
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apic_read_around(APIC_SPIV);
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apic_write(APIC_ESR, 0);
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apic_read(APIC_ESR);
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}
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Dprintk("Asserting INIT.\n");
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/*
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* Turn INIT on target chip
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*/
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apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
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/*
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* Send IPI
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*/
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apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT
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| APIC_DM_INIT);
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Dprintk("Waiting for send to finish...\n");
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send_status = safe_apic_wait_icr_idle();
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mdelay(10);
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Dprintk("Deasserting INIT.\n");
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/* Target chip */
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apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
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/* Send IPI */
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apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);
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Dprintk("Waiting for send to finish...\n");
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send_status = safe_apic_wait_icr_idle();
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mb();
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atomic_set(&init_deasserted, 1);
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/*
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* Should we send STARTUP IPIs ?
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*
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* Determine this based on the APIC version.
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* If we don't have an integrated APIC, don't send the STARTUP IPIs.
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*/
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if (APIC_INTEGRATED(apic_version[phys_apicid]))
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num_starts = 2;
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else
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num_starts = 0;
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/*
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* Paravirt / VMI wants a startup IPI hook here to set up the
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* target processor state.
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*/
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startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
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#ifdef CONFIG_X86_64
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(unsigned long)init_rsp);
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#else
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(unsigned long)stack_start.sp);
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#endif
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/*
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* Run STARTUP IPI loop.
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*/
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Dprintk("#startup loops: %d.\n", num_starts);
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maxlvt = lapic_get_maxlvt();
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for (j = 1; j <= num_starts; j++) {
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Dprintk("Sending STARTUP #%d.\n", j);
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apic_read_around(APIC_SPIV);
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apic_write(APIC_ESR, 0);
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apic_read(APIC_ESR);
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Dprintk("After apic_write.\n");
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/*
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* STARTUP IPI
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*/
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/* Target chip */
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apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
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/* Boot on the stack */
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/* Kick the second */
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apic_write_around(APIC_ICR, APIC_DM_STARTUP
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| (start_eip >> 12));
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/*
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* Give the other CPU some time to accept the IPI.
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*/
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udelay(300);
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Dprintk("Startup point 1.\n");
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Dprintk("Waiting for send to finish...\n");
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send_status = safe_apic_wait_icr_idle();
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/*
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* Give the other CPU some time to accept the IPI.
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*/
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udelay(200);
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/*
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* Due to the Pentium erratum 3AP.
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*/
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if (maxlvt > 3) {
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apic_read_around(APIC_SPIV);
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apic_write(APIC_ESR, 0);
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}
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accept_status = (apic_read(APIC_ESR) & 0xEF);
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if (send_status || accept_status)
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break;
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}
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Dprintk("After Startup.\n");
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if (send_status)
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printk(KERN_ERR "APIC never delivered???\n");
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if (accept_status)
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printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
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return (send_status | accept_status);
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}
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#endif /* WAKE_SECONDARY_VIA_INIT */
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struct create_idle {
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struct work_struct work;
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struct task_struct *idle;
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struct completion done;
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int cpu;
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};
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static void __cpuinit do_fork_idle(struct work_struct *work)
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{
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struct create_idle *c_idle =
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container_of(work, struct create_idle, work);
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c_idle->idle = fork_idle(c_idle->cpu);
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complete(&c_idle->done);
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}
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static int __cpuinit do_boot_cpu(int apicid, int cpu)
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/*
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* NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
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* (ie clustered apic addressing mode), this is a LOGICAL apic ID.
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* Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu.
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*/
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{
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unsigned long boot_error = 0;
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int timeout;
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unsigned long start_ip;
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unsigned short nmi_high = 0, nmi_low = 0;
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struct create_idle c_idle = {
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.cpu = cpu,
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.done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
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};
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INIT_WORK(&c_idle.work, do_fork_idle);
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#ifdef CONFIG_X86_64
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/* allocate memory for gdts of secondary cpus. Hotplug is considered */
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if (!cpu_gdt_descr[cpu].address &&
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!(cpu_gdt_descr[cpu].address = get_zeroed_page(GFP_KERNEL))) {
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printk(KERN_ERR "Failed to allocate GDT for CPU %d\n", cpu);
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return -1;
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}
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/* Allocate node local memory for AP pdas */
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if (cpu_pda(cpu) == &boot_cpu_pda[cpu]) {
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struct x8664_pda *newpda, *pda;
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int node = cpu_to_node(cpu);
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pda = cpu_pda(cpu);
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newpda = kmalloc_node(sizeof(struct x8664_pda), GFP_ATOMIC,
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node);
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if (newpda) {
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memcpy(newpda, pda, sizeof(struct x8664_pda));
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cpu_pda(cpu) = newpda;
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} else
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printk(KERN_ERR
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"Could not allocate node local PDA for CPU %d on node %d\n",
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cpu, node);
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}
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#endif
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alternatives_smp_switch(1);
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c_idle.idle = get_idle_for_cpu(cpu);
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/*
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* We can't use kernel_thread since we must avoid to
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* reschedule the child.
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*/
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if (c_idle.idle) {
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c_idle.idle->thread.sp = (unsigned long) (((struct pt_regs *)
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(THREAD_SIZE + task_stack_page(c_idle.idle))) - 1);
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init_idle(c_idle.idle, cpu);
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goto do_rest;
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}
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if (!keventd_up() || current_is_keventd())
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c_idle.work.func(&c_idle.work);
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else {
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schedule_work(&c_idle.work);
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wait_for_completion(&c_idle.done);
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}
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if (IS_ERR(c_idle.idle)) {
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printk("failed fork for CPU %d\n", cpu);
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return PTR_ERR(c_idle.idle);
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}
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set_idle_for_cpu(cpu, c_idle.idle);
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do_rest:
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#ifdef CONFIG_X86_32
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per_cpu(current_task, cpu) = c_idle.idle;
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init_gdt(cpu);
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early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
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c_idle.idle->thread.ip = (unsigned long) start_secondary;
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/* Stack for startup_32 can be just as for start_secondary onwards */
|
||||
stack_start.sp = (void *) c_idle.idle->thread.sp;
|
||||
irq_ctx_init(cpu);
|
||||
#else
|
||||
cpu_pda(cpu)->pcurrent = c_idle.idle;
|
||||
init_rsp = c_idle.idle->thread.sp;
|
||||
load_sp0(&per_cpu(init_tss, cpu), &c_idle.idle->thread);
|
||||
initial_code = (unsigned long)start_secondary;
|
||||
clear_tsk_thread_flag(c_idle.idle, TIF_FORK);
|
||||
#endif
|
||||
|
||||
/* start_ip had better be page-aligned! */
|
||||
start_ip = setup_trampoline();
|
||||
|
||||
/* So we see what's up */
|
||||
printk(KERN_INFO "Booting processor %d/%d ip %lx\n",
|
||||
cpu, apicid, start_ip);
|
||||
|
||||
/*
|
||||
* This grunge runs the startup process for
|
||||
* the targeted processor.
|
||||
*/
|
||||
|
||||
atomic_set(&init_deasserted, 0);
|
||||
|
||||
Dprintk("Setting warm reset code and vector.\n");
|
||||
|
||||
store_NMI_vector(&nmi_high, &nmi_low);
|
||||
|
||||
smpboot_setup_warm_reset_vector(start_ip);
|
||||
/*
|
||||
* Be paranoid about clearing APIC errors.
|
||||
*/
|
||||
apic_write(APIC_ESR, 0);
|
||||
apic_read(APIC_ESR);
|
||||
|
||||
|
||||
/*
|
||||
* Starting actual IPI sequence...
|
||||
*/
|
||||
boot_error = wakeup_secondary_cpu(apicid, start_ip);
|
||||
|
||||
if (!boot_error) {
|
||||
/*
|
||||
* allow APs to start initializing.
|
||||
*/
|
||||
Dprintk("Before Callout %d.\n", cpu);
|
||||
cpu_set(cpu, cpu_callout_map);
|
||||
Dprintk("After Callout %d.\n", cpu);
|
||||
|
||||
/*
|
||||
* Wait 5s total for a response
|
||||
*/
|
||||
for (timeout = 0; timeout < 50000; timeout++) {
|
||||
if (cpu_isset(cpu, cpu_callin_map))
|
||||
break; /* It has booted */
|
||||
udelay(100);
|
||||
}
|
||||
|
||||
if (cpu_isset(cpu, cpu_callin_map)) {
|
||||
/* number CPUs logically, starting from 1 (BSP is 0) */
|
||||
Dprintk("OK.\n");
|
||||
printk(KERN_INFO "CPU%d: ", cpu);
|
||||
print_cpu_info(&cpu_data(cpu));
|
||||
Dprintk("CPU has booted.\n");
|
||||
} else {
|
||||
boot_error = 1;
|
||||
if (*((volatile unsigned char *)trampoline_base)
|
||||
== 0xA5)
|
||||
/* trampoline started but...? */
|
||||
printk(KERN_ERR "Stuck ??\n");
|
||||
else
|
||||
/* trampoline code not run */
|
||||
printk(KERN_ERR "Not responding.\n");
|
||||
inquire_remote_apic(apicid);
|
||||
}
|
||||
}
|
||||
|
||||
if (boot_error) {
|
||||
/* Try to put things back the way they were before ... */
|
||||
unmap_cpu_to_logical_apicid(cpu);
|
||||
#ifdef CONFIG_X86_64
|
||||
clear_node_cpumask(cpu); /* was set by numa_add_cpu */
|
||||
#endif
|
||||
cpu_clear(cpu, cpu_callout_map); /* was set by do_boot_cpu() */
|
||||
cpu_clear(cpu, cpu_initialized); /* was set by cpu_init() */
|
||||
cpu_clear(cpu, cpu_possible_map);
|
||||
cpu_clear(cpu, cpu_present_map);
|
||||
per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
|
||||
}
|
||||
|
||||
/* mark "stuck" area as not stuck */
|
||||
*((volatile unsigned long *)trampoline_base) = 0;
|
||||
|
||||
return boot_error;
|
||||
}
|
||||
|
||||
int __cpuinit native_cpu_up(unsigned int cpu)
|
||||
{
|
||||
int apicid = cpu_present_to_apicid(cpu);
|
||||
unsigned long flags;
|
||||
int err;
|
||||
|
||||
WARN_ON(irqs_disabled());
|
||||
|
||||
Dprintk("++++++++++++++++++++=_---CPU UP %u\n", cpu);
|
||||
|
||||
if (apicid == BAD_APICID || apicid == boot_cpu_physical_apicid ||
|
||||
!physid_isset(apicid, phys_cpu_present_map)) {
|
||||
printk(KERN_ERR "%s: bad cpu %d\n", __func__, cpu);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/*
|
||||
* Already booted CPU?
|
||||
*/
|
||||
if (cpu_isset(cpu, cpu_callin_map)) {
|
||||
Dprintk("do_boot_cpu %d Already started\n", cpu);
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
/*
|
||||
* Save current MTRR state in case it was changed since early boot
|
||||
* (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
|
||||
*/
|
||||
mtrr_save_state();
|
||||
|
||||
per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
|
||||
|
||||
#ifdef CONFIG_X86_32
|
||||
/* init low mem mapping */
|
||||
clone_pgd_range(swapper_pg_dir, swapper_pg_dir + USER_PGD_PTRS,
|
||||
min_t(unsigned long, KERNEL_PGD_PTRS, USER_PGD_PTRS));
|
||||
flush_tlb_all();
|
||||
#endif
|
||||
|
||||
err = do_boot_cpu(apicid, cpu);
|
||||
if (err < 0) {
|
||||
Dprintk("do_boot_cpu failed %d\n", err);
|
||||
return err;
|
||||
}
|
||||
|
||||
/*
|
||||
* Check TSC synchronization with the AP (keep irqs disabled
|
||||
* while doing so):
|
||||
*/
|
||||
local_irq_save(flags);
|
||||
check_tsc_sync_source(cpu);
|
||||
local_irq_restore(flags);
|
||||
|
||||
while (!cpu_isset(cpu, cpu_online_map)) {
|
||||
cpu_relax();
|
||||
touch_nmi_watchdog();
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_HOTPLUG_CPU
|
||||
void remove_siblinginfo(int cpu)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -80,114 +80,12 @@ extern void unmap_cpu_to_logical_apicid(int cpu);
|
|||
/* State of each CPU. */
|
||||
DEFINE_PER_CPU(int, cpu_state) = { 0 };
|
||||
|
||||
/* Store all idle threads, this can be reused instead of creating
|
||||
* a new thread. Also avoids complicated thread destroy functionality
|
||||
* for idle threads.
|
||||
*/
|
||||
#ifdef CONFIG_HOTPLUG_CPU
|
||||
/*
|
||||
* Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
|
||||
* removed after init for !CONFIG_HOTPLUG_CPU.
|
||||
*/
|
||||
static DEFINE_PER_CPU(struct task_struct *, idle_thread_array);
|
||||
#define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
|
||||
#define set_idle_for_cpu(x, p) (per_cpu(idle_thread_array, x) = (p))
|
||||
#else
|
||||
struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
|
||||
#define get_idle_for_cpu(x) (idle_thread_array[(x)])
|
||||
#define set_idle_for_cpu(x, p) (idle_thread_array[(x)] = (p))
|
||||
#endif
|
||||
|
||||
static atomic_t init_deasserted;
|
||||
|
||||
static void __cpuinit smp_callin(void)
|
||||
{
|
||||
int cpuid, phys_id;
|
||||
unsigned long timeout;
|
||||
|
||||
/*
|
||||
* If waken up by an INIT in an 82489DX configuration
|
||||
* we may get here before an INIT-deassert IPI reaches
|
||||
* our local APIC. We have to wait for the IPI or we'll
|
||||
* lock up on an APIC access.
|
||||
*/
|
||||
wait_for_init_deassert(&init_deasserted);
|
||||
|
||||
/*
|
||||
* (This works even if the APIC is not enabled.)
|
||||
*/
|
||||
phys_id = GET_APIC_ID(apic_read(APIC_ID));
|
||||
cpuid = smp_processor_id();
|
||||
if (cpu_isset(cpuid, cpu_callin_map)) {
|
||||
printk("huh, phys CPU#%d, CPU#%d already present??\n",
|
||||
phys_id, cpuid);
|
||||
BUG();
|
||||
}
|
||||
Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
|
||||
|
||||
/*
|
||||
* STARTUP IPIs are fragile beasts as they might sometimes
|
||||
* trigger some glue motherboard logic. Complete APIC bus
|
||||
* silence for 1 second, this overestimates the time the
|
||||
* boot CPU is spending to send the up to 2 STARTUP IPIs
|
||||
* by a factor of two. This should be enough.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Waiting 2s total for startup (udelay is not yet working)
|
||||
*/
|
||||
timeout = jiffies + 2*HZ;
|
||||
while (time_before(jiffies, timeout)) {
|
||||
/*
|
||||
* Has the boot CPU finished it's STARTUP sequence?
|
||||
*/
|
||||
if (cpu_isset(cpuid, cpu_callout_map))
|
||||
break;
|
||||
cpu_relax();
|
||||
}
|
||||
|
||||
if (!time_before(jiffies, timeout)) {
|
||||
printk("BUG: CPU%d started up but did not get a callout!\n",
|
||||
cpuid);
|
||||
BUG();
|
||||
}
|
||||
|
||||
/*
|
||||
* the boot CPU has finished the init stage and is spinning
|
||||
* on callin_map until we finish. We are free to set up this
|
||||
* CPU, first the APIC. (this is probably redundant on most
|
||||
* boards)
|
||||
*/
|
||||
|
||||
Dprintk("CALLIN, before setup_local_APIC().\n");
|
||||
smp_callin_clear_local_apic();
|
||||
setup_local_APIC();
|
||||
end_local_APIC_setup();
|
||||
map_cpu_to_logical_apicid();
|
||||
|
||||
/*
|
||||
* Get our bogomips.
|
||||
*/
|
||||
local_irq_enable();
|
||||
calibrate_delay();
|
||||
local_irq_disable();
|
||||
Dprintk("Stack at about %p\n",&cpuid);
|
||||
|
||||
/*
|
||||
* Save our processor parameters
|
||||
*/
|
||||
smp_store_cpu_info(cpuid);
|
||||
|
||||
/*
|
||||
* Allow the master to continue.
|
||||
*/
|
||||
cpu_set(cpuid, cpu_callin_map);
|
||||
}
|
||||
extern void smp_callin(void);
|
||||
|
||||
/*
|
||||
* Activate a secondary processor.
|
||||
*/
|
||||
static void __cpuinit start_secondary(void *unused)
|
||||
void __cpuinit start_secondary(void *unused)
|
||||
{
|
||||
/*
|
||||
* Don't put *anything* before cpu_init(), SMP booting is too
|
||||
|
|
@ -257,373 +155,6 @@ void __devinit initialize_secondary(void)
|
|||
:"m" (current->thread.sp),"m" (current->thread.ip));
|
||||
}
|
||||
|
||||
static inline void __inquire_remote_apic(int apicid)
|
||||
{
|
||||
unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
|
||||
char *names[] = { "ID", "VERSION", "SPIV" };
|
||||
int timeout;
|
||||
u32 status;
|
||||
|
||||
printk(KERN_INFO "Inquiring remote APIC #%d...\n", apicid);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(regs); i++) {
|
||||
printk(KERN_INFO "... APIC #%d %s: ", apicid, names[i]);
|
||||
|
||||
/*
|
||||
* Wait for idle.
|
||||
*/
|
||||
status = safe_apic_wait_icr_idle();
|
||||
if (status)
|
||||
printk(KERN_CONT
|
||||
"a previous APIC delivery may have failed\n");
|
||||
|
||||
apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
|
||||
apic_write_around(APIC_ICR, APIC_DM_REMRD | regs[i]);
|
||||
|
||||
timeout = 0;
|
||||
do {
|
||||
udelay(100);
|
||||
status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
|
||||
} while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
|
||||
|
||||
switch (status) {
|
||||
case APIC_ICR_RR_VALID:
|
||||
status = apic_read(APIC_RRR);
|
||||
printk(KERN_CONT "%08x\n", status);
|
||||
break;
|
||||
default:
|
||||
printk(KERN_CONT "failed\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef WAKE_SECONDARY_VIA_NMI
|
||||
/*
|
||||
* Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
|
||||
* INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
|
||||
* won't ... remember to clear down the APIC, etc later.
|
||||
*/
|
||||
static int __devinit
|
||||
wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
|
||||
{
|
||||
unsigned long send_status, accept_status = 0;
|
||||
int maxlvt;
|
||||
|
||||
/* Target chip */
|
||||
apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(logical_apicid));
|
||||
|
||||
/* Boot on the stack */
|
||||
/* Kick the second */
|
||||
apic_write_around(APIC_ICR, APIC_DM_NMI | APIC_DEST_LOGICAL);
|
||||
|
||||
Dprintk("Waiting for send to finish...\n");
|
||||
send_status = safe_apic_wait_icr_idle();
|
||||
|
||||
/*
|
||||
* Give the other CPU some time to accept the IPI.
|
||||
*/
|
||||
udelay(200);
|
||||
/*
|
||||
* Due to the Pentium erratum 3AP.
|
||||
*/
|
||||
maxlvt = lapic_get_maxlvt();
|
||||
if (maxlvt > 3) {
|
||||
apic_read_around(APIC_SPIV);
|
||||
apic_write(APIC_ESR, 0);
|
||||
}
|
||||
accept_status = (apic_read(APIC_ESR) & 0xEF);
|
||||
Dprintk("NMI sent.\n");
|
||||
|
||||
if (send_status)
|
||||
printk("APIC never delivered???\n");
|
||||
if (accept_status)
|
||||
printk("APIC delivery error (%lx).\n", accept_status);
|
||||
|
||||
return (send_status | accept_status);
|
||||
}
|
||||
#endif /* WAKE_SECONDARY_VIA_NMI */
|
||||
|
||||
#ifdef WAKE_SECONDARY_VIA_INIT
|
||||
static int __devinit
|
||||
wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
|
||||
{
|
||||
unsigned long send_status, accept_status = 0;
|
||||
int maxlvt, num_starts, j;
|
||||
|
||||
/*
|
||||
* Be paranoid about clearing APIC errors.
|
||||
*/
|
||||
if (APIC_INTEGRATED(apic_version[phys_apicid])) {
|
||||
apic_read_around(APIC_SPIV);
|
||||
apic_write(APIC_ESR, 0);
|
||||
apic_read(APIC_ESR);
|
||||
}
|
||||
|
||||
Dprintk("Asserting INIT.\n");
|
||||
|
||||
/*
|
||||
* Turn INIT on target chip
|
||||
*/
|
||||
apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
|
||||
|
||||
/*
|
||||
* Send IPI
|
||||
*/
|
||||
apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT
|
||||
| APIC_DM_INIT);
|
||||
|
||||
Dprintk("Waiting for send to finish...\n");
|
||||
send_status = safe_apic_wait_icr_idle();
|
||||
|
||||
mdelay(10);
|
||||
|
||||
Dprintk("Deasserting INIT.\n");
|
||||
|
||||
/* Target chip */
|
||||
apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
|
||||
|
||||
/* Send IPI */
|
||||
apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);
|
||||
|
||||
Dprintk("Waiting for send to finish...\n");
|
||||
send_status = safe_apic_wait_icr_idle();
|
||||
|
||||
mb();
|
||||
atomic_set(&init_deasserted, 1);
|
||||
|
||||
/*
|
||||
* Should we send STARTUP IPIs ?
|
||||
*
|
||||
* Determine this based on the APIC version.
|
||||
* If we don't have an integrated APIC, don't send the STARTUP IPIs.
|
||||
*/
|
||||
if (APIC_INTEGRATED(apic_version[phys_apicid]))
|
||||
num_starts = 2;
|
||||
else
|
||||
num_starts = 0;
|
||||
|
||||
/*
|
||||
* Paravirt / VMI wants a startup IPI hook here to set up the
|
||||
* target processor state.
|
||||
*/
|
||||
startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
|
||||
(unsigned long) stack_start.sp);
|
||||
|
||||
/*
|
||||
* Run STARTUP IPI loop.
|
||||
*/
|
||||
Dprintk("#startup loops: %d.\n", num_starts);
|
||||
|
||||
maxlvt = lapic_get_maxlvt();
|
||||
|
||||
for (j = 1; j <= num_starts; j++) {
|
||||
Dprintk("Sending STARTUP #%d.\n",j);
|
||||
apic_read_around(APIC_SPIV);
|
||||
apic_write(APIC_ESR, 0);
|
||||
apic_read(APIC_ESR);
|
||||
Dprintk("After apic_write.\n");
|
||||
|
||||
/*
|
||||
* STARTUP IPI
|
||||
*/
|
||||
|
||||
/* Target chip */
|
||||
apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
|
||||
|
||||
/* Boot on the stack */
|
||||
/* Kick the second */
|
||||
apic_write_around(APIC_ICR, APIC_DM_STARTUP
|
||||
| (start_eip >> 12));
|
||||
|
||||
/*
|
||||
* Give the other CPU some time to accept the IPI.
|
||||
*/
|
||||
udelay(300);
|
||||
|
||||
Dprintk("Startup point 1.\n");
|
||||
|
||||
Dprintk("Waiting for send to finish...\n");
|
||||
send_status = safe_apic_wait_icr_idle();
|
||||
|
||||
/*
|
||||
* Give the other CPU some time to accept the IPI.
|
||||
*/
|
||||
udelay(200);
|
||||
/*
|
||||
* Due to the Pentium erratum 3AP.
|
||||
*/
|
||||
if (maxlvt > 3) {
|
||||
apic_read_around(APIC_SPIV);
|
||||
apic_write(APIC_ESR, 0);
|
||||
}
|
||||
accept_status = (apic_read(APIC_ESR) & 0xEF);
|
||||
if (send_status || accept_status)
|
||||
break;
|
||||
}
|
||||
Dprintk("After Startup.\n");
|
||||
|
||||
if (send_status)
|
||||
printk("APIC never delivered???\n");
|
||||
if (accept_status)
|
||||
printk("APIC delivery error (%lx).\n", accept_status);
|
||||
|
||||
return (send_status | accept_status);
|
||||
}
|
||||
#endif /* WAKE_SECONDARY_VIA_INIT */
|
||||
|
||||
extern cpumask_t cpu_initialized;
|
||||
|
||||
struct create_idle {
|
||||
struct work_struct work;
|
||||
struct task_struct *idle;
|
||||
struct completion done;
|
||||
int cpu;
|
||||
};
|
||||
|
||||
static void __cpuinit do_fork_idle(struct work_struct *work)
|
||||
{
|
||||
struct create_idle *c_idle =
|
||||
container_of(work, struct create_idle, work);
|
||||
|
||||
c_idle->idle = fork_idle(c_idle->cpu);
|
||||
complete(&c_idle->done);
|
||||
}
|
||||
static int __cpuinit do_boot_cpu(int apicid, int cpu)
|
||||
/*
|
||||
* NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
|
||||
* (ie clustered apic addressing mode), this is a LOGICAL apic ID.
|
||||
* Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu.
|
||||
*/
|
||||
{
|
||||
unsigned long boot_error = 0;
|
||||
int timeout;
|
||||
unsigned long start_eip;
|
||||
unsigned short nmi_high = 0, nmi_low = 0;
|
||||
struct create_idle c_idle = {
|
||||
.cpu = cpu,
|
||||
.done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
|
||||
};
|
||||
INIT_WORK(&c_idle.work, do_fork_idle);
|
||||
|
||||
alternatives_smp_switch(1);
|
||||
|
||||
c_idle.idle = get_idle_for_cpu(cpu);
|
||||
|
||||
/*
|
||||
* We can't use kernel_thread since we must avoid to
|
||||
* reschedule the child.
|
||||
*/
|
||||
if (c_idle.idle) {
|
||||
c_idle.idle->thread.sp = (unsigned long) (((struct pt_regs *)
|
||||
(THREAD_SIZE + task_stack_page(c_idle.idle))) - 1);
|
||||
init_idle(c_idle.idle, cpu);
|
||||
goto do_rest;
|
||||
}
|
||||
|
||||
if (!keventd_up() || current_is_keventd())
|
||||
c_idle.work.func(&c_idle.work);
|
||||
else {
|
||||
schedule_work(&c_idle.work);
|
||||
wait_for_completion(&c_idle.done);
|
||||
}
|
||||
|
||||
if (IS_ERR(c_idle.idle)) {
|
||||
printk(KERN_ERR "failed fork for CPU %d\n", cpu);
|
||||
return PTR_ERR(c_idle.idle);
|
||||
}
|
||||
|
||||
set_idle_for_cpu(cpu, c_idle.idle);
|
||||
do_rest:
|
||||
per_cpu(current_task, cpu) = c_idle.idle;
|
||||
init_gdt(cpu);
|
||||
early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
|
||||
|
||||
c_idle.idle->thread.ip = (unsigned long) start_secondary;
|
||||
/* start_eip had better be page-aligned! */
|
||||
start_eip = setup_trampoline();
|
||||
|
||||
/* So we see what's up */
|
||||
printk("Booting processor %d/%d ip %lx\n", cpu, apicid, start_eip);
|
||||
/* Stack for startup_32 can be just as for start_secondary onwards */
|
||||
stack_start.sp = (void *) c_idle.idle->thread.sp;
|
||||
|
||||
irq_ctx_init(cpu);
|
||||
|
||||
/*
|
||||
* This grunge runs the startup process for
|
||||
* the targeted processor.
|
||||
*/
|
||||
|
||||
atomic_set(&init_deasserted, 0);
|
||||
|
||||
Dprintk("Setting warm reset code and vector.\n");
|
||||
|
||||
store_NMI_vector(&nmi_high, &nmi_low);
|
||||
|
||||
smpboot_setup_warm_reset_vector(start_eip);
|
||||
/*
|
||||
* Be paranoid about clearing APIC errors.
|
||||
*/
|
||||
apic_write(APIC_ESR, 0);
|
||||
apic_read(APIC_ESR);
|
||||
|
||||
|
||||
/*
|
||||
* Starting actual IPI sequence...
|
||||
*/
|
||||
boot_error = wakeup_secondary_cpu(apicid, start_eip);
|
||||
|
||||
if (!boot_error) {
|
||||
/*
|
||||
* allow APs to start initializing.
|
||||
*/
|
||||
Dprintk("Before Callout %d.\n", cpu);
|
||||
cpu_set(cpu, cpu_callout_map);
|
||||
Dprintk("After Callout %d.\n", cpu);
|
||||
|
||||
/*
|
||||
* Wait 5s total for a response
|
||||
*/
|
||||
for (timeout = 0; timeout < 50000; timeout++) {
|
||||
if (cpu_isset(cpu, cpu_callin_map))
|
||||
break; /* It has booted */
|
||||
udelay(100);
|
||||
}
|
||||
|
||||
if (cpu_isset(cpu, cpu_callin_map)) {
|
||||
/* number CPUs logically, starting from 1 (BSP is 0) */
|
||||
Dprintk("OK.\n");
|
||||
printk("CPU%d: ", cpu);
|
||||
print_cpu_info(&cpu_data(cpu));
|
||||
Dprintk("CPU has booted.\n");
|
||||
} else {
|
||||
boot_error= 1;
|
||||
if (*((volatile unsigned char *)trampoline_base)
|
||||
== 0xA5)
|
||||
/* trampoline started but...? */
|
||||
printk("Stuck ??\n");
|
||||
else
|
||||
/* trampoline code not run */
|
||||
printk("Not responding.\n");
|
||||
inquire_remote_apic(apicid);
|
||||
}
|
||||
}
|
||||
|
||||
if (boot_error) {
|
||||
/* Try to put things back the way they were before ... */
|
||||
unmap_cpu_to_logical_apicid(cpu);
|
||||
cpu_clear(cpu, cpu_callout_map); /* was set here (do_boot_cpu()) */
|
||||
cpu_clear(cpu, cpu_initialized); /* was set by cpu_init() */
|
||||
cpu_clear(cpu, cpu_possible_map);
|
||||
per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
|
||||
}
|
||||
|
||||
/* mark "stuck" area as not stuck */
|
||||
*((volatile unsigned long *)trampoline_base) = 0;
|
||||
|
||||
return boot_error;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_HOTPLUG_CPU
|
||||
void cpu_exit_clear(void)
|
||||
{
|
||||
|
|
@ -774,65 +305,6 @@ void __init native_smp_prepare_boot_cpu(void)
|
|||
__get_cpu_var(cpu_state) = CPU_ONLINE;
|
||||
}
|
||||
|
||||
int __cpuinit native_cpu_up(unsigned int cpu)
|
||||
{
|
||||
int apicid = cpu_present_to_apicid(cpu);
|
||||
unsigned long flags;
|
||||
int err;
|
||||
|
||||
WARN_ON(irqs_disabled());
|
||||
|
||||
Dprintk("++++++++++++++++++++=_---CPU UP %u\n", cpu);
|
||||
|
||||
if (apicid == BAD_APICID || apicid == boot_cpu_physical_apicid ||
|
||||
!physid_isset(apicid, phys_cpu_present_map)) {
|
||||
printk(KERN_ERR "%s: bad cpu %d\n", __func__, cpu);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/*
|
||||
* Already booted CPU?
|
||||
*/
|
||||
if (cpu_isset(cpu, cpu_callin_map)) {
|
||||
Dprintk("do_boot_cpu %d Already started\n", cpu);
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
/*
|
||||
* Save current MTRR state in case it was changed since early boot
|
||||
* (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
|
||||
*/
|
||||
mtrr_save_state();
|
||||
|
||||
per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
|
||||
|
||||
/* init low mem mapping */
|
||||
clone_pgd_range(swapper_pg_dir, swapper_pg_dir + USER_PGD_PTRS,
|
||||
min_t(unsigned long, KERNEL_PGD_PTRS, USER_PGD_PTRS));
|
||||
flush_tlb_all();
|
||||
|
||||
err = do_boot_cpu(apicid, cpu);
|
||||
if (err < 0) {
|
||||
Dprintk("do_boot_cpu failed %d\n", err);
|
||||
return err;
|
||||
}
|
||||
|
||||
/*
|
||||
* Check TSC synchronization with the AP (keep irqs disabled
|
||||
* while doing so):
|
||||
*/
|
||||
local_irq_save(flags);
|
||||
check_tsc_sync_source(cpu);
|
||||
local_irq_restore(flags);
|
||||
|
||||
while (!cpu_isset(cpu, cpu_online_map)) {
|
||||
cpu_relax();
|
||||
touch_nmi_watchdog();
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
extern void impress_friends(void);
|
||||
extern void smp_checks(void);
|
||||
|
||||
|
|
|
|||
|
|
@ -71,119 +71,7 @@ int smp_threads_ready;
|
|||
/* State of each CPU */
|
||||
DEFINE_PER_CPU(int, cpu_state) = { 0 };
|
||||
|
||||
/*
|
||||
* Store all idle threads, this can be reused instead of creating
|
||||
* a new thread. Also avoids complicated thread destroy functionality
|
||||
* for idle threads.
|
||||
*/
|
||||
#ifdef CONFIG_HOTPLUG_CPU
|
||||
/*
|
||||
* Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
|
||||
* removed after init for !CONFIG_HOTPLUG_CPU.
|
||||
*/
|
||||
static DEFINE_PER_CPU(struct task_struct *, idle_thread_array);
|
||||
#define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
|
||||
#define set_idle_for_cpu(x,p) (per_cpu(idle_thread_array, x) = (p))
|
||||
#else
|
||||
struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
|
||||
#define get_idle_for_cpu(x) (idle_thread_array[(x)])
|
||||
#define set_idle_for_cpu(x,p) (idle_thread_array[(x)] = (p))
|
||||
#endif
|
||||
|
||||
static atomic_t init_deasserted __cpuinitdata;
|
||||
|
||||
#define smp_callin_clear_local_apic() do {} while (0)
|
||||
#define map_cpu_to_logical_apicid() do {} while (0)
|
||||
|
||||
/*
|
||||
* Report back to the Boot Processor.
|
||||
* Running on AP.
|
||||
*/
|
||||
void __cpuinit smp_callin(void)
|
||||
{
|
||||
int cpuid, phys_id;
|
||||
unsigned long timeout;
|
||||
|
||||
/*
|
||||
* If waken up by an INIT in an 82489DX configuration
|
||||
* we may get here before an INIT-deassert IPI reaches
|
||||
* our local APIC. We have to wait for the IPI or we'll
|
||||
* lock up on an APIC access.
|
||||
*/
|
||||
wait_for_init_deassert(&init_deasserted);
|
||||
|
||||
/*
|
||||
* (This works even if the APIC is not enabled.)
|
||||
*/
|
||||
phys_id = GET_APIC_ID(apic_read(APIC_ID));
|
||||
cpuid = smp_processor_id();
|
||||
if (cpu_isset(cpuid, cpu_callin_map)) {
|
||||
panic("smp_callin: phys CPU#%d, CPU#%d already present??\n",
|
||||
phys_id, cpuid);
|
||||
}
|
||||
Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
|
||||
|
||||
/*
|
||||
* STARTUP IPIs are fragile beasts as they might sometimes
|
||||
* trigger some glue motherboard logic. Complete APIC bus
|
||||
* silence for 1 second, this overestimates the time the
|
||||
* boot CPU is spending to send the up to 2 STARTUP IPIs
|
||||
* by a factor of two. This should be enough.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Waiting 2s total for startup (udelay is not yet working)
|
||||
*/
|
||||
timeout = jiffies + 2*HZ;
|
||||
while (time_before(jiffies, timeout)) {
|
||||
/*
|
||||
* Has the boot CPU finished it's STARTUP sequence?
|
||||
*/
|
||||
if (cpu_isset(cpuid, cpu_callout_map))
|
||||
break;
|
||||
cpu_relax();
|
||||
}
|
||||
|
||||
if (!time_before(jiffies, timeout)) {
|
||||
panic("smp_callin: CPU%d started up but did not get a callout!\n",
|
||||
cpuid);
|
||||
}
|
||||
|
||||
/*
|
||||
* the boot CPU has finished the init stage and is spinning
|
||||
* on callin_map until we finish. We are free to set up this
|
||||
* CPU, first the APIC. (this is probably redundant on most
|
||||
* boards)
|
||||
*/
|
||||
|
||||
Dprintk("CALLIN, before setup_local_APIC().\n");
|
||||
smp_callin_clear_local_apic();
|
||||
setup_local_APIC();
|
||||
end_local_APIC_setup();
|
||||
map_cpu_to_logical_apicid();
|
||||
|
||||
/*
|
||||
* Get our bogomips.
|
||||
*
|
||||
* Need to enable IRQs because it can take longer and then
|
||||
* the NMI watchdog might kill us.
|
||||
*/
|
||||
local_irq_enable();
|
||||
calibrate_delay();
|
||||
local_irq_disable();
|
||||
Dprintk("Stack at about %p\n",&cpuid);
|
||||
|
||||
/*
|
||||
* Save our processor parameters
|
||||
*/
|
||||
smp_store_cpu_info(cpuid);
|
||||
|
||||
/*
|
||||
* Allow the master to continue.
|
||||
*/
|
||||
cpu_set(cpuid, cpu_callin_map);
|
||||
}
|
||||
|
||||
extern void smp_callin(void);
|
||||
/*
|
||||
* Setup code on secondary processor (after comming out of the trampoline)
|
||||
*/
|
||||
|
|
@ -246,349 +134,6 @@ void __cpuinit start_secondary(void)
|
|||
cpu_idle();
|
||||
}
|
||||
|
||||
extern volatile unsigned long init_rsp;
|
||||
extern void (*initial_code)(void);
|
||||
|
||||
#ifdef APIC_DEBUG
|
||||
static void __inquire_remote_apic(int apicid)
|
||||
{
|
||||
unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
|
||||
char *names[] = { "ID", "VERSION", "SPIV" };
|
||||
int timeout;
|
||||
u32 status;
|
||||
|
||||
printk(KERN_INFO "Inquiring remote APIC #%d...\n", apicid);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(regs); i++) {
|
||||
printk(KERN_INFO "... APIC #%d %s: ", apicid, names[i]);
|
||||
|
||||
/*
|
||||
* Wait for idle.
|
||||
*/
|
||||
status = safe_apic_wait_icr_idle();
|
||||
if (status)
|
||||
printk(KERN_CONT
|
||||
"a previous APIC delivery may have failed\n");
|
||||
|
||||
apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
|
||||
apic_write_around(APIC_ICR, APIC_DM_REMRD | regs[i]);
|
||||
|
||||
timeout = 0;
|
||||
do {
|
||||
udelay(100);
|
||||
status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
|
||||
} while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
|
||||
|
||||
switch (status) {
|
||||
case APIC_ICR_RR_VALID:
|
||||
status = apic_read(APIC_RRR);
|
||||
printk(KERN_CONT "%08x\n", status);
|
||||
break;
|
||||
default:
|
||||
printk(KERN_CONT "failed\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Kick the secondary to wake up.
|
||||
*/
|
||||
static int __cpuinit wakeup_secondary_cpu(int phys_apicid,
|
||||
unsigned int start_rip)
|
||||
{
|
||||
unsigned long send_status, accept_status = 0;
|
||||
int maxlvt, num_starts, j;
|
||||
|
||||
/*
|
||||
* Be paranoid about clearing APIC errors.
|
||||
*/
|
||||
if (APIC_INTEGRATED(apic_version[phys_apicid])) {
|
||||
apic_read_around(APIC_SPIV);
|
||||
apic_write(APIC_ESR, 0);
|
||||
apic_read(APIC_ESR);
|
||||
}
|
||||
|
||||
Dprintk("Asserting INIT.\n");
|
||||
|
||||
/*
|
||||
* Turn INIT on target chip
|
||||
*/
|
||||
apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
|
||||
|
||||
/*
|
||||
* Send IPI
|
||||
*/
|
||||
apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT
|
||||
| APIC_DM_INIT);
|
||||
|
||||
Dprintk("Waiting for send to finish...\n");
|
||||
send_status = safe_apic_wait_icr_idle();
|
||||
|
||||
mdelay(10);
|
||||
|
||||
Dprintk("Deasserting INIT.\n");
|
||||
|
||||
/* Target chip */
|
||||
apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
|
||||
|
||||
/* Send IPI */
|
||||
apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);
|
||||
|
||||
Dprintk("Waiting for send to finish...\n");
|
||||
send_status = safe_apic_wait_icr_idle();
|
||||
|
||||
mb();
|
||||
atomic_set(&init_deasserted, 1);
|
||||
|
||||
if (APIC_INTEGRATED(apic_version[phys_apicid]))
|
||||
num_starts = 2;
|
||||
else
|
||||
num_starts = 0;
|
||||
|
||||
/*
|
||||
* Paravirt / VMI wants a startup IPI hook here to set up the
|
||||
* target processor state.
|
||||
*/
|
||||
startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
|
||||
(unsigned long) init_rsp);
|
||||
|
||||
|
||||
/*
|
||||
* Run STARTUP IPI loop.
|
||||
*/
|
||||
Dprintk("#startup loops: %d.\n", num_starts);
|
||||
|
||||
maxlvt = lapic_get_maxlvt();
|
||||
|
||||
for (j = 1; j <= num_starts; j++) {
|
||||
Dprintk("Sending STARTUP #%d.\n",j);
|
||||
apic_read_around(APIC_SPIV);
|
||||
apic_write(APIC_ESR, 0);
|
||||
apic_read(APIC_ESR);
|
||||
Dprintk("After apic_write.\n");
|
||||
|
||||
/*
|
||||
* STARTUP IPI
|
||||
*/
|
||||
|
||||
/* Target chip */
|
||||
apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
|
||||
|
||||
/* Boot on the stack */
|
||||
/* Kick the second */
|
||||
apic_write_around(APIC_ICR, APIC_DM_STARTUP | (start_rip>>12));
|
||||
|
||||
/*
|
||||
* Give the other CPU some time to accept the IPI.
|
||||
*/
|
||||
udelay(300);
|
||||
|
||||
Dprintk("Startup point 1.\n");
|
||||
|
||||
Dprintk("Waiting for send to finish...\n");
|
||||
send_status = safe_apic_wait_icr_idle();
|
||||
|
||||
/*
|
||||
* Give the other CPU some time to accept the IPI.
|
||||
*/
|
||||
udelay(200);
|
||||
/*
|
||||
* Due to the Pentium erratum 3AP.
|
||||
*/
|
||||
if (maxlvt > 3) {
|
||||
apic_read_around(APIC_SPIV);
|
||||
apic_write(APIC_ESR, 0);
|
||||
}
|
||||
accept_status = (apic_read(APIC_ESR) & 0xEF);
|
||||
if (send_status || accept_status)
|
||||
break;
|
||||
}
|
||||
Dprintk("After Startup.\n");
|
||||
|
||||
if (send_status)
|
||||
printk(KERN_ERR "APIC never delivered???\n");
|
||||
if (accept_status)
|
||||
printk(KERN_ERR "APIC delivery error (%lx).\n", accept_status);
|
||||
|
||||
return (send_status | accept_status);
|
||||
}
|
||||
|
||||
struct create_idle {
|
||||
struct work_struct work;
|
||||
struct task_struct *idle;
|
||||
struct completion done;
|
||||
int cpu;
|
||||
};
|
||||
|
||||
static void __cpuinit do_fork_idle(struct work_struct *work)
|
||||
{
|
||||
struct create_idle *c_idle =
|
||||
container_of(work, struct create_idle, work);
|
||||
|
||||
c_idle->idle = fork_idle(c_idle->cpu);
|
||||
complete(&c_idle->done);
|
||||
}
|
||||
|
||||
/*
|
||||
* Boot one CPU.
|
||||
*/
|
||||
static int __cpuinit do_boot_cpu(int cpu, int apicid)
|
||||
{
|
||||
unsigned long boot_error = 0;
|
||||
int timeout;
|
||||
unsigned long start_rip;
|
||||
struct create_idle c_idle = {
|
||||
.cpu = cpu,
|
||||
.done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
|
||||
};
|
||||
INIT_WORK(&c_idle.work, do_fork_idle);
|
||||
|
||||
/* allocate memory for gdts of secondary cpus. Hotplug is considered */
|
||||
if (!cpu_gdt_descr[cpu].address &&
|
||||
!(cpu_gdt_descr[cpu].address = get_zeroed_page(GFP_KERNEL))) {
|
||||
printk(KERN_ERR "Failed to allocate GDT for CPU %d\n", cpu);
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* Allocate node local memory for AP pdas */
|
||||
if (cpu_pda(cpu) == &boot_cpu_pda[cpu]) {
|
||||
struct x8664_pda *newpda, *pda;
|
||||
int node = cpu_to_node(cpu);
|
||||
pda = cpu_pda(cpu);
|
||||
newpda = kmalloc_node(sizeof (struct x8664_pda), GFP_ATOMIC,
|
||||
node);
|
||||
if (newpda) {
|
||||
memcpy(newpda, pda, sizeof (struct x8664_pda));
|
||||
cpu_pda(cpu) = newpda;
|
||||
} else
|
||||
printk(KERN_ERR
|
||||
"Could not allocate node local PDA for CPU %d on node %d\n",
|
||||
cpu, node);
|
||||
}
|
||||
|
||||
alternatives_smp_switch(1);
|
||||
|
||||
c_idle.idle = get_idle_for_cpu(cpu);
|
||||
|
||||
if (c_idle.idle) {
|
||||
c_idle.idle->thread.sp = (unsigned long) (((struct pt_regs *)
|
||||
(THREAD_SIZE + task_stack_page(c_idle.idle))) - 1);
|
||||
init_idle(c_idle.idle, cpu);
|
||||
goto do_rest;
|
||||
}
|
||||
|
||||
/*
|
||||
* During cold boot process, keventd thread is not spun up yet.
|
||||
* When we do cpu hot-add, we create idle threads on the fly, we should
|
||||
* not acquire any attributes from the calling context. Hence the clean
|
||||
* way to create kernel_threads() is to do that from keventd().
|
||||
* We do the current_is_keventd() due to the fact that ACPI notifier
|
||||
* was also queuing to keventd() and when the caller is already running
|
||||
* in context of keventd(), we would end up with locking up the keventd
|
||||
* thread.
|
||||
*/
|
||||
if (!keventd_up() || current_is_keventd())
|
||||
c_idle.work.func(&c_idle.work);
|
||||
else {
|
||||
schedule_work(&c_idle.work);
|
||||
wait_for_completion(&c_idle.done);
|
||||
}
|
||||
|
||||
if (IS_ERR(c_idle.idle)) {
|
||||
printk("failed fork for CPU %d\n", cpu);
|
||||
return PTR_ERR(c_idle.idle);
|
||||
}
|
||||
|
||||
set_idle_for_cpu(cpu, c_idle.idle);
|
||||
|
||||
do_rest:
|
||||
|
||||
cpu_pda(cpu)->pcurrent = c_idle.idle;
|
||||
|
||||
start_rip = setup_trampoline();
|
||||
|
||||
init_rsp = c_idle.idle->thread.sp;
|
||||
load_sp0(&per_cpu(init_tss, cpu), &c_idle.idle->thread);
|
||||
initial_code = start_secondary;
|
||||
clear_tsk_thread_flag(c_idle.idle, TIF_FORK);
|
||||
|
||||
printk(KERN_INFO "Booting processor %d/%d APIC 0x%x\n", cpu,
|
||||
cpus_weight(cpu_present_map),
|
||||
apicid);
|
||||
|
||||
/*
|
||||
* This grunge runs the startup process for
|
||||
* the targeted processor.
|
||||
*/
|
||||
|
||||
atomic_set(&init_deasserted, 0);
|
||||
|
||||
Dprintk("Setting warm reset code and vector.\n");
|
||||
|
||||
smpboot_setup_warm_reset_vector(start_rip);
|
||||
/*
|
||||
* Be paranoid about clearing APIC errors.
|
||||
*/
|
||||
apic_write(APIC_ESR, 0);
|
||||
apic_read(APIC_ESR);
|
||||
|
||||
/*
|
||||
* Starting actual IPI sequence...
|
||||
*/
|
||||
boot_error = wakeup_secondary_cpu(apicid, start_rip);
|
||||
|
||||
if (!boot_error) {
|
||||
/*
|
||||
* allow APs to start initializing.
|
||||
*/
|
||||
Dprintk("Before Callout %d.\n", cpu);
|
||||
cpu_set(cpu, cpu_callout_map);
|
||||
Dprintk("After Callout %d.\n", cpu);
|
||||
|
||||
/*
|
||||
* Wait 5s total for a response
|
||||
*/
|
||||
for (timeout = 0; timeout < 50000; timeout++) {
|
||||
if (cpu_isset(cpu, cpu_callin_map))
|
||||
break; /* It has booted */
|
||||
udelay(100);
|
||||
}
|
||||
|
||||
if (cpu_isset(cpu, cpu_callin_map)) {
|
||||
/* number CPUs logically, starting from 1 (BSP is 0) */
|
||||
Dprintk("CPU has booted.\n");
|
||||
printk(KERN_INFO "CPU%d: ", cpu);
|
||||
print_cpu_info(&cpu_data(cpu));
|
||||
} else {
|
||||
boot_error = 1;
|
||||
if (*((volatile unsigned char *)trampoline_base)
|
||||
== 0xA5)
|
||||
/* trampoline started but...? */
|
||||
printk("Stuck ??\n");
|
||||
else
|
||||
/* trampoline code not run */
|
||||
printk("Not responding.\n");
|
||||
#ifdef APIC_DEBUG
|
||||
inquire_remote_apic(apicid);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
if (boot_error) {
|
||||
cpu_clear(cpu, cpu_callout_map); /* was set here (do_boot_cpu()) */
|
||||
clear_bit(cpu, (unsigned long *)&cpu_initialized); /* was set by cpu_init() */
|
||||
clear_node_cpumask(cpu); /* was set by numa_add_cpu */
|
||||
cpu_clear(cpu, cpu_present_map);
|
||||
cpu_clear(cpu, cpu_possible_map);
|
||||
per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
|
||||
}
|
||||
|
||||
/* mark "stuck" area as not stuck */
|
||||
*((volatile unsigned long *)trampoline_base) = 0;
|
||||
|
||||
return boot_error;
|
||||
}
|
||||
|
||||
cycles_t cacheflush_time;
|
||||
unsigned long cache_decay_ticks;
|
||||
|
||||
|
|
@ -745,64 +290,6 @@ void __init native_smp_prepare_boot_cpu(void)
|
|||
per_cpu(cpu_state, me) = CPU_ONLINE;
|
||||
}
|
||||
|
||||
/*
|
||||
* Entry point to boot a CPU.
|
||||
*/
|
||||
int __cpuinit native_cpu_up(unsigned int cpu)
|
||||
{
|
||||
int apicid = cpu_present_to_apicid(cpu);
|
||||
unsigned long flags;
|
||||
int err;
|
||||
|
||||
WARN_ON(irqs_disabled());
|
||||
|
||||
Dprintk("++++++++++++++++++++=_---CPU UP %u\n", cpu);
|
||||
|
||||
if (apicid == BAD_APICID || apicid == boot_cpu_physical_apicid ||
|
||||
!physid_isset(apicid, phys_cpu_present_map)) {
|
||||
printk("__cpu_up: bad cpu %d\n", cpu);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/*
|
||||
* Already booted CPU?
|
||||
*/
|
||||
if (cpu_isset(cpu, cpu_callin_map)) {
|
||||
Dprintk("do_boot_cpu %d Already started\n", cpu);
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
/*
|
||||
* Save current MTRR state in case it was changed since early boot
|
||||
* (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
|
||||
*/
|
||||
mtrr_save_state();
|
||||
|
||||
per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
|
||||
/* Boot it! */
|
||||
err = do_boot_cpu(cpu, apicid);
|
||||
if (err < 0) {
|
||||
Dprintk("do_boot_cpu failed %d\n", err);
|
||||
return err;
|
||||
}
|
||||
|
||||
/* Unleash the CPU! */
|
||||
Dprintk("waiting for cpu %d\n", cpu);
|
||||
|
||||
/*
|
||||
* Make sure and check TSC sync:
|
||||
*/
|
||||
local_irq_save(flags);
|
||||
check_tsc_sync_source(cpu);
|
||||
local_irq_restore(flags);
|
||||
|
||||
while (!cpu_isset(cpu, cpu_online_map))
|
||||
cpu_relax();
|
||||
err = 0;
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
extern void impress_friends(void);
|
||||
extern void smp_checks(void);
|
||||
|
||||
|
|
|
|||
|
|
@ -9,6 +9,7 @@ extern cpumask_t cpu_callout_map;
|
|||
|
||||
extern int smp_num_siblings;
|
||||
extern unsigned int num_processors;
|
||||
extern cpumask_t cpu_initialized;
|
||||
|
||||
extern u16 x86_cpu_to_apicid_init[];
|
||||
extern u16 x86_bios_cpu_apicid_init[];
|
||||
|
|
@ -34,6 +35,8 @@ extern struct {
|
|||
unsigned short ss;
|
||||
} stack_start;
|
||||
|
||||
extern unsigned long init_rsp;
|
||||
extern unsigned long initial_code;
|
||||
|
||||
struct smp_ops {
|
||||
void (*smp_prepare_boot_cpu)(void);
|
||||
|
|
|
|||
Loading…
Reference in New Issue