net: ena: use CSUM_CHECKED device indication to report skb's checksum status
Set skb->ip_summed to the correct value as reported by the device. Add counter for the case where rx csum offload is enabled but device didn't check it. Signed-off-by: Arthur Kiyanovski <akiyano@amazon.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -354,6 +354,9 @@ static inline void ena_com_rx_set_flags(struct ena_com_rx_ctx *ena_rx_ctx,
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ena_rx_ctx->l4_csum_err =
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(cdesc->status & ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_ERR_MASK) >>
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ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_ERR_SHIFT;
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ena_rx_ctx->l4_csum_checked =
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!!((cdesc->status & ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_CHECKED_MASK) >>
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ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_CHECKED_SHIFT);
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ena_rx_ctx->hash = cdesc->hash;
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ena_rx_ctx->frag =
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(cdesc->status & ENA_ETH_IO_RX_CDESC_BASE_IPV4_FRAG_MASK) >>
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@ -67,6 +67,7 @@ struct ena_com_rx_ctx {
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enum ena_eth_io_l4_proto_index l4_proto;
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bool l3_csum_err;
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bool l4_csum_err;
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u8 l4_csum_checked;
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/* fragmented packet */
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bool frag;
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u32 hash;
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@ -242,9 +242,13 @@ struct ena_eth_io_rx_cdesc_base {
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* checksum error detected, or, the controller didn't
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* validate the checksum. This bit is valid only when
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* l4_proto_idx indicates TCP/UDP packet, and,
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* ipv4_frag is not set
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* ipv4_frag is not set. This bit is valid only when
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* l4_csum_checked below is set.
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* 15 : ipv4_frag - Indicates IPv4 fragmented packet
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* 23:16 : reserved16
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* 16 : l4_csum_checked - L4 checksum was verified
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* (could be OK or error), when cleared the status of
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* checksum is unknown
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* 23:17 : reserved17 - MBZ
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* 24 : phase
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* 25 : l3_csum2 - second checksum engine result
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* 26 : first - Indicates first descriptor in
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@ -390,6 +394,8 @@ struct ena_eth_io_numa_node_cfg_reg {
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#define ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_ERR_MASK BIT(14)
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#define ENA_ETH_IO_RX_CDESC_BASE_IPV4_FRAG_SHIFT 15
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#define ENA_ETH_IO_RX_CDESC_BASE_IPV4_FRAG_MASK BIT(15)
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#define ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_CHECKED_SHIFT 16
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#define ENA_ETH_IO_RX_CDESC_BASE_L4_CSUM_CHECKED_MASK BIT(16)
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#define ENA_ETH_IO_RX_CDESC_BASE_PHASE_SHIFT 24
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#define ENA_ETH_IO_RX_CDESC_BASE_PHASE_MASK BIT(24)
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#define ENA_ETH_IO_RX_CDESC_BASE_L3_CSUM2_SHIFT 25
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@ -97,6 +97,7 @@ static const struct ena_stats ena_stats_rx_strings[] = {
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ENA_STAT_RX_ENTRY(rx_copybreak_pkt),
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ENA_STAT_RX_ENTRY(bad_req_id),
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ENA_STAT_RX_ENTRY(empty_rx_ring),
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ENA_STAT_RX_ENTRY(csum_unchecked),
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};
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static const struct ena_stats ena_stats_ena_com_strings[] = {
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@ -994,8 +994,19 @@ static inline void ena_rx_checksum(struct ena_ring *rx_ring,
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return;
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}
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skb->ip_summed = CHECKSUM_UNNECESSARY;
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if (likely(ena_rx_ctx->l4_csum_checked)) {
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skb->ip_summed = CHECKSUM_UNNECESSARY;
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} else {
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u64_stats_update_begin(&rx_ring->syncp);
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rx_ring->rx_stats.csum_unchecked++;
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u64_stats_update_end(&rx_ring->syncp);
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skb->ip_summed = CHECKSUM_NONE;
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}
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} else {
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skb->ip_summed = CHECKSUM_NONE;
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return;
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}
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}
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static void ena_set_rx_hash(struct ena_ring *rx_ring,
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@ -205,6 +205,7 @@ struct ena_stats_rx {
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u64 rx_copybreak_pkt;
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u64 bad_req_id;
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u64 empty_rx_ring;
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u64 csum_unchecked;
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};
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struct ena_ring {
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