[SCSI] mpt2sas: Update the timing requirements for issuing a Hard Reset
Updated the mpt2sas driver code that issues hard reset to comply with the timing requirements mentioned in MPI specifications rev V. [jejb: checpatch fixes] Signed-off-by: Sreekanth Reddy <Sreekanth.Reddy@lsi.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
This commit is contained in:
parent
10ec24e4ce
commit
ca6832e91b
|
@ -3936,11 +3936,15 @@ _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
|
|||
writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
|
||||
&ioc->chip->HostDiagnostic);
|
||||
|
||||
/* don't access any registers for 50 milliseconds */
|
||||
msleep(50);
|
||||
/* This delay allows the chip PCIe hardware time to finish reset tasks*/
|
||||
if (sleep_flag == CAN_SLEEP)
|
||||
msleep(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC/1000);
|
||||
else
|
||||
mdelay(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC/1000);
|
||||
|
||||
/* 300 second max wait */
|
||||
for (count = 0; count < 3000000 ; count++) {
|
||||
/* Approximately 300 second max wait */
|
||||
for (count = 0; count < (300000000 /
|
||||
MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC); count++) {
|
||||
|
||||
host_diagnostic = readl(&ioc->chip->HostDiagnostic);
|
||||
|
||||
|
@ -3949,11 +3953,13 @@ _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
|
|||
if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
|
||||
break;
|
||||
|
||||
/* wait 100 msec */
|
||||
/* Wait to pass the second read delay window */
|
||||
if (sleep_flag == CAN_SLEEP)
|
||||
msleep(1);
|
||||
msleep(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
|
||||
/1000);
|
||||
else
|
||||
mdelay(1);
|
||||
mdelay(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
|
||||
/1000);
|
||||
}
|
||||
|
||||
if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
|
||||
|
|
Loading…
Reference in New Issue