drm/msm: Use nvmem_cell_read_variable_le_u32() to read speed bin
Let's use the newly-added nvmem_cell_read_variable_le_u32() to future proof ourselves a little bit. Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20210521134516.v2.1.Id496c6fea0cb92ff6ea8ef1faf5d468eb09465e3@changeid Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
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@ -1724,10 +1724,10 @@ static u32 fuse_to_supp_hw(struct device *dev, struct adreno_rev rev, u32 fuse)
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static int a6xx_set_supported_hw(struct device *dev, struct adreno_rev rev)
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{
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u32 supp_hw = UINT_MAX;
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u16 speedbin;
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u32 speedbin;
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int ret;
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ret = nvmem_cell_read_u16(dev, "speed_bin", &speedbin);
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ret = nvmem_cell_read_variable_le_u32(dev, "speed_bin", &speedbin);
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/*
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* -ENOENT means that the platform doesn't support speedbin which is
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* fine
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@ -1740,7 +1740,6 @@ static int a6xx_set_supported_hw(struct device *dev, struct adreno_rev rev)
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ret);
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goto done;
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}
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speedbin = le16_to_cpu(speedbin);
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supp_hw = fuse_to_supp_hw(dev, rev, speedbin);
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