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dt-bindings: pinctrl: {mediatek,ralink}: fix formatting 

Change the style of description properties to plain style where there's no
need to preserve the line endings, and vice versa.

Fix capitalisation and indentation.

Fit the schemas to 80 columns for each line.

Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230317213011.13656-16-arinc.unal@arinc9.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Arınç ÜNAL 2023-03-18 00:30:05 +03:00 committed by Linus Walleij
parent a9d44c4cc0
commit c911ad22a8
17 changed files with 258 additions and 238 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml
View File

@ -9,7 +9,7 @@ title: MediaTek MT65xx Pin Controller
maintainers: maintainers:
- Sean Wang <sean.wang@kernel.org> - Sean Wang <sean.wang@kernel.org>
description: |+ description:
The MediaTek's MT65xx Pin controller is used to control SoC pins. The MediaTek's MT65xx Pin controller is used to control SoC pins.
properties: properties:
@ -30,7 +30,7 @@ properties:
pins-are-numbered: pins-are-numbered:
$ref: /schemas/types.yaml#/definitions/flag $ref: /schemas/types.yaml#/definitions/flag
description: | description:
Specify the subnodes are using numbered pinmux to specify pins. (UNUSED) Specify the subnodes are using numbered pinmux to specify pins. (UNUSED)
deprecated: true deprecated: true
@ -38,10 +38,10 @@ properties:
"#gpio-cells": "#gpio-cells":
const: 2 const: 2
description: | description:
Number of cells in GPIO specifier. Since the generic GPIO Number of cells in GPIO specifier. Since the generic GPIO binding is used,
binding is used, the amount of cells must be specified as 2. See the below the amount of cells must be specified as 2. See the below mentioned gpio
mentioned gpio binding representation for description of particular cells. binding representation for description of particular cells.
mediatek,pctl-regmap: mediatek,pctl-regmap:
$ref: /schemas/types.yaml#/definitions/phandle-array $ref: /schemas/types.yaml#/definitions/phandle-array
@ -49,7 +49,7 @@ properties:
maxItems: 1 maxItems: 1
minItems: 1 minItems: 1
maxItems: 2 maxItems: 2
description: | description:
Should be phandles of the syscfg node. Should be phandles of the syscfg node.
interrupt-controller: true interrupt-controller: true
@ -77,7 +77,7 @@ patternProperties:
'(^pins|pins?$)': '(^pins|pins?$)':
type: object type: object
additionalProperties: false additionalProperties: false
description: | description:
A pinctrl node should contain at least one subnodes representing the A pinctrl node should contain at least one subnodes representing the
pinctrl groups available on the machine. Each subnode will list the pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer pins it needs, and how they should be configured, with regard to muxer
@ -88,14 +88,14 @@ patternProperties:
properties: properties:
pinmux: pinmux:
description: description:
integer array, represents gpio pin number and mux setting. Integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are Supported pin number and mux varies for different SoCs, and are
defined as macros in <soc>-pinfunc.h directly. defined as macros in <soc>-pinfunc.h directly.
bias-disable: true bias-disable: true
bias-pull-up: bias-pull-up:
description: | description:
Besides generic pinconfig options, it can be used as the pull up Besides generic pinconfig options, it can be used as the pull up
settings for 2 pull resistors, R0 and R1. User can configure those settings for 2 pull resistors, R0 and R1. User can configure those
special pins. Some macros have been defined for this usage, such special pins. Some macros have been defined for this usage, such
@ -117,7 +117,7 @@ patternProperties:
input-schmitt-disable: true input-schmitt-disable: true
drive-strength: drive-strength:
description: | description:
Can support some arguments, such as MTK_DRIVE_4mA, MTK_DRIVE_6mA, Can support some arguments, such as MTK_DRIVE_4mA, MTK_DRIVE_6mA,
etc. See dt-bindings/pinctrl/mt65xx.h for valid arguments. etc. See dt-bindings/pinctrl/mt65xx.h for valid arguments.

33
Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml
View File

@ -11,8 +11,8 @@ maintainers:
- Sean Wang <sean.wang@kernel.org> - Sean Wang <sean.wang@kernel.org>
description: description:
The MediaTek pin controller on MT6779 is used to control pin The MediaTek pin controller on MT6779 is used to control pin functions, pull
functions, pull up/down resistance and drive strength options. up/down resistance and drive strength options.
properties: properties:
compatible: compatible:
@ -29,22 +29,22 @@ properties:
"#gpio-cells": "#gpio-cells":
const: 2 const: 2
description: | description:
Number of cells in GPIO specifier. Since the generic GPIO Number of cells in GPIO specifier. Since the generic GPIO binding is used,
binding is used, the amount of cells must be specified as 2. See the below the amount of cells must be specified as 2. See the below mentioned gpio
mentioned gpio binding representation for description of particular cells. binding representation for description of particular cells.
gpio-ranges: gpio-ranges:
minItems: 1 minItems: 1
maxItems: 5 maxItems: 5
description: | description:
GPIO valid number range. GPIO valid number range.
interrupt-controller: true interrupt-controller: true
interrupts: interrupts:
maxItems: 1 maxItems: 1
description: | description:
Specifies the summary IRQ. Specifies the summary IRQ.
"#interrupt-cells": "#interrupt-cells":
@ -118,19 +118,20 @@ patternProperties:
patternProperties: patternProperties:
'-pins*$': '-pins*$':
type: object type: object
description: | description:
A pinctrl node should contain at least one subnodes representing the A pinctrl node should contain at least one subnodes representing the
pinctrl groups available on the machine. Each subnode will list the pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer pins it needs, and how they should be configured, with regard to muxer
configuration, pullups, drive strength, input enable/disable and input schmitt. configuration, pullups, drive strength, input enable/disable and input
schmitt.
$ref: "/schemas/pinctrl/pincfg-node.yaml" $ref: "/schemas/pinctrl/pincfg-node.yaml"
properties: properties:
pinmux: pinmux:
description: description:
integer array, represents gpio pin number and mux setting. Integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are defined Supported pin number and mux varies for different SoCs, and are
as macros in boot/dts/<soc>-pinfunc.h directly. defined as macros in boot/dts/<soc>-pinfunc.h directly.
bias-disable: true bias-disable: true
@ -159,7 +160,8 @@ patternProperties:
mediatek,pull-up-adv: mediatek,pull-up-adv:
description: | description: |
Pull up setings for 2 pull resistors, R0 and R1. User can Pull up setings for 2 pull resistors, R0 and R1. User can
configure those special pins. Valid arguments are described as below: configure those special pins. Valid arguments are described as
below:
0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
@ -170,7 +172,8 @@ patternProperties:
mediatek,pull-down-adv: mediatek,pull-down-adv:
description: | description: |
Pull down settings for 2 pull resistors, R0 and R1. User can Pull down settings for 2 pull resistors, R0 and R1. User can
configure those special pins. Valid arguments are described as below: configure those special pins. Valid arguments are described as
below:
0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.

41
Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml
View File

@ -10,7 +10,7 @@ maintainers:
- AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
- Sean Wang <sean.wang@kernel.org> - Sean Wang <sean.wang@kernel.org>
description: | description:
The MediaTek's MT6795 Pin controller is used to control SoC pins. The MediaTek's MT6795 Pin controller is used to control SoC pins.
properties: properties:
@ -20,10 +20,10 @@ properties:
gpio-controller: true gpio-controller: true
'#gpio-cells': '#gpio-cells':
description: | description:
Number of cells in GPIO specifier. Since the generic GPIO binding is used, Number of cells in GPIO specifier. Since the generic GPIO binding is used,
the amount of cells must be specified as 2. See the below the amount of cells must be specified as 2. See the below mentioned gpio
mentioned gpio binding representation for description of particular cells. binding representation for description of particular cells.
const: 2 const: 2
gpio-ranges: gpio-ranges:
@ -32,7 +32,7 @@ properties:
reg: reg:
description: description:
Physical address base for gpio base and eint registers. Physical address base for GPIO base and eint registers.
minItems: 2 minItems: 2
reg-names: reg-names:
@ -65,8 +65,8 @@ patternProperties:
A pinctrl node should contain at least one subnodes representing the A pinctrl node should contain at least one subnodes representing the
pinctrl groups available on the machine. Each subnode will list the pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer pins it needs, and how they should be configured, with regard to muxer
configuration, pullups, drive strength, input enable/disable and configuration, pullups, drive strength, input enable/disable and input
input schmitt. schmitt.
An example of using macro: An example of using macro:
pincontroller { pincontroller {
/* GPIO0 set as multifunction GPIO0 */ /* GPIO0 set as multifunction GPIO0 */
@ -86,11 +86,10 @@ patternProperties:
properties: properties:
pinmux: pinmux:
description: | description:
Integer array, represents gpio pin number and mux setting. Integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are Supported pin number and mux varies for different SoCs, and are
defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
directly.
drive-strength: drive-strength:
enum: [2, 4, 6, 8, 10, 12, 14, 16] enum: [2, 4, 6, 8, 10, 12, 14, 16]
@ -100,20 +99,20 @@ patternProperties:
- type: boolean - type: boolean
- enum: [100, 101, 102, 103] - enum: [100, 101, 102, 103]
description: mt6795 pull down PUPD/R0/R1 type define value. description: mt6795 pull down PUPD/R0/R1 type define value.
description: | description:
For normal pull down type, it is not necessary to specify R1R0 For normal pull down type, it is not necessary to specify R1R0
values; When pull down type is PUPD/R0/R1, adding R1R0 defines values; When pull down type is PUPD/R0/R1, adding R1R0 defines
will set different resistance values. will set different resistance values.
bias-pull-up: bias-pull-up:
oneOf: oneOf:
- type: boolean - type: boolean
- enum: [100, 101, 102, 103] - enum: [100, 101, 102, 103]
description: mt6795 pull up PUPD/R0/R1 type define value. description: mt6795 pull up PUPD/R0/R1 type define value.
description: | description:
For normal pull up type, it is not necessary to specify R1R0 For normal pull up type, it is not necessary to specify R1R0
values; When pull up type is PUPD/R0/R1, adding R1R0 defines values; When pull up type is PUPD/R0/R1, adding R1R0 defines will
will set different resistance values. set different resistance values.
bias-disable: true bias-disable: true
@ -132,7 +131,8 @@ patternProperties:
mediatek,pull-up-adv: mediatek,pull-up-adv:
description: | description: |
Pull up setings for 2 pull resistors, R0 and R1. User can Pull up setings for 2 pull resistors, R0 and R1. User can
configure those special pins. Valid arguments are described as below: configure those special pins. Valid arguments are described as
below:
0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
@ -143,7 +143,8 @@ patternProperties:
mediatek,pull-down-adv: mediatek,pull-down-adv:
description: | description: |
Pull down settings for 2 pull resistors, R0 and R1. User can Pull down settings for 2 pull resistors, R0 and R1. User can
configure those special pins. Valid arguments are described as below: configure those special pins. Valid arguments are described as
below:
0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.

2
Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml
View File

@ -10,7 +10,7 @@ maintainers:
- Arınç ÜNAL <arinc.unal@arinc9.com> - Arınç ÜNAL <arinc.unal@arinc9.com>
- Sergio Paracuellos <sergio.paracuellos@gmail.com> - Sergio Paracuellos <sergio.paracuellos@gmail.com>
description: description: |
MediaTek MT7620 pin controller for MT7620, MT7628 and MT7688 SoCs. MediaTek MT7620 pin controller for MT7620, MT7628 and MT7688 SoCs.
The pin controller can only set the muxing of pin groups. Muxing individual The pin controller can only set the muxing of pin groups. Muxing individual
pins is not supported. There is no pinconf support. pins is not supported. There is no pinconf support.

2
Documentation/devicetree/bindings/pinctrl/mediatek,mt7621-pinctrl.yaml
View File

@ -10,7 +10,7 @@ maintainers:
- Arınç ÜNAL <arinc.unal@arinc9.com> - Arınç ÜNAL <arinc.unal@arinc9.com>
- Sergio Paracuellos <sergio.paracuellos@gmail.com> - Sergio Paracuellos <sergio.paracuellos@gmail.com>
description: description: |
MediaTek MT7621 pin controller for MT7621 SoC. MediaTek MT7621 pin controller for MT7621 SoC.
The pin controller can only set the muxing of pin groups. Muxing individual The pin controller can only set the muxing of pin groups. Muxing individual
pins is not supported. There is no pinconf support. pins is not supported. There is no pinconf support.

26
Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml
View File

@ -9,7 +9,7 @@ title: MediaTek MT7622 Pin Controller
maintainers: maintainers:
- Sean Wang <sean.wang@kernel.org> - Sean Wang <sean.wang@kernel.org>
description: |+ description:
The MediaTek's MT7622 Pin controller is used to control SoC pins. The MediaTek's MT7622 Pin controller is used to control SoC pins.
properties: properties:
@ -29,10 +29,10 @@ properties:
"#gpio-cells": "#gpio-cells":
const: 2 const: 2
description: | description:
Number of cells in GPIO specifier. Since the generic GPIO Number of cells in GPIO specifier. Since the generic GPIO binding is used,
binding is used, the amount of cells must be specified as 2. See the below the amount of cells must be specified as 2. See the below mentioned gpio
mentioned gpio binding representation for description of particular cells. binding representation for description of particular cells.
interrupt-controller: true interrupt-controller: true
@ -68,18 +68,18 @@ patternProperties:
'^mux(-|$)': '^mux(-|$)':
type: object type: object
additionalProperties: false additionalProperties: false
description: | description:
pinmux configuration nodes. pinmux configuration nodes.
$ref: "/schemas/pinctrl/pinmux-node.yaml" $ref: "/schemas/pinctrl/pinmux-node.yaml"
properties: properties:
function: function:
description: | description:
A string containing the name of the function to mux to the group. A string containing the name of the function to mux to the group.
enum: [emmc, eth, i2c, i2s, ir, led, flash, pcie, pmic, pwm, sd, enum: [emmc, eth, i2c, i2s, ir, led, flash, pcie, pmic, pwm, sd,
spi, tdm, uart, watchdog, wifi] spi, tdm, uart, watchdog, wifi]
groups: groups:
description: | description:
An array of strings. Each string contains the name of a group. An array of strings. Each string contains the name of a group.
drive-strength: drive-strength:
@ -247,18 +247,18 @@ patternProperties:
'^conf(-|$)': '^conf(-|$)':
type: object type: object
additionalProperties: false additionalProperties: false
description: | description:
pinconf configuration nodes. pinconf configuration nodes.
$ref: "/schemas/pinctrl/pincfg-node.yaml" $ref: "/schemas/pinctrl/pincfg-node.yaml"
properties: properties:
groups: groups:
description: | description:
An array of strings. Each string contains the name of a group. An array of strings. Each string contains the name of a group.
Valid values are the same as the pinmux node. Valid values are the same as the pinmux node.
pins: pins:
description: | description:
An array of strings. Each string contains the name of a pin. An array of strings. Each string contains the name of a pin.
enum: [GPIO_A, I2S1_IN, I2S1_OUT, I2S_BCLK, I2S_WS, I2S_MCLK, TXD0, enum: [GPIO_A, I2S1_IN, I2S1_OUT, I2S_BCLK, I2S_WS, I2S_MCLK, TXD0,
RXD0, SPI_WP, SPI_HOLD, SPI_CLK, SPI_MOSI, SPI_MISO, SPI_CS, RXD0, SPI_WP, SPI_HOLD, SPI_CLK, SPI_MOSI, SPI_MISO, SPI_CS,
@ -315,14 +315,14 @@ patternProperties:
enum: [0, 1] enum: [0, 1]
mediatek,tdsel: mediatek,tdsel:
description: | description:
An integer describing the steps for output level shifter duty An integer describing the steps for output level shifter duty
cycle when asserted (high pulse width adjustment). Valid arguments cycle when asserted (high pulse width adjustment). Valid arguments
are from 0 to 15. are from 0 to 15.
$ref: /schemas/types.yaml#/definitions/uint32 $ref: /schemas/types.yaml#/definitions/uint32
mediatek,rdsel: mediatek,rdsel:
description: | description:
An integer describing the steps for input level shifter duty cycle An integer describing the steps for input level shifter duty cycle
when asserted (high pulse width adjustment). Valid arguments are when asserted (high pulse width adjustment). Valid arguments are
from 0 to 63. from 0 to 63.

33
Documentation/devicetree/bindings/pinctrl/mediatek,mt7981-pinctrl.yaml
View File

@ -37,7 +37,7 @@ properties:
"#gpio-cells": "#gpio-cells":
const: 2 const: 2
description: > description:
Number of cells in GPIO specifier. Since the generic GPIO binding is used, Number of cells in GPIO specifier. Since the generic GPIO binding is used,
the amount of cells must be specified as 2. See the below mentioned gpio the amount of cells must be specified as 2. See the below mentioned gpio
binding representation for description of particular cells. binding representation for description of particular cells.
@ -111,7 +111,9 @@ patternProperties:
"watchdog1" "watchdog" 13 "watchdog1" "watchdog" 13
"udi" "udi" 9, 10, 11, 12, 13 "udi" "udi" 9, 10, 11, 12, 13
"drv_vbus" "usb" 14 "drv_vbus" "usb" 14
"emmc_45" "flash" 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25 "emmc_45" "flash" 15, 16, 17, 18, 19, 20, 21, 22, 23,
24, 25
"snfi" "flash" 16, 17, 18, 19, 20, 21 "snfi" "flash" 16, 17, 18, 19, 20, 21
"spi0" "spi" 16, 17, 18, 19 "spi0" "spi" 16, 17, 18, 19
"spi0_wp_hold" "spi" 20, 21 "spi0_wp_hold" "spi" 20, 21
@ -148,7 +150,7 @@ patternProperties:
"wf5g_led0" "led" 31 "wf5g_led0" "led" 31
"wf5g_led1" "led" 35 "wf5g_led1" "led" 35
"mt7531_int" "eth" 38 "mt7531_int" "eth" 38
"ant_sel" "ant" 14, 15, 16, 17, 18, 19, 20, 21, 22 "ant_sel" "ant" 14, 15, 16, 17, 18, 19, 20, 21, 22,
23, 24, 25, 34, 35 23, 24, 25, 34, 35
$ref: /schemas/pinctrl/pinmux-node.yaml $ref: /schemas/pinctrl/pinmux-node.yaml
@ -256,7 +258,8 @@ patternProperties:
then: then:
properties: properties:
groups: groups:
enum: [gbe_led0, gbe_led1, wf2g_led0, wf2g_led1, wf5g_led0, wf5g_led1] enum: [gbe_led0, gbe_led1, wf2g_led0, wf2g_led1, wf5g_led0,
wf5g_led1]
- if: - if:
properties: properties:
function: function:
@ -275,7 +278,8 @@ patternProperties:
properties: properties:
groups: groups:
items: items:
enum: [spi1_0, spi0, spi0_wp_hold, spi1_1, spi2, spi2_wp_hold] enum: [spi1_0, spi0, spi0_wp_hold, spi1_1, spi2,
spi2_wp_hold]
maxItems: 4 maxItems: 4
- if: - if:
properties: properties:
@ -332,13 +336,14 @@ patternProperties:
JTAG_JTDO, JTAG_JTDI, JTAG_JTMS, JTAG_JTCLK, JTAG_JTRST_N, JTAG_JTDO, JTAG_JTDI, JTAG_JTMS, JTAG_JTCLK, JTAG_JTRST_N,
WO_JTAG_JTDO, WO_JTAG_JTDI, WO_JTAG_JTMS, WO_JTAG_JTCLK, WO_JTAG_JTDO, WO_JTAG_JTDI, WO_JTAG_JTMS, WO_JTAG_JTCLK,
WO_JTAG_JTRST_N, USB_VBUS, PWM0, SPI0_CLK, SPI0_MOSI, WO_JTAG_JTRST_N, USB_VBUS, PWM0, SPI0_CLK, SPI0_MOSI,
SPI0_MISO, SPI0_CS, SPI0_HOLD, SPI0_WP, SPI1_CLK, SPI1_MOSI, SPI0_MISO, SPI0_CS, SPI0_HOLD, SPI0_WP, SPI1_CLK,
SPI1_MISO, SPI1_CS, SPI2_CLK, SPI2_MOSI, SPI2_MISO, SPI2_CS, SPI1_MOSI, SPI1_MISO, SPI1_CS, SPI2_CLK, SPI2_MOSI,
SPI2_HOLD, SPI2_WP, UART0_RXD, UART0_TXD, PCIE_CLK_REQ, SPI2_MISO, SPI2_CS, SPI2_HOLD, SPI2_WP, UART0_RXD,
PCIE_WAKE_N, SMI_MDC, SMI_MDIO, GBE_INT, GBE_RESET, UART0_TXD, PCIE_CLK_REQ, PCIE_WAKE_N, SMI_MDC, SMI_MDIO,
WF_DIG_RESETB, WF_CBA_RESETB, WF_XO_REQ, WF_TOP_CLK, GBE_INT, GBE_RESET, WF_DIG_RESETB, WF_CBA_RESETB,
WF_TOP_DATA, WF_HB1, WF_HB2, WF_HB3, WF_HB4, WF_HB0, WF_XO_REQ, WF_TOP_CLK, WF_TOP_DATA, WF_HB1, WF_HB2, WF_HB3,
WF_HB0_B, WF_HB5, WF_HB6, WF_HB7, WF_HB8, WF_HB9, WF_HB10] WF_HB4, WF_HB0, WF_HB0_B, WF_HB5, WF_HB6, WF_HB7, WF_HB8,
WF_HB9, WF_HB10]
maxItems: 57 maxItems: 57
bias-disable: true bias-disable: true
@ -348,7 +353,7 @@ patternProperties:
- type: boolean - type: boolean
description: normal pull up. description: normal pull up.
- enum: [100, 101, 102, 103] - enum: [100, 101, 102, 103]
description: > description:
PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
dt-bindings/pinctrl/mt65xx.h. dt-bindings/pinctrl/mt65xx.h.
@ -357,7 +362,7 @@ patternProperties:
- type: boolean - type: boolean
description: normal pull down. description: normal pull down.
- enum: [100, 101, 102, 103] - enum: [100, 101, 102, 103]
description: > description:
PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
dt-bindings/pinctrl/mt65xx.h. dt-bindings/pinctrl/mt65xx.h.

68
Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
View File

@ -9,7 +9,7 @@ title: MediaTek MT7986 Pin Controller
maintainers: maintainers:
- Sean Wang <sean.wang@kernel.org> - Sean Wang <sean.wang@kernel.org>
description: |+ description:
The MediaTek's MT7986 Pin controller is used to control SoC pins. The MediaTek's MT7986 Pin controller is used to control SoC pins.
properties: properties:
@ -37,15 +37,15 @@ properties:
"#gpio-cells": "#gpio-cells":
const: 2 const: 2
description: | description:
Number of cells in GPIO specifier. Since the generic GPIO Number of cells in GPIO specifier. Since the generic GPIO binding is used,
binding is used, the amount of cells must be specified as 2. See the below the amount of cells must be specified as 2. See the below mentioned gpio
mentioned gpio binding representation for description of particular cells. binding representation for description of particular cells.
gpio-ranges: gpio-ranges:
minItems: 1 minItems: 1
maxItems: 5 maxItems: 5
description: | description:
GPIO valid number range. GPIO valid number range.
interrupt-controller: true interrupt-controller: true
@ -81,7 +81,7 @@ patternProperties:
The following table shows the effective values of "group", "function" The following table shows the effective values of "group", "function"
properties and chip pinout pins properties and chip pinout pins
groups function pins (in pin#) groups function pins (in pin#)
--------------------------------------------------------------------- ---------------------------------------------------------------------
"watchdog" "watchdog" 0 "watchdog" "watchdog" 0
"wifi_led" "led" 1, 2 "wifi_led" "led" 1, 2
@ -97,8 +97,9 @@ patternProperties:
"pwm1_0" "pwm" 22, "pwm1_0" "pwm" 22,
"snfi" "flash" 23, 24, 25, 26, 27, 28 "snfi" "flash" 23, 24, 25, 26, 27, 28
"spi1_2" "spi" 29, 30, 31, 32 "spi1_2" "spi" 29, 30, 31, 32
"emmc_45" "emmc" 22, 23, 24, 25, 26, 27, 28, 29, 30, "emmc_45" "emmc" 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
31, 32 32
"spi1_1" "spi" 23, 24, 25, 26 "spi1_1" "spi" 23, 24, 25, 26
"uart1_2_rx_tx" "uart" 29, 30 "uart1_2_rx_tx" "uart" 29, 30
"uart1_2_cts_rts" "uart" 31, 32 "uart1_2_cts_rts" "uart" 31, 32
@ -115,8 +116,9 @@ patternProperties:
"pcie_pereset" "pcie" 41 "pcie_pereset" "pcie" 41
"uart1" "uart" 42, 43, 44, 45 "uart1" "uart" 42, 43, 44, 45
"uart2" "uart" 46, 47, 48, 49 "uart2" "uart" 46, 47, 48, 49
"emmc_51" "emmc" 50, 51, 52, 53, 54, 55, 56, 57, 57, "emmc_51" "emmc" 50, 51, 52, 53, 54, 55, 56, 57, 58, 59,
59, 60, 61 60, 61
"pcm" "audio" 62, 63, 64, 65 "pcm" "audio" 62, 63, 64, 65
"i2s" "audio" 62, 63, 64, 65 "i2s" "audio" 62, 63, 64, 65
"switch_int" "eth" 66 "switch_int" "eth" 66
@ -129,18 +131,17 @@ patternProperties:
$ref: "/schemas/pinctrl/pinmux-node.yaml" $ref: "/schemas/pinctrl/pinmux-node.yaml"
properties: properties:
function: function:
description: | description:
A string containing the name of the function to mux to the group. A string containing the name of the function to mux to the group.
There is no "audio", "pcie" functions on mt7986b, you can only use There is no "audio", "pcie" functions on mt7986b, you can only use
those functions on mt7986a. those functions on mt7986a.
enum: [audio, emmc, eth, i2c, led, flash, pcie, pwm, spi, uart, enum: [audio, emmc, eth, i2c, led, flash, pcie, pwm, spi, uart,
watchdog, wifi] watchdog, wifi]
groups: groups:
description: | description:
An array of strings. Each string contains the name of a group. An array of strings. Each string contains the name of a group.
There is no "pcie_pereset", "uart1", "uart2" "emmc_51", "pcm", There is no "pcie_pereset", "uart1", "uart2" "emmc_51", "pcm", and
and "i2s" groups on mt7986b, you can only use those groups on "i2s" groups on mt7986b, you can only use those groups on mt7986a.
mt7986a.
required: required:
- function - function
- groups - groups
@ -258,29 +259,30 @@ patternProperties:
'.*conf.*': '.*conf.*':
type: object type: object
additionalProperties: false additionalProperties: false
description: | description:
pinconf configuration nodes. pinconf configuration nodes.
$ref: "/schemas/pinctrl/pincfg-node.yaml" $ref: "/schemas/pinctrl/pincfg-node.yaml"
properties: properties:
pins: pins:
description: | description:
An array of strings. Each string contains the name of a pin. An array of strings. Each string contains the name of a pin. There
There is no PIN 41 to PIN 65 above on mt7686b, you can only use is no PIN 41 to PIN 65 above on mt7686b, you can only use those
those pins on mt7986a. pins on mt7986a.
items: items:
enum: [SYS_WATCHDOG, WF2G_LED, WF5G_LED, I2C_SCL, I2C_SDA, GPIO_0, enum: [SYS_WATCHDOG, WF2G_LED, WF5G_LED, I2C_SCL, I2C_SDA, GPIO_0,
GPIO_1, GPIO_2, GPIO_3, GPIO_4, GPIO_5, GPIO_6, GPIO_7, GPIO_1, GPIO_2, GPIO_3, GPIO_4, GPIO_5, GPIO_6, GPIO_7,
GPIO_8, GPIO_9, GPIO_10, GPIO_11, GPIO_12, GPIO_13, GPIO_14, GPIO_8, GPIO_9, GPIO_10, GPIO_11, GPIO_12, GPIO_13,
GPIO_15, PWM0, PWM1, SPI0_CLK, SPI0_MOSI, SPI0_MISO, SPI0_CS, GPIO_14, GPIO_15, PWM0, PWM1, SPI0_CLK, SPI0_MOSI,
SPI0_HOLD, SPI0_WP, SPI1_CLK, SPI1_MOSI, SPI1_MISO, SPI1_CS, SPI0_MISO, SPI0_CS, SPI0_HOLD, SPI0_WP, SPI1_CLK,
SPI2_CLK, SPI2_MOSI, SPI2_MISO, SPI2_CS, SPI2_HOLD, SPI2_WP, SPI1_MOSI, SPI1_MISO, SPI1_CS, SPI2_CLK, SPI2_MOSI,
UART0_RXD, UART0_TXD, PCIE_PERESET_N, UART1_RXD, UART1_TXD, SPI2_MISO, SPI2_CS, SPI2_HOLD, SPI2_WP, UART0_RXD,
UART1_CTS, UART1_RTS, UART2_RXD, UART2_TXD, UART2_CTS, UART0_TXD, PCIE_PERESET_N, UART1_RXD, UART1_TXD, UART1_CTS,
UART2_RTS, EMMC_DATA_0, EMMC_DATA_1, EMMC_DATA_2, UART1_RTS, UART2_RXD, UART2_TXD, UART2_CTS, UART2_RTS,
EMMC_DATA_3, EMMC_DATA_4, EMMC_DATA_5, EMMC_DATA_6, EMMC_DATA_0, EMMC_DATA_1, EMMC_DATA_2, EMMC_DATA_3,
EMMC_DATA_7, EMMC_CMD, EMMC_CK, EMMC_DSL, EMMC_RSTB, PCM_DTX, EMMC_DATA_4, EMMC_DATA_5, EMMC_DATA_6, EMMC_DATA_7,
PCM_DRX, PCM_CLK, PCM_FS, MT7531_INT, SMI_MDC, SMI_MDIO, EMMC_CMD, EMMC_CK, EMMC_DSL, EMMC_RSTB, PCM_DTX, PCM_DRX,
PCM_CLK, PCM_FS, MT7531_INT, SMI_MDC, SMI_MDIO,
WF0_DIG_RESETB, WF0_CBA_RESETB, WF0_XO_REQ, WF0_TOP_CLK, WF0_DIG_RESETB, WF0_CBA_RESETB, WF0_XO_REQ, WF0_TOP_CLK,
WF0_TOP_DATA, WF0_HB1, WF0_HB2, WF0_HB3, WF0_HB4, WF0_HB0, WF0_TOP_DATA, WF0_HB1, WF0_HB2, WF0_HB3, WF0_HB4, WF0_HB0,
WF0_HB0_B, WF0_HB5, WF0_HB6, WF0_HB7, WF0_HB8, WF0_HB9, WF0_HB0_B, WF0_HB5, WF0_HB6, WF0_HB7, WF0_HB8, WF0_HB9,
@ -297,7 +299,7 @@ patternProperties:
- type: boolean - type: boolean
description: normal pull up. description: normal pull up.
- enum: [100, 101, 102, 103] - enum: [100, 101, 102, 103]
description: | description:
PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
dt-bindings/pinctrl/mt65xx.h. dt-bindings/pinctrl/mt65xx.h.
@ -306,7 +308,7 @@ patternProperties:
- type: boolean - type: boolean
description: normal pull down. description: normal pull down.
- enum: [100, 101, 102, 103] - enum: [100, 101, 102, 103]
description: | description:
PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in
dt-bindings/pinctrl/mt65xx.h. dt-bindings/pinctrl/mt65xx.h.

26
Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml
View File

@ -9,7 +9,7 @@ title: MediaTek MT8183 Pin Controller
maintainers: maintainers:
- Sean Wang <sean.wang@kernel.org> - Sean Wang <sean.wang@kernel.org>
description: |+ description:
The MediaTek's MT8183 Pin controller is used to control SoC pins. The MediaTek's MT8183 Pin controller is used to control SoC pins.
properties: properties:
@ -37,15 +37,15 @@ properties:
"#gpio-cells": "#gpio-cells":
const: 2 const: 2
description: | description:
Number of cells in GPIO specifier. Since the generic GPIO Number of cells in GPIO specifier. Since the generic GPIO binding is used,
binding is used, the amount of cells must be specified as 2. See the below the amount of cells must be specified as 2. See the below mentioned gpio
mentioned gpio binding representation for description of particular cells. binding representation for description of particular cells.
gpio-ranges: gpio-ranges:
minItems: 1 minItems: 1
maxItems: 5 maxItems: 5
description: | description:
GPIO valid number range. GPIO valid number range.
interrupt-controller: true interrupt-controller: true
@ -74,7 +74,7 @@ patternProperties:
'^pins': '^pins':
type: object type: object
additionalProperties: false additionalProperties: false
description: | description:
A pinctrl node should contain at least one subnodes representing the A pinctrl node should contain at least one subnodes representing the
pinctrl groups available on the machine. Each subnode will list the pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer pins it needs, and how they should be configured, with regard to muxer
@ -85,7 +85,7 @@ patternProperties:
properties: properties:
pinmux: pinmux:
description: description:
integer array, represents gpio pin number and mux setting. Integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are Supported pin number and mux varies for different SoCs, and are
defined as macros in <soc>-pinfunc.h directly. defined as macros in <soc>-pinfunc.h directly.
@ -139,7 +139,8 @@ patternProperties:
mediatek,pull-up-adv: mediatek,pull-up-adv:
description: | description: |
Pull up setings for 2 pull resistors, R0 and R1. User can Pull up setings for 2 pull resistors, R0 and R1. User can
configure those special pins. Valid arguments are described as below: configure those special pins. Valid arguments are described as
below:
0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
@ -150,7 +151,8 @@ patternProperties:
mediatek,pull-down-adv: mediatek,pull-down-adv:
description: | description: |
Pull down settings for 2 pull resistors, R0 and R1. User can Pull down settings for 2 pull resistors, R0 and R1. User can
configure those special pins. Valid arguments are described as below: configure those special pins. Valid arguments are described as
below:
0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
@ -159,14 +161,14 @@ patternProperties:
enum: [0, 1, 2, 3] enum: [0, 1, 2, 3]
mediatek,tdsel: mediatek,tdsel:
description: | description:
An integer describing the steps for output level shifter duty An integer describing the steps for output level shifter duty
cycle when asserted (high pulse width adjustment). Valid arguments cycle when asserted (high pulse width adjustment). Valid arguments
are from 0 to 15. are from 0 to 15.
$ref: /schemas/types.yaml#/definitions/uint32 $ref: /schemas/types.yaml#/definitions/uint32
mediatek,rdsel: mediatek,rdsel:
description: | description:
An integer describing the steps for input level shifter duty cycle An integer describing the steps for input level shifter duty cycle
when asserted (high pulse width adjustment). Valid arguments are when asserted (high pulse width adjustment). Valid arguments are
from 0 to 63. from 0 to 63.

47
Documentation/devicetree/bindings/pinctrl/mediatek,mt8186-pinctrl.yaml
View File

@ -9,7 +9,7 @@ title: MediaTek MT8186 Pin Controller
maintainers: maintainers:
- Sean Wang <sean.wang@mediatek.com> - Sean Wang <sean.wang@mediatek.com>
description: | description:
The MediaTek's MT8186 Pin controller is used to control SoC pins. The MediaTek's MT8186 Pin controller is used to control SoC pins.
properties: properties:
@ -19,10 +19,10 @@ properties:
gpio-controller: true gpio-controller: true
'#gpio-cells': '#gpio-cells':
description: | description:
Number of cells in GPIO specifier. Since the generic GPIO binding is used, Number of cells in GPIO specifier. Since the generic GPIO binding is used,
the amount of cells must be specified as 2. See the below the amount of cells must be specified as 2. See the below mentioned gpio
mentioned gpio binding representation for description of particular cells. binding representation for description of particular cells.
const: 2 const: 2
gpio-ranges: gpio-ranges:
@ -31,14 +31,14 @@ properties:
gpio-line-names: true gpio-line-names: true
reg: reg:
description: | description:
Physical address base for gpio base registers. There are 8 different GPIO Physical address base for GPIO base registers. There are 8 different GPIO
physical address base in mt8186. physical address base in mt8186.
maxItems: 8 maxItems: 8
reg-names: reg-names:
description: | description:
Gpio base register names. GPIO base register names.
items: items:
- const: iocfg0 - const: iocfg0
- const: iocfg_lt - const: iocfg_lt
@ -60,9 +60,9 @@ properties:
mediatek,rsel-resistance-in-si-unit: mediatek,rsel-resistance-in-si-unit:
type: boolean type: boolean
description: | description:
Identifying i2c pins pull up/down type which is RSEL. It can support Identifying i2c pins pull up/down type which is RSEL. It can support RSEL
RSEL define or si unit value(ohm) to set different resistance. define or si unit value(ohm) to set different resistance.
# PIN CONFIGURATION NODES # PIN CONFIGURATION NODES
patternProperties: patternProperties:
@ -77,8 +77,8 @@ patternProperties:
A pinctrl node should contain at least one subnodes representing the A pinctrl node should contain at least one subnodes representing the
pinctrl groups available on the machine. Each subnode will list the pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer pins it needs, and how they should be configured, with regard to muxer
configuration, pullups, drive strength, input enable/disable and configuration, pullups, drive strength, input enable/disable and input
input schmitt. schmitt.
An example of using macro: An example of using macro:
pincontroller { pincontroller {
/* GPIO0 set as multifunction GPIO0 */ /* GPIO0 set as multifunction GPIO0 */
@ -98,11 +98,10 @@ patternProperties:
properties: properties:
pinmux: pinmux:
description: | description:
Integer array, represents gpio pin number and mux setting. Integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are Supported pin number and mux varies for different SoCs, and are
defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
directly.
drive-strength: drive-strength:
enum: [2, 4, 6, 8, 10, 12, 14, 16] enum: [2, 4, 6, 8, 10, 12, 14, 16]
@ -129,10 +128,10 @@ patternProperties:
For pull down type is RSEL, it can add RSEL define & resistance For pull down type is RSEL, it can add RSEL define & resistance
value(ohm) to set different resistance by identifying property value(ohm) to set different resistance by identifying property
"mediatek,rsel-resistance-in-si-unit". "mediatek,rsel-resistance-in-si-unit".
It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001" It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001" &
& "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" define in
define in mt8186. It can also support resistance value(ohm) mt8186. It can also support resistance value(ohm) "75000" & "5000"
"75000" & "5000" in mt8186. in mt8186.
An example of using RSEL define: An example of using RSEL define:
pincontroller { pincontroller {
i2c0_pin { i2c0_pin {
@ -174,10 +173,10 @@ patternProperties:
For pull up type is RSEL, it can add RSEL define & resistance For pull up type is RSEL, it can add RSEL define & resistance
value(ohm) to set different resistance by identifying property value(ohm) to set different resistance by identifying property
"mediatek,rsel-resistance-in-si-unit". "mediatek,rsel-resistance-in-si-unit".
It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001" It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001" &
& "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" define in
define in mt8186. It can also support resistance value(ohm) mt8186. It can also support resistance value(ohm) "1000" & "5000"
"1000" & "5000" & "10000" & "75000" in mt8186. & "10000" & "75000" in mt8186.
An example of using si unit resistance value(ohm): An example of using si unit resistance value(ohm):
&pio { &pio {
mediatek,rsel-resistance-in-si-unit; mediatek,rsel-resistance-in-si-unit;

74
Documentation/devicetree/bindings/pinctrl/mediatek,mt8188-pinctrl.yaml
View File

@ -9,7 +9,7 @@ title: MediaTek MT8188 Pin Controller
maintainers: maintainers:
- Hui Liu <hui.liu@mediatek.com> - Hui Liu <hui.liu@mediatek.com>
description: | description:
The MediaTek's MT8188 Pin controller is used to control SoC pins. The MediaTek's MT8188 Pin controller is used to control SoC pins.
properties: properties:
@ -19,10 +19,10 @@ properties:
gpio-controller: true gpio-controller: true
'#gpio-cells': '#gpio-cells':
description: | description:
Number of cells in GPIO specifier, should be two. The first cell Number of cells in GPIO specifier, should be two. The first cell is the
is the pin number, the second cell is used to specify optional pin number, the second cell is used to specify optional parameters which
parameters which are defined in <dt-bindings/gpio/gpio.h>. are defined in <dt-bindings/gpio/gpio.h>.
const: 2 const: 2
gpio-ranges: gpio-ranges:
@ -59,10 +59,11 @@ properties:
mediatek,rsel-resistance-in-si-unit: mediatek,rsel-resistance-in-si-unit:
type: boolean type: boolean
description: | description:
We provide two methods to select the resistance for I2C when pull up or pull down. We provide two methods to select the resistance for I2C when pull up or
The first is by RSEL definition value, another one is by resistance value(ohm). pull down. The first is by RSEL definition value, another one is by
This flag is used to identify if the method is resistance(si unit) value. resistance value(ohm). This flag is used to identify if the method is
resistance(si unit) value.
# PIN CONFIGURATION NODES # PIN CONFIGURATION NODES
patternProperties: patternProperties:
@ -75,16 +76,16 @@ patternProperties:
type: object type: object
$ref: "/schemas/pinctrl/pincfg-node.yaml" $ref: "/schemas/pinctrl/pincfg-node.yaml"
additionalProperties: false additionalProperties: false
description: | description:
A pinctrl node should contain at least one subnode representing the A pinctrl node should contain at least one subnode representing the
pinctrl groups available on the machine. Each subnode will list the pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer pins it needs, and how they should be configured, with regard to muxer
configuration, pullups, drive strength, input enable/disable and configuration, pullups, drive strength, input enable/disable and input
input schmitt. schmitt.
properties: properties:
pinmux: pinmux:
description: | description:
Integer array, represents gpio pin number and mux setting. Integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are Supported pin number and mux varies for different SoCs, and are
defined as macros in dt-bindings/pinctrl/mediatek,<soc>-pinfunc.h defined as macros in dt-bindings/pinctrl/mediatek,<soc>-pinfunc.h
@ -106,18 +107,21 @@ patternProperties:
- enum: [75000, 5000] - enum: [75000, 5000]
description: mt8188 pull down RSEL type si unit value(ohm). description: mt8188 pull down RSEL type si unit value(ohm).
description: | description: |
For pull down type is normal, it doesn't need add RSEL & R1R0 define For pull down type is normal, it doesn't need add RSEL & R1R0
and resistance value. define and resistance value.
For pull down type is PUPD/R0/R1 type, it can add R1R0 define to For pull down type is PUPD/R0/R1 type, it can add R1R0 define to
set different resistance. It can support "MTK_PUPD_SET_R1R0_00" & set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
"MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & "MTK_PUPD_SET_R1R0_11" "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" &
define in mt8188. "MTK_PUPD_SET_R1R0_11" define in mt8188.
For pull down type is RSEL, it can add RSEL define & resistance value(ohm) For pull down type is RSEL, it can add RSEL define & resistance
to set different resistance by identifying property "mediatek,rsel-resistance-in-si-unit". value(ohm) to set different resistance by identifying property
It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001" "mediatek,rsel-resistance-in-si-unit". It can support
& "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" & "MTK_PULL_SET_RSEL_100" "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001" &
& "MTK_PULL_SET_RSEL_101" & "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111" "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" &
define in mt8188. It can also support resistance value(ohm) "75000" & "5000" in mt8188. "MTK_PULL_SET_RSEL_100" & "MTK_PULL_SET_RSEL_101" &
"MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111" define in
mt8188. It can also support resistance value(ohm) "75000" & "5000"
in mt8188.
bias-pull-up: bias-pull-up:
oneOf: oneOf:
@ -131,17 +135,19 @@ patternProperties:
description: | description: |
For pull up type is normal, it don't need add RSEL & R1R0 define For pull up type is normal, it don't need add RSEL & R1R0 define
and resistance value. and resistance value.
For pull up type is PUPD/R0/R1 type, it can add R1R0 define to For pull up type is PUPD/R0/R1 type, it can add R1R0 define to set
set different resistance. It can support "MTK_PUPD_SET_R1R0_00" & different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
"MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & "MTK_PUPD_SET_R1R0_11" "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" &
define in mt8188. "MTK_PUPD_SET_R1R0_11" define in mt8188.
For pull up type is RSEL, it can add RSEL define & resistance value(ohm) For pull up type is RSEL, it can add RSEL define & resistance
to set different resistance by identifying property "mediatek,rsel-resistance-in-si-unit". value(ohm) to set different resistance by identifying property
It can support "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001" "mediatek,rsel-resistance-in-si-unit". It can support
& "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" & "MTK_PULL_SET_RSEL_100" "MTK_PULL_SET_RSEL_000" & "MTK_PULL_SET_RSEL_001" &
& "MTK_PULL_SET_RSEL_101" & "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111" "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" &
define in mt8188. It can also support resistance value(ohm) "MTK_PULL_SET_RSEL_100" & "MTK_PULL_SET_RSEL_101" &
"1000" & "1500" & "2000" & "3000" & "4000" & "5000" & "10000" & "75000" in mt8188. "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111" define in
mt8188. It can also support resistance value(ohm) "1000" & "1500"
& "2000" & "3000" & "4000" & "5000" & "10000" & "75000" in mt8188.
bias-disable: true bias-disable: true

47
Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml
View File

@ -9,7 +9,7 @@ title: MediaTek MT8192 Pin Controller
maintainers: maintainers:
- Sean Wang <sean.wang@mediatek.com> - Sean Wang <sean.wang@mediatek.com>
description: | description:
The MediaTek's MT8192 Pin controller is used to control SoC pins. The MediaTek's MT8192 Pin controller is used to control SoC pins.
properties: properties:
@ -19,27 +19,27 @@ properties:
gpio-controller: true gpio-controller: true
'#gpio-cells': '#gpio-cells':
description: | description:
Number of cells in GPIO specifier. Since the generic GPIO binding is used, Number of cells in GPIO specifier. Since the generic GPIO binding is used,
the amount of cells must be specified as 2. See the below the amount of cells must be specified as 2. See the below mentioned gpio
mentioned gpio binding representation for description of particular cells. binding representation for description of particular cells.
const: 2 const: 2
gpio-ranges: gpio-ranges:
description: gpio valid number range. description: GPIO valid number range.
maxItems: 1 maxItems: 1
gpio-line-names: true gpio-line-names: true
reg: reg:
description: | description:
Physical address base for gpio base registers. There are 11 GPIO Physical address base for GPIO base registers. There are 11 GPIO physical
physical address base in mt8192. address base in mt8192.
maxItems: 11 maxItems: 11
reg-names: reg-names:
description: | description:
Gpio base register names. GPIO base register names.
maxItems: 11 maxItems: 11
interrupt-controller: true interrupt-controller: true
@ -59,25 +59,26 @@ patternProperties:
patternProperties: patternProperties:
'^pins': '^pins':
type: object type: object
description: | description:
A pinctrl node should contain at least one subnodes representing the A pinctrl node should contain at least one subnodes representing the
pinctrl groups available on the machine. Each subnode will list the pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer pins it needs, and how they should be configured, with regard to muxer
configuration, pullups, drive strength, input enable/disable and configuration, pullups, drive strength, input enable/disable and input
input schmitt. schmitt.
$ref: "pinmux-node.yaml" $ref: "pinmux-node.yaml"
properties: properties:
pinmux: pinmux:
description: | description:
Integer array, represents gpio pin number and mux setting. Integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are defined Supported pin number and mux varies for different SoCs, and are
as macros in dt-bindings/pinctrl/<soc>-pinfunc.h directly. defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
drive-strength: drive-strength:
description: | description:
It can support some arguments, such as MTK_DRIVE_4mA, MTK_DRIVE_6mA, etc. See It can support some arguments, such as MTK_DRIVE_4mA,
dt-bindings/pinctrl/mt65xx.h. It can only support 2/4/6/8/10/12/14/16mA in mt8192. MTK_DRIVE_6mA, etc. See dt-bindings/pinctrl/mt65xx.h. It can only
support 2/4/6/8/10/12/14/16mA in mt8192.
enum: [2, 4, 6, 8, 10, 12, 14, 16] enum: [2, 4, 6, 8, 10, 12, 14, 16]
drive-strength-microamp: drive-strength-microamp:
@ -91,8 +92,8 @@ patternProperties:
description: PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0_ description: PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0_
defines in dt-bindings/pinctrl/mt65xx.h. defines in dt-bindings/pinctrl/mt65xx.h.
- enum: [200, 201, 202, 203] - enum: [200, 201, 202, 203]
description: RSEL pull down type. See MTK_PULL_SET_RSEL_ description: RSEL pull down type. See MTK_PULL_SET_RSEL_ defines
defines in dt-bindings/pinctrl/mt65xx.h. in dt-bindings/pinctrl/mt65xx.h.
bias-pull-up: bias-pull-up:
oneOf: oneOf:
@ -102,8 +103,8 @@ patternProperties:
description: PUPD/R1/R0 pull up type. See MTK_PUPD_SET_R1R0_ description: PUPD/R1/R0 pull up type. See MTK_PUPD_SET_R1R0_
defines in dt-bindings/pinctrl/mt65xx.h. defines in dt-bindings/pinctrl/mt65xx.h.
- enum: [200, 201, 202, 203] - enum: [200, 201, 202, 203]
description: RSEL pull up type. See MTK_PULL_SET_RSEL_ description: RSEL pull up type. See MTK_PULL_SET_RSEL_ defines
defines in dt-bindings/pinctrl/mt65xx.h. in dt-bindings/pinctrl/mt65xx.h.
bias-disable: true bias-disable: true

41
Documentation/devicetree/bindings/pinctrl/mediatek,mt8195-pinctrl.yaml
View File

@ -9,7 +9,7 @@ title: MediaTek MT8195 Pin Controller
maintainers: maintainers:
- Sean Wang <sean.wang@mediatek.com> - Sean Wang <sean.wang@mediatek.com>
description: | description:
The MediaTek's MT8195 Pin controller is used to control SoC pins. The MediaTek's MT8195 Pin controller is used to control SoC pins.
properties: properties:
@ -19,27 +19,27 @@ properties:
gpio-controller: true gpio-controller: true
'#gpio-cells': '#gpio-cells':
description: | description:
Number of cells in GPIO specifier. Since the generic GPIO binding is used, Number of cells in GPIO specifier. Since the generic GPIO binding is used,
the amount of cells must be specified as 2. See the below the amount of cells must be specified as 2. See the below mentioned gpio
mentioned gpio binding representation for description of particular cells. binding representation for description of particular cells.
const: 2 const: 2
gpio-ranges: gpio-ranges:
description: gpio valid number range. description: GPIO valid number range.
maxItems: 1 maxItems: 1
gpio-line-names: true gpio-line-names: true
reg: reg:
description: | description:
Physical address base for gpio base registers. There are 8 GPIO Physical address base for GPIO base registers. There are 8 GPIO physical
physical address base in mt8195. address base in mt8195.
maxItems: 8 maxItems: 8
reg-names: reg-names:
description: | description:
Gpio base register names. GPIO base register names.
maxItems: 8 maxItems: 8
interrupt-controller: true interrupt-controller: true
@ -53,9 +53,9 @@ properties:
mediatek,rsel-resistance-in-si-unit: mediatek,rsel-resistance-in-si-unit:
type: boolean type: boolean
description: | description:
Identifying i2c pins pull up/down type which is RSEL. It can support Identifying i2c pins pull up/down type which is RSEL. It can support RSEL
RSEL define or si unit value(ohm) to set different resistance. define or si unit value(ohm) to set different resistance.
# PIN CONFIGURATION NODES # PIN CONFIGURATION NODES
patternProperties: patternProperties:
@ -70,8 +70,8 @@ patternProperties:
A pinctrl node should contain at least one subnodes representing the A pinctrl node should contain at least one subnodes representing the
pinctrl groups available on the machine. Each subnode will list the pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer pins it needs, and how they should be configured, with regard to muxer
configuration, pullups, drive strength, input enable/disable and configuration, pullups, drive strength, input enable/disable and input
input schmitt. schmitt.
An example of using macro: An example of using macro:
pincontroller { pincontroller {
/* GPIO0 set as multifunction GPIO0 */ /* GPIO0 set as multifunction GPIO0 */
@ -91,11 +91,10 @@ patternProperties:
properties: properties:
pinmux: pinmux:
description: | description:
Integer array, represents gpio pin number and mux setting. Integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are Supported pin number and mux varies for different SoCs, and are
defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
directly.
drive-strength: drive-strength:
enum: [2, 4, 6, 8, 10, 12, 14, 16] enum: [2, 4, 6, 8, 10, 12, 14, 16]
@ -174,9 +173,9 @@ patternProperties:
& "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011"
& "MTK_PULL_SET_RSEL_100" & "MTK_PULL_SET_RSEL_101" & "MTK_PULL_SET_RSEL_100" & "MTK_PULL_SET_RSEL_101"
& "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111" & "MTK_PULL_SET_RSEL_110" & "MTK_PULL_SET_RSEL_111"
define in mt8195. It can also support resistance value(ohm) define in mt8195. It can also support resistance value(ohm) "1000"
"1000" & "1500" & "2000" & "3000" & "4000" & "5000" & "10000" & & "1500" & "2000" & "3000" & "4000" & "5000" & "10000" & "75000"
"75000" in mt8195. in mt8195.
An example of using RSEL define: An example of using RSEL define:
pincontroller { pincontroller {
i2c0-pins { i2c0-pins {

28
Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml
View File

@ -10,7 +10,7 @@ maintainers:
- Zhiyong Tao <zhiyong.tao@mediatek.com> - Zhiyong Tao <zhiyong.tao@mediatek.com>
- Bernhard Rosenkränzer <bero@baylibre.com> - Bernhard Rosenkränzer <bero@baylibre.com>
description: | description:
The MediaTek's MT8365 Pin controller is used to control SoC pins. The MediaTek's MT8365 Pin controller is used to control SoC pins.
properties: properties:
@ -26,17 +26,17 @@ properties:
maxItems: 1 maxItems: 1
minItems: 1 minItems: 1
maxItems: 2 maxItems: 2
description: | description:
Should be phandles of the syscfg node. Should be phandles of the syscfg node.
gpio-controller: true gpio-controller: true
"#gpio-cells": "#gpio-cells":
const: 2 const: 2
description: | description:
Number of cells in GPIO specifier. Since the generic GPIO Number of cells in GPIO specifier. Since the generic GPIO binding is used,
binding is used, the amount of cells must be specified as 2. See the below the amount of cells must be specified as 2. See the below mentioned gpio
mentioned gpio binding representation for description of particular cells. binding representation for description of particular cells.
interrupt-controller: true interrupt-controller: true
@ -54,7 +54,7 @@ patternProperties:
"pins$": "pins$":
type: object type: object
additionalProperties: false additionalProperties: false
description: | description:
A pinctrl node should contain at least one subnode representing the A pinctrl node should contain at least one subnode representing the
pinctrl groups available on the machine. Each subnode will list the pinctrl groups available on the machine. Each subnode will list the
pins it needs, and how they should be configured, with regard to muxer pins it needs, and how they should be configured, with regard to muxer
@ -65,14 +65,14 @@ patternProperties:
properties: properties:
pinmux: pinmux:
description: description:
integer array, represents gpio pin number and mux setting. Integer array, represents gpio pin number and mux setting.
Supported pin number and mux varies for different SoCs, and are Supported pin number and mux varies for different SoCs, and are
defined as macros in <soc>-pinfunc.h directly. defined as macros in <soc>-pinfunc.h directly.
bias-disable: true bias-disable: true
bias-pull-up: bias-pull-up:
description: | description:
Besides generic pinconfig options, it can be used as the pull up Besides generic pinconfig options, it can be used as the pull up
settings for 2 pull resistors, R0 and R1. User can configure those settings for 2 pull resistors, R0 and R1. User can configure those
special pins. special pins.
@ -120,7 +120,8 @@ patternProperties:
mediatek,pull-up-adv: mediatek,pull-up-adv:
description: | description: |
Pull up setings for 2 pull resistors, R0 and R1. User can Pull up setings for 2 pull resistors, R0 and R1. User can
configure those special pins. Valid arguments are described as below: configure those special pins. Valid arguments are described as
below:
0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
@ -131,7 +132,8 @@ patternProperties:
mediatek,pull-down-adv: mediatek,pull-down-adv:
description: | description: |
Pull down settings for 2 pull resistors, R0 and R1. User can Pull down settings for 2 pull resistors, R0 and R1. User can
configure those special pins. Valid arguments are described as below: configure those special pins. Valid arguments are described as
below:
0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
@ -140,14 +142,14 @@ patternProperties:
enum: [0, 1, 2, 3] enum: [0, 1, 2, 3]
mediatek,tdsel: mediatek,tdsel:
description: | description:
An integer describing the steps for output level shifter duty An integer describing the steps for output level shifter duty
cycle when asserted (high pulse width adjustment). Valid arguments cycle when asserted (high pulse width adjustment). Valid arguments
are from 0 to 15. are from 0 to 15.
$ref: /schemas/types.yaml#/definitions/uint32 $ref: /schemas/types.yaml#/definitions/uint32
mediatek,rdsel: mediatek,rdsel:
description: | description:
An integer describing the steps for input level shifter duty cycle An integer describing the steps for input level shifter duty cycle
when asserted (high pulse width adjustment). Valid arguments are when asserted (high pulse width adjustment). Valid arguments are
from 0 to 63. from 0 to 63.

2
Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinctrl.yaml
View File

@ -10,7 +10,7 @@ maintainers:
- Arınç ÜNAL <arinc.unal@arinc9.com> - Arınç ÜNAL <arinc.unal@arinc9.com>
- Sergio Paracuellos <sergio.paracuellos@gmail.com> - Sergio Paracuellos <sergio.paracuellos@gmail.com>
description: description: |
Ralink RT2880 pin controller for RT2880 SoC. Ralink RT2880 pin controller for RT2880 SoC.
The pin controller can only set the muxing of pin groups. Muxing individual The pin controller can only set the muxing of pin groups. Muxing individual
pins is not supported. There is no pinconf support. pins is not supported. There is no pinconf support.

2
Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml
View File

@ -10,7 +10,7 @@ maintainers:
- Arınç ÜNAL <arinc.unal@arinc9.com> - Arınç ÜNAL <arinc.unal@arinc9.com>
- Sergio Paracuellos <sergio.paracuellos@gmail.com> - Sergio Paracuellos <sergio.paracuellos@gmail.com>
description: description: |
Ralink RT305X pin controller for RT3050, RT3052, RT3350, RT3352 and RT5350 Ralink RT305X pin controller for RT3050, RT3052, RT3350, RT3352 and RT5350
SoCs. SoCs.
The pin controller can only set the muxing of pin groups. Muxing individual The pin controller can only set the muxing of pin groups. Muxing individual

2
Documentation/devicetree/bindings/pinctrl/ralink,rt3883-pinctrl.yaml
View File

@ -10,7 +10,7 @@ maintainers:
- Arınç ÜNAL <arinc.unal@arinc9.com> - Arınç ÜNAL <arinc.unal@arinc9.com>
- Sergio Paracuellos <sergio.paracuellos@gmail.com> - Sergio Paracuellos <sergio.paracuellos@gmail.com>
description: description: |
Ralink RT3883 pin controller for RT3883 SoC. Ralink RT3883 pin controller for RT3883 SoC.
The pin controller can only set the muxing of pin groups. Muxing individual The pin controller can only set the muxing of pin groups. Muxing individual
pins is not supported. There is no pinconf support. pins is not supported. There is no pinconf support.