clk: qcom: videocc: Add sm8250 VIDEO_CC_MVS0_CLK

This patch adds the missing video_cc_mvs0_clk entry to
videocc-sm8250 replicating in upstream the explicit entry for this clock in
downstream.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210204150120.1521959-4-bryan.odonoghue@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Bryan O'Donoghue 2021-02-04 15:01:19 +00:00 committed by Stephen Boyd
parent 2334032f00
commit c80a4285a3
1 changed files with 19 additions and 0 deletions

View File

@ -217,6 +217,24 @@ static struct clk_branch video_cc_mvs0c_clk = {
},
};
static struct clk_branch video_cc_mvs0_clk = {
.halt_reg = 0xd34,
.halt_check = BRANCH_HALT_VOTED,
.clkr = {
.enable_reg = 0xd34,
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "video_cc_mvs0_clk",
.parent_data = &(const struct clk_parent_data){
.hw = &video_cc_mvs0_div_clk_src.clkr.hw,
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,
.ops = &clk_branch2_ops,
},
},
};
static struct clk_branch video_cc_mvs1_div2_clk = {
.halt_reg = 0xdf4,
.halt_check = BRANCH_HALT_VOTED,
@ -290,6 +308,7 @@ static struct gdsc mvs1_gdsc = {
};
static struct clk_regmap *video_cc_sm8250_clocks[] = {
[VIDEO_CC_MVS0_CLK] = &video_cc_mvs0_clk.clkr,
[VIDEO_CC_MVS0_CLK_SRC] = &video_cc_mvs0_clk_src.clkr,
[VIDEO_CC_MVS0_DIV_CLK_SRC] = &video_cc_mvs0_div_clk_src.clkr,
[VIDEO_CC_MVS0C_CLK] = &video_cc_mvs0c_clk.clkr,