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drm/amd/pp: Clean up header file for Vega10 

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Rex Zhu 2018-03-16 15:26:15 +08:00 committed by Alex Deucher
parent 3f9ca14a1d
commit c7d30b40a2
6 changed files with 13 additions and 18 deletions
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11
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
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@ -28,7 +28,6 @@
#include "hwmgr.h" #include "hwmgr.h"
#include "amd_powerplay.h" #include "amd_powerplay.h"
#include "vega10_smumgr.h"
#include "hardwaremanager.h" #include "hardwaremanager.h"
#include "ppatomfwctrl.h" #include "ppatomfwctrl.h"
#include "atomfirmware.h" #include "atomfirmware.h"
@ -5024,6 +5023,16 @@ static const struct pp_hwmgr_func vega10_hwmgr_funcs = {
.set_power_limit = vega10_set_power_limit, .set_power_limit = vega10_set_power_limit,
}; };
int vega10_enable_smc_features(struct pp_hwmgr *hwmgr,
bool enable, uint32_t feature_mask)
{
int msg = enable ? PPSMC_MSG_EnableSmuFeatures :
PPSMC_MSG_DisableSmuFeatures;
return smum_send_msg_to_smc_with_parameter(hwmgr,
msg, feature_mask);
}
int vega10_hwmgr_init(struct pp_hwmgr *hwmgr) int vega10_hwmgr_init(struct pp_hwmgr *hwmgr)
{ {
hwmgr->hwmgr_func = &vega10_hwmgr_funcs; hwmgr->hwmgr_func = &vega10_hwmgr_funcs;

2
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h
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@ -440,5 +440,7 @@ int vega10_update_uvd_dpm(struct pp_hwmgr *hwmgr, bool bgate);
int vega10_update_samu_dpm(struct pp_hwmgr *hwmgr, bool bgate); int vega10_update_samu_dpm(struct pp_hwmgr *hwmgr, bool bgate);
int vega10_update_acp_dpm(struct pp_hwmgr *hwmgr, bool bgate); int vega10_update_acp_dpm(struct pp_hwmgr *hwmgr, bool bgate);
int vega10_enable_disable_vce_dpm(struct pp_hwmgr *hwmgr, bool enable); int vega10_enable_disable_vce_dpm(struct pp_hwmgr *hwmgr, bool enable);
int vega10_enable_smc_features(struct pp_hwmgr *hwmgr,
bool enable, uint32_t feature_mask);
#endif /* _VEGA10_HWMGR_H_ */ #endif /* _VEGA10_HWMGR_H_ */

1
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c
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@ -24,7 +24,6 @@
#include "hwmgr.h" #include "hwmgr.h"
#include "vega10_hwmgr.h" #include "vega10_hwmgr.h"
#include "vega10_powertune.h" #include "vega10_powertune.h"
#include "vega10_smumgr.h"
#include "vega10_ppsmc.h" #include "vega10_ppsmc.h"
#include "vega10_inc.h" #include "vega10_inc.h"
#include "pp_debug.h" #include "pp_debug.h"

1
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c
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@ -23,7 +23,6 @@
#include "vega10_thermal.h" #include "vega10_thermal.h"
#include "vega10_hwmgr.h" #include "vega10_hwmgr.h"
#include "vega10_smumgr.h"
#include "vega10_ppsmc.h" #include "vega10_ppsmc.h"
#include "vega10_inc.h" #include "vega10_inc.h"
#include "pp_soc15.h" #include "pp_soc15.h"

11
drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c
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@ -25,6 +25,7 @@
#include "vega10_inc.h" #include "vega10_inc.h"
#include "pp_soc15.h" #include "pp_soc15.h"
#include "vega10_smumgr.h" #include "vega10_smumgr.h"
#include "vega10_hwmgr.h"
#include "vega10_ppsmc.h" #include "vega10_ppsmc.h"
#include "smu9_driver_if.h" #include "smu9_driver_if.h"
#include "ppatomctrl.h" #include "ppatomctrl.h"
@ -238,16 +239,6 @@ static int vega10_copy_table_to_smc(struct pp_hwmgr *hwmgr,
return 0; return 0;
} }
int vega10_enable_smc_features(struct pp_hwmgr *hwmgr,
bool enable, uint32_t feature_mask)
{
int msg = enable ? PPSMC_MSG_EnableSmuFeatures :
PPSMC_MSG_DisableSmuFeatures;
return vega10_send_msg_to_smc_with_parameter(hwmgr,
msg, feature_mask);
}
static int vega10_get_smc_features(struct pp_hwmgr *hwmgr, static int vega10_get_smc_features(struct pp_hwmgr *hwmgr,
uint32_t *features_enabled) uint32_t *features_enabled)
{ {

5
drivers/gpu/drm/amd/powerplay/smumgr/vega10_smumgr.h
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@ -23,8 +23,6 @@
#ifndef _VEGA10_SMUMANAGER_H_ #ifndef _VEGA10_SMUMANAGER_H_
#define _VEGA10_SMUMANAGER_H_ #define _VEGA10_SMUMANAGER_H_
#include "vega10_hwmgr.h"
#define MAX_SMU_TABLE 5 #define MAX_SMU_TABLE 5
struct smu_table_entry { struct smu_table_entry {
@ -44,9 +42,6 @@ struct vega10_smumgr {
struct smu_table_array smu_tables; struct smu_table_array smu_tables;
}; };
int vega10_enable_smc_features(struct pp_hwmgr *hwmgr,
bool enable, uint32_t feature_mask);
#endif #endif