From 15ffef1ae69e99ebb54326f0220916b1fe619b24 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 3 Jul 2019 14:17:06 -0600 Subject: [PATCH 1/7] dt-bindings: Ensure child nodes are of type 'object' Properties which are child node definitions need to have an explict type. Otherwise, a matching (DT) property can silently match when an error is desired. Fix this up tree-wide. Once this is fixed, the meta-schema will enforce this on any child node definitions. Cc: Chen-Yu Tsai Cc: David Woodhouse Cc: Brian Norris Cc: Marek Vasut Cc: Richard Weinberger Cc: Vignesh Raghavendra Cc: Linus Walleij Cc: Maxime Coquelin Cc: linux-mtd@lists.infradead.org Cc: linux-gpio@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com Cc: linux-spi@vger.kernel.org Acked-by: Miquel Raynal Acked-by: Maxime Ripard Acked-by: Mark Brown Acked-by: Alexandre TORGUE Signed-off-by: Rob Herring --- .../devicetree/bindings/bus/allwinner,sun8i-a23-rsb.yaml | 1 + .../devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml | 1 + Documentation/devicetree/bindings/mtd/nand-controller.yaml | 1 + .../devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml | 3 +++ .../devicetree/bindings/spi/allwinner,sun4i-a10-spi.yaml | 1 + .../devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml | 1 + 6 files changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/bus/allwinner,sun8i-a23-rsb.yaml b/Documentation/devicetree/bindings/bus/allwinner,sun8i-a23-rsb.yaml index fc2f63860cc8..be32f087c529 100644 --- a/Documentation/devicetree/bindings/bus/allwinner,sun8i-a23-rsb.yaml +++ b/Documentation/devicetree/bindings/bus/allwinner,sun8i-a23-rsb.yaml @@ -42,6 +42,7 @@ properties: patternProperties: "^.*@[0-9a-fA-F]+$": + type: object properties: reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml b/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml index e5a411518be1..b5b3cf5b1ac2 100644 --- a/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml +++ b/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml @@ -55,6 +55,7 @@ patternProperties: "^pinctrl-[0-9]+$": true "^nand@[a-f0-9]+$": + type: object properties: reg: minimum: 0 diff --git a/Documentation/devicetree/bindings/mtd/nand-controller.yaml b/Documentation/devicetree/bindings/mtd/nand-controller.yaml index 199ba5ac2a06..d261b7096c69 100644 --- a/Documentation/devicetree/bindings/mtd/nand-controller.yaml +++ b/Documentation/devicetree/bindings/mtd/nand-controller.yaml @@ -40,6 +40,7 @@ properties: patternProperties: "^nand@[a-f0-9]$": + type: object properties: reg: description: diff --git a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml index 06c4b66c3ee6..3ac5d2088e49 100644 --- a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml @@ -55,6 +55,7 @@ properties: patternProperties: '^gpio@[0-9a-f]*$': + type: object properties: gpio-controller: true '#gpio-cells': @@ -113,8 +114,10 @@ patternProperties: - st,bank-name '-[0-9]*$': + type: object patternProperties: '^pins': + type: object description: | A pinctrl node should contain at least one subnode representing the pinctrl group available on the machine. Each subnode will list the diff --git a/Documentation/devicetree/bindings/spi/allwinner,sun4i-a10-spi.yaml b/Documentation/devicetree/bindings/spi/allwinner,sun4i-a10-spi.yaml index c374fd4923a6..6d1329c28170 100644 --- a/Documentation/devicetree/bindings/spi/allwinner,sun4i-a10-spi.yaml +++ b/Documentation/devicetree/bindings/spi/allwinner,sun4i-a10-spi.yaml @@ -50,6 +50,7 @@ properties: patternProperties: "^.*@[0-9a-f]+": + type: object properties: reg: items: diff --git a/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml b/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml index bda7a5befd8b..f36c46d236d7 100644 --- a/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml +++ b/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml @@ -55,6 +55,7 @@ properties: patternProperties: "^.*@[0-9a-f]+": + type: object properties: reg: items: From 7d9ef7f37d1f37981344d1a8c8578b67bdf4736a Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 26 Jun 2019 17:57:59 -0600 Subject: [PATCH 2/7] dt-bindings: riscv: Limit cpus schema to only check RiscV 'cpu' nodes Matching on the 'cpus' node was a bad choice because the schema is incorrectly applied to non-RiscV cpus nodes. As we now have a common cpus schema which checks the general structure, it is also redundant to do so in the Risc-V CPU schema. The downside is one could conceivably mix different architecture's cpu nodes or have typos in the compatible string. The latter problem pretty much exists for every schema. Acked-by: Paul Walmsley Signed-off-by: Rob Herring --- .../devicetree/bindings/riscv/cpus.yaml | 139 ++++++++---------- 1 file changed, 59 insertions(+), 80 deletions(-) diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml index f97a4ecd7b91..c899111aa5e3 100644 --- a/Documentation/devicetree/bindings/riscv/cpus.yaml +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml @@ -10,97 +10,76 @@ maintainers: - Paul Walmsley - Palmer Dabbelt -allOf: - - $ref: /schemas/cpus.yaml# - properties: - $nodename: - const: cpus - description: Container of cpu nodes + compatible: + items: + - enum: + - sifive,rocket0 + - sifive,e5 + - sifive,e51 + - sifive,u54-mc + - sifive,u54 + - sifive,u5 + - const: riscv + description: + Identifies that the hart uses the RISC-V instruction set + and identifies the type of the hart. - '#address-cells': - const: 1 - description: | - A single unsigned 32-bit integer uniquely identifies each RISC-V - hart in a system. (See the "reg" node under the "cpu" node, - below). + mmu-type: + allOf: + - $ref: "/schemas/types.yaml#/definitions/string" + - enum: + - riscv,sv32 + - riscv,sv39 + - riscv,sv48 + description: + Identifies the MMU address translation mode used on this + hart. These values originate from the RISC-V Privileged + Specification document, available from + https://riscv.org/specifications/ - '#size-cells': - const: 0 + riscv,isa: + allOf: + - $ref: "/schemas/types.yaml#/definitions/string" + - enum: + - rv64imac + - rv64imafdc + description: + Identifies the specific RISC-V instruction set architecture + supported by the hart. These are documented in the RISC-V + User-Level ISA document, available from + https://riscv.org/specifications/ + + timebase-frequency: + type: integer + minimum: 1 + description: + Specifies the clock frequency of the system timer in Hz. + This value is common to all harts on a single system image. + + interrupt-controller: + type: object + description: Describes the CPU's local interrupt controller -patternProperties: - '^cpu@[0-9a-f]+$': properties: + '#interrupt-cells': + const: 1 + compatible: - type: array - items: - - enum: - - sifive,rocket0 - - sifive,e5 - - sifive,e51 - - sifive,u54-mc - - sifive,u54 - - sifive,u5 - - const: riscv - description: - Identifies that the hart uses the RISC-V instruction set - and identifies the type of the hart. + const: riscv,cpu-intc - mmu-type: - allOf: - - $ref: "/schemas/types.yaml#/definitions/string" - - enum: - - riscv,sv32 - - riscv,sv39 - - riscv,sv48 - description: - Identifies the MMU address translation mode used on this - hart. These values originate from the RISC-V Privileged - Specification document, available from - https://riscv.org/specifications/ - - riscv,isa: - allOf: - - $ref: "/schemas/types.yaml#/definitions/string" - - enum: - - rv64imac - - rv64imafdc - description: - Identifies the specific RISC-V instruction set architecture - supported by the hart. These are documented in the RISC-V - User-Level ISA document, available from - https://riscv.org/specifications/ - - timebase-frequency: - type: integer - minimum: 1 - description: - Specifies the clock frequency of the system timer in Hz. - This value is common to all harts on a single system image. - - interrupt-controller: - type: object - description: Describes the CPU's local interrupt controller - - properties: - '#interrupt-cells': - const: 1 - - compatible: - const: riscv,cpu-intc - - interrupt-controller: true - - required: - - '#interrupt-cells' - - compatible - - interrupt-controller + interrupt-controller: true required: - - riscv,isa - - timebase-frequency + - '#interrupt-cells' + - compatible - interrupt-controller +required: + - riscv,isa + - timebase-frequency + - interrupt-controller + examples: - | // Example 1: SiFive Freedom U540G Development Kit From ad21a4ce040cc41b4a085417169b558e86af56b7 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Mon, 15 Jul 2019 16:37:25 -0600 Subject: [PATCH 3/7] dt-bindings: pinctrl: aspeed: Fix 'compatible' schema errors The Aspeed pinctl schema have errors in the 'compatible' schema: Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml: \ properties:compatible:enum: ['aspeed', 'ast2400-pinctrl', 'aspeed', 'g4-pinctrl'] has non-unique elements Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml: \ properties:compatible:enum: ['aspeed', 'ast2500-pinctrl', 'aspeed', 'g5-pinctrl'] has non-unique elements Flow style sequences have to be quoted if the vales contain ','. Fix this by using the more common one line per entry formatting. Fixes: 0a617de16730 ("dt-bindings: pinctrl: aspeed: Convert AST2500 bindings to json-schema") Fixes: 07457937bb5c ("dt-bindings: pinctrl: aspeed: Convert AST2400 bindings to json-schema") Cc: Andrew Jeffery Cc: Linus Walleij Cc: Joel Stanley Cc: linux-aspeed@lists.ozlabs.org Cc: linux-gpio@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Acked-by: Andrew Jeffery Signed-off-by: Rob Herring --- .../devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml | 4 +++- .../devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml | 4 +++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml index 61a110a7db8a..125599a2dc5e 100644 --- a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml @@ -22,7 +22,9 @@ description: |+ properties: compatible: - enum: [ aspeed,ast2400-pinctrl, aspeed,g4-pinctrl ] + enum: + - aspeed,ast2400-pinctrl + - aspeed,g4-pinctrl patternProperties: '^.*$': diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml index cf561bd55128..a464cfa0cba3 100644 --- a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml @@ -22,7 +22,9 @@ description: |+ properties: compatible: - enum: [ aspeed,ast2500-pinctrl, aspeed,g5-pinctrl ] + enum: + - aspeed,ast2500-pinctrl + - aspeed,g5-pinctrl aspeed,external-nodes: minItems: 2 maxItems: 2 From fcbe7e3cf86d665bf4924eecb13a5af10bcfa372 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Mon, 15 Jul 2019 16:48:41 -0600 Subject: [PATCH 4/7] dt-bindings: pinctrl: aspeed: Fix AST2500 example errors The schema examples are now validated against the schema itself. The AST2500 pinctrl schema has a couple of errors: Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.example.dt.yaml: \ example-0: $nodename:0: 'example-0' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.example.dt.yaml: \ pinctrl: aspeed,external-nodes: [[1, 2]] is too short Fixes: 0a617de16730 ("dt-bindings: pinctrl: aspeed: Convert AST2500 bindings to json-schema") Cc: Andrew Jeffery Cc: Linus Walleij Cc: Joel Stanley Cc: linux-aspeed@lists.ozlabs.org Cc: linux-gpio@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Acked-by: Andrew Jeffery Signed-off-by: Rob Herring --- .../devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml index a464cfa0cba3..3e6d85318577 100644 --- a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml @@ -76,9 +76,6 @@ required: examples: - | - compatible = "simple-bus"; - ranges; - apb { compatible = "simple-bus"; #address-cells = <1>; @@ -91,7 +88,7 @@ examples: pinctrl: pinctrl { compatible = "aspeed,g5-pinctrl"; - aspeed,external-nodes = <&gfx &lhc>; + aspeed,external-nodes = <&gfx>, <&lhc>; pinctrl_i2c3_default: i2c3_default { function = "I2C3"; From fbbf2b6e9b74ffa79bef5e3da91200195045379e Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Tue, 16 Jul 2019 14:13:29 -0600 Subject: [PATCH 5/7] dt-bindings: iio: avia-hx711: Fix avdd-supply typo in example Now that examples are validated against the DT schema, a typo in avia-hx711 example generates a warning: Documentation/devicetree/bindings/iio/adc/avia-hx711.example.dt.yaml: weight: 'avdd-supply' is a required property Fix the typo. Fixes: 5150ec3fe125 ("avia-hx711.yaml: transform DT binding to YAML") Cc: Andreas Klinger Cc: Jonathan Cameron Cc: linux-iio@vger.kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml b/Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml index 8a4100ceeaf2..d76ece97c76c 100644 --- a/Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml +++ b/Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml @@ -61,6 +61,6 @@ examples: compatible = "avia,hx711"; sck-gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>; dout-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; - avdd-suppy = <&avdd>; + avdd-supply = <&avdd>; clock-frequency = <100000>; }; From 20051f5fdf6770f05d677e2f03b0a2bab6b0fc64 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Tue, 16 Jul 2019 14:21:56 -0600 Subject: [PATCH 6/7] dt-bindings: iio: ad7124: Fix dtc warnings in example With the conversion to DT schema, the examples are now compiled with dtc. The ad7124 binding example has the following warning: Documentation/devicetree/bindings/iio/adc/adi,ad7124.example.dts:19.11-21: \ Warning (reg_format): /example-0/adc@0:reg: property has invalid length (4 bytes) (#address-cells == 1, #size-cells == 1) There's a default #size-cells and #address-cells values of 1 for examples. For examples needing different values such as this one on a SPI bus, they need to provide a SPI bus parent node. Fixes: 26ae15e62d3c ("Convert AD7124 bindings documentation to YAML format.") Cc: Jonathan Cameron Cc: linux-iio@vger.kernel.org Signed-off-by: Rob Herring --- .../bindings/iio/adc/adi,ad7124.yaml | 65 ++++++++++--------- 1 file changed, 35 insertions(+), 30 deletions(-) diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml index cf494a08b837..9692b7f719f5 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml @@ -114,42 +114,47 @@ patternProperties: examples: - | - adc@0 { - compatible = "adi,ad7124-4"; - reg = <0>; - spi-max-frequency = <5000000>; - interrupts = <25 2>; - interrupt-parent = <&gpio>; - refin1-supply = <&adc_vref>; - clocks = <&ad7124_mclk>; - clock-names = "mclk"; - + spi { #address-cells = <1>; #size-cells = <0>; - channel@0 { + adc@0 { + compatible = "adi,ad7124-4"; reg = <0>; - diff-channels = <0 1>; - adi,reference-select = <0>; - adi,buffered-positive; - }; + spi-max-frequency = <5000000>; + interrupts = <25 2>; + interrupt-parent = <&gpio>; + refin1-supply = <&adc_vref>; + clocks = <&ad7124_mclk>; + clock-names = "mclk"; - channel@1 { - reg = <1>; - bipolar; - diff-channels = <2 3>; - adi,reference-select = <0>; - adi,buffered-positive; - adi,buffered-negative; - }; + #address-cells = <1>; + #size-cells = <0>; - channel@2 { - reg = <2>; - diff-channels = <4 5>; - }; + channel@0 { + reg = <0>; + diff-channels = <0 1>; + adi,reference-select = <0>; + adi,buffered-positive; + }; - channel@3 { - reg = <3>; - diff-channels = <6 7>; + channel@1 { + reg = <1>; + bipolar; + diff-channels = <2 3>; + adi,reference-select = <0>; + adi,buffered-positive; + adi,buffered-negative; + }; + + channel@2 { + reg = <2>; + diff-channels = <4 5>; + }; + + channel@3 { + reg = <3>; + diff-channels = <6 7>; + }; }; }; From e2297f7c3ab3b68dda2ac732b1767212019d3bdf Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Tue, 16 Jul 2019 15:34:40 -0600 Subject: [PATCH 7/7] dt-bindings: pinctrl: stm32: Fix missing 'clocks' property in examples Now that examples are validated against the DT schema, an error with required 'clocks' property missing is exposed: Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.example.dt.yaml: \ pinctrl@40020000: gpio@0: 'clocks' is a required property Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.example.dt.yaml: \ pinctrl@50020000: gpio@1000: 'clocks' is a required property Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.example.dt.yaml: \ pinctrl@50020000: gpio@2000: 'clocks' is a required property Add the missing 'clocks' properties to the examples to fix the errors. Fixes: 2c9239c125f0 ("dt-bindings: pinctrl: Convert stm32 pinctrl bindings to json-schema") Cc: Linus Walleij Cc: Maxime Coquelin Cc: linux-gpio@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com Acked-by: Alexandre TORGUE Signed-off-by: Rob Herring --- .../devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml index 3ac5d2088e49..91d3e78b3395 100644 --- a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml @@ -197,6 +197,7 @@ required: examples: - | #include + #include //Example 1 pinctrl@40020000 { #address-cells = <1>; @@ -210,6 +211,7 @@ examples: #gpio-cells = <2>; reg = <0x0 0x400>; resets = <&reset_ahb1 0>; + clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOA)>; st,bank-name = "GPIOA"; }; }; @@ -227,6 +229,7 @@ examples: #gpio-cells = <2>; reg = <0x1000 0x400>; resets = <&reset_ahb1 0>; + clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOB)>; st,bank-name = "GPIOB"; gpio-ranges = <&pinctrl 0 0 16>; }; @@ -236,6 +239,7 @@ examples: #gpio-cells = <2>; reg = <0x2000 0x400>; resets = <&reset_ahb1 0>; + clocks = <&rcc 0 STM32F4_AHB1_CLOCK(GPIOC)>; st,bank-name = "GPIOC"; ngpios = <5>; gpio-ranges = <&pinctrl 0 16 3>,