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ASoC: qcom: add display port module support. 

Merge series from Srinivas Kandagatla <srinivas.kandagatla@linaro.org>:

This patchset adds support to displayport on AudioReach.
Patches are tested on X13s with two display ports.
This commit is contained in:
Mark Brown 2023-05-11 15:01:27 +09:00
parent d40b28d642 2f6860e613
commit c7895b7586
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
8 changed files with 204 additions and 43 deletions
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8
include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h
View File

@ -131,6 +131,14 @@
#define RX_CODEC_DMA_RX_7 126
#define QUINARY_MI2S_RX 127
#define QUINARY_MI2S_TX 128
#define DISPLAY_PORT_RX_0 DISPLAY_PORT_RX
#define DISPLAY_PORT_RX_1 129
#define DISPLAY_PORT_RX_2 130
#define DISPLAY_PORT_RX_3 131
#define DISPLAY_PORT_RX_4 132
#define DISPLAY_PORT_RX_5 133
#define DISPLAY_PORT_RX_6 134
#define DISPLAY_PORT_RX_7 135
#define LPASS_CLK_ID_PRI_MI2S_IBIT 1
#define LPASS_CLK_ID_PRI_MI2S_EBIT 2

75
sound/soc/qcom/qdsp6/audioreach.c
View File

@ -196,6 +196,12 @@ struct apm_codec_dma_module_intf_cfg {
#define APM_CDMA_INTF_CFG_PSIZE ALIGN(sizeof(struct apm_codec_dma_module_intf_cfg), 8)
struct apm_display_port_module_intf_cfg {
struct apm_module_param_data param_data;
struct param_id_display_port_intf_cfg cfg;
} __packed;
#define APM_DP_INTF_CFG_PSIZE ALIGN(sizeof(struct apm_display_port_module_intf_cfg), 8)
static void *__audioreach_alloc_pkt(int payload_size, uint32_t opcode, uint32_t token,
uint32_t src_port, uint32_t dest_port, bool has_cmd_hdr)
{
@ -582,6 +588,72 @@ int audioreach_graph_send_cmd_sync(struct q6apm_graph *graph, struct gpr_pkt *pk
}
EXPORT_SYMBOL_GPL(audioreach_graph_send_cmd_sync);
static int audioreach_display_port_set_media_format(struct q6apm_graph *graph,
struct audioreach_module *module,
struct audioreach_module_config *cfg)
{
struct apm_display_port_module_intf_cfg *intf_cfg;
struct apm_module_frame_size_factor_cfg *fs_cfg;
struct apm_module_param_data *param_data;
struct apm_module_hw_ep_mf_cfg *hw_cfg;
int ic_sz, ep_sz, fs_sz, dl_sz;
int rc, payload_size;
struct gpr_pkt *pkt;
void *p;
ic_sz = APM_DP_INTF_CFG_PSIZE;
ep_sz = APM_HW_EP_CFG_PSIZE;
fs_sz = APM_FS_CFG_PSIZE;
dl_sz = 0;
payload_size = ic_sz + ep_sz + fs_sz + dl_sz;
pkt = audioreach_alloc_apm_cmd_pkt(payload_size, APM_CMD_SET_CFG, 0);
if (IS_ERR(pkt))
return PTR_ERR(pkt);
p = (void *)pkt + GPR_HDR_SIZE + APM_CMD_HDR_SIZE;
hw_cfg = p;
param_data = &hw_cfg->param_data;
param_data->module_instance_id = module->instance_id;
param_data->error_code = 0;
param_data->param_id = PARAM_ID_HW_EP_MF_CFG;
param_data->param_size = ep_sz - APM_MODULE_PARAM_DATA_SIZE;
hw_cfg->mf.sample_rate = cfg->sample_rate;
hw_cfg->mf.bit_width = cfg->bit_width;
hw_cfg->mf.num_channels = cfg->num_channels;
hw_cfg->mf.data_format = module->data_format;
p += ep_sz;
fs_cfg = p;
param_data = &fs_cfg->param_data;
param_data->module_instance_id = module->instance_id;
param_data->error_code = 0;
param_data->param_id = PARAM_ID_HW_EP_FRAME_SIZE_FACTOR;
param_data->param_size = fs_sz - APM_MODULE_PARAM_DATA_SIZE;
fs_cfg->frame_size_factor = 1;
p += fs_sz;
intf_cfg = p;
param_data = &intf_cfg->param_data;
param_data->module_instance_id = module->instance_id;
param_data->error_code = 0;
param_data->param_id = PARAM_ID_DISPLAY_PORT_INTF_CFG;
param_data->param_size = ic_sz - APM_MODULE_PARAM_DATA_SIZE;
intf_cfg->cfg.channel_allocation = cfg->channel_allocation;
intf_cfg->cfg.mst_idx = 0;
intf_cfg->cfg.dptx_idx = cfg->dp_idx;
rc = q6apm_send_cmd_sync(graph->apm, pkt, 0);
kfree(pkt);
return rc;
}
/* LPASS Codec DMA port Module Media Format Setup */
static int audioreach_codec_dma_set_media_format(struct q6apm_graph *graph,
struct audioreach_module *module,
@ -1122,6 +1194,9 @@ int audioreach_set_media_format(struct q6apm_graph *graph, struct audioreach_mod
case MODULE_ID_PCM_CNV:
rc = audioreach_pcm_set_media_format(graph, module, cfg);
break;
case MODULE_ID_DISPLAY_PORT_SINK:
rc = audioreach_display_port_set_media_format(graph, module, cfg);
break;
case MODULE_ID_I2S_SOURCE:
case MODULE_ID_I2S_SINK:
rc = audioreach_i2s_set_media_format(graph, module, cfg);

12
sound/soc/qcom/qdsp6/audioreach.h
View File

@ -22,6 +22,7 @@ struct q6apm_graph;
#define MODULE_ID_I2S_SINK 0x0700100A
#define MODULE_ID_I2S_SOURCE 0x0700100B
#define MODULE_ID_DATA_LOGGING 0x0700101A
#define MODULE_ID_DISPLAY_PORT_SINK 0x07001069
#define APM_CMD_GET_SPF_STATE 0x01001021
#define APM_CMD_RSP_GET_SPF_STATE 0x02001007
@ -444,6 +445,15 @@ struct param_id_i2s_intf_cfg {
#define PORT_ID_I2S_OUPUT 1
#define I2S_STACK_SIZE 2048
#define PARAM_ID_DISPLAY_PORT_INTF_CFG 0x08001154
struct param_id_display_port_intf_cfg {
uint32_t channel_allocation;
/* Multi-Steam Transport index */
uint32_t mst_idx;
uint32_t dptx_idx;
} __packed;
#define PARAM_ID_HW_EP_MF_CFG 0x08001017
struct param_id_hw_ep_mf {
uint32_t sample_rate;
@ -702,6 +712,8 @@ struct audioreach_module_config {
u16 data_format;
u16 num_channels;
u16 active_channels_mask;
u16 dp_idx;
u32 channel_allocation;
u32 sd_line_mask;
int fmt;
u8 channel_map[AR_PCM_MAX_NUM_CHANNEL];

34
sound/soc/qcom/qdsp6/q6afe-dai.c
View File

@ -12,6 +12,7 @@
#include <sound/soc.h>
#include <sound/pcm_params.h>
#include "q6dsp-lpass-ports.h"
#include "q6dsp-common.h"
#include "q6afe.h"
@ -69,6 +70,7 @@ static int q6hdmi_hw_params(struct snd_pcm_substream *substream,
struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
int channels = params_channels(params);
struct q6afe_hdmi_cfg *hdmi = &dai_data->port_config[dai->id].hdmi;
int ret;
hdmi->sample_rate = params_rate(params);
switch (params_format(params)) {
@ -80,33 +82,11 @@ static int q6hdmi_hw_params(struct snd_pcm_substream *substream,
break;
}
/* HDMI spec CEA-861-E: Table 28 Audio InfoFrame Data Byte 4 */
switch (channels) {
case 2:
hdmi->channel_allocation = 0;
break;
case 3:
hdmi->channel_allocation = 0x02;
break;
case 4:
hdmi->channel_allocation = 0x06;
break;
case 5:
hdmi->channel_allocation = 0x0A;
break;
case 6:
hdmi->channel_allocation = 0x0B;
break;
case 7:
hdmi->channel_allocation = 0x12;
break;
case 8:
hdmi->channel_allocation = 0x13;
break;
default:
dev_err(dai->dev, "invalid Channels = %u\n", channels);
return -EINVAL;
}
ret = q6dsp_get_channel_allocation(channels);
if (ret < 0)
return ret;
hdmi->channel_allocation = (u16) ret;
return 0;
}

39
sound/soc/qcom/qdsp6/q6apm-lpass-dais.c
View File

@ -11,6 +11,7 @@
#include <sound/soc.h>
#include <sound/pcm_params.h>
#include "q6dsp-lpass-ports.h"
#include "q6dsp-common.h"
#include "audioreach.h"
#include "q6apm.h"
@ -91,6 +92,36 @@ static int q6dma_set_channel_map(struct snd_soc_dai *dai,
return 0;
}
static int q6hdmi_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
{
struct q6apm_lpass_dai_data *dai_data = dev_get_drvdata(dai->dev);
struct audioreach_module_config *cfg = &dai_data->module_config[dai->id];
int channels = params_channels(params);
int ret;
cfg->bit_width = params_width(params);
cfg->sample_rate = params_rate(params);
cfg->num_channels = channels;
switch (dai->id) {
case DISPLAY_PORT_RX_0:
cfg->dp_idx = 0;
break;
case DISPLAY_PORT_RX_1 ... DISPLAY_PORT_RX_7:
cfg->dp_idx = dai->id - DISPLAY_PORT_RX_1 + 1;
break;
}
ret = q6dsp_get_channel_allocation(channels);
if (ret < 0)
return ret;
cfg->channel_allocation = ret;
return 0;
}
static int q6dma_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
{
@ -215,6 +246,13 @@ static const struct snd_soc_dai_ops q6i2s_ops = {
.shutdown = q6apm_lpass_dai_shutdown,
.set_channel_map = q6dma_set_channel_map,
.hw_params = q6dma_hw_params,
};
static const struct snd_soc_dai_ops q6hdmi_ops = {
.prepare = q6apm_lpass_dai_prepare,
.startup = q6apm_lpass_dai_startup,
.shutdown = q6apm_lpass_dai_shutdown,
.hw_params = q6hdmi_hw_params,
.set_fmt = q6i2s_set_fmt,
};
@ -242,6 +280,7 @@ static int q6apm_lpass_dai_dev_probe(struct platform_device *pdev)
memset(&cfg, 0, sizeof(cfg));
cfg.q6i2s_ops = &q6i2s_ops;
cfg.q6dma_ops = &q6dma_ops;
cfg.q6hdmi_ops = &q6hdmi_ops;
dais = q6dsp_audio_ports_set_config(dev, &cfg, &num_dais);
return devm_snd_soc_register_component(dev, &q6apm_lpass_dai_component, dais, num_dais);

35
sound/soc/qcom/qdsp6/q6dsp-common.c
View File

@ -63,4 +63,39 @@ int q6dsp_map_channels(u8 ch_map[PCM_MAX_NUM_CHANNEL], int ch)
return 0;
}
EXPORT_SYMBOL_GPL(q6dsp_map_channels);
int q6dsp_get_channel_allocation(int channels)
{
int channel_allocation;
/* HDMI spec CEA-861-E: Table 28 Audio InfoFrame Data Byte 4 */
switch (channels) {
case 2:
channel_allocation = 0;
break;
case 3:
channel_allocation = 0x02;
break;
case 4:
channel_allocation = 0x06;
break;
case 5:
channel_allocation = 0x0A;
break;
case 6:
channel_allocation = 0x0B;
break;
case 7:
channel_allocation = 0x12;
break;
case 8:
channel_allocation = 0x13;
break;
default:
return -EINVAL;
}
return channel_allocation;
}
EXPORT_SYMBOL_GPL(q6dsp_get_channel_allocation);
MODULE_LICENSE("GPL v2");

1
sound/soc/qcom/qdsp6/q6dsp-common.h
View File

@ -20,5 +20,6 @@
#define PCM_CHANNELS 10 /* Top surround channel. */
int q6dsp_map_channels(u8 ch_map[PCM_MAX_NUM_CHANNEL], int ch);
int q6dsp_get_channel_allocation(int channels);
#endif /* __Q6DSP_COMMON_H__ */

43
sound/soc/qcom/qdsp6/q6dsp-lpass-ports.c
View File

@ -79,6 +79,22 @@
.id = did, \
}
#define Q6AFE_DP_RX_DAI(did) { \
.playback = { \
.stream_name = #did" Playback", \
.rates = SNDRV_PCM_RATE_48000 | \
SNDRV_PCM_RATE_96000 | \
SNDRV_PCM_RATE_192000, \
.formats = SNDRV_PCM_FMTBIT_S16_LE | \
SNDRV_PCM_FMTBIT_S24_LE, \
.channels_min = 2, \
.channels_max = 8, \
.rate_min = 48000, \
.rate_max = 192000, \
}, \
.name = #did, \
.id = did, \
}
static struct snd_soc_dai_driver q6dsp_audio_fe_dais[] = {
{
@ -528,22 +544,14 @@ static struct snd_soc_dai_driver q6dsp_audio_fe_dais[] = {
Q6AFE_TDM_CAP_DAI("Quinary", 5, QUINARY_TDM_TX_5),
Q6AFE_TDM_CAP_DAI("Quinary", 6, QUINARY_TDM_TX_6),
Q6AFE_TDM_CAP_DAI("Quinary", 7, QUINARY_TDM_TX_7),
{
.playback = {
.stream_name = "Display Port Playback",
.rates = SNDRV_PCM_RATE_48000 |
SNDRV_PCM_RATE_96000 |
SNDRV_PCM_RATE_192000,
.formats = SNDRV_PCM_FMTBIT_S16_LE |
SNDRV_PCM_FMTBIT_S24_LE,
.channels_min = 2,
.channels_max = 8,
.rate_max = 192000,
.rate_min = 48000,
},
.id = DISPLAY_PORT_RX,
.name = "DISPLAY_PORT",
},
Q6AFE_DP_RX_DAI(DISPLAY_PORT_RX_0),
Q6AFE_DP_RX_DAI(DISPLAY_PORT_RX_1),
Q6AFE_DP_RX_DAI(DISPLAY_PORT_RX_2),
Q6AFE_DP_RX_DAI(DISPLAY_PORT_RX_3),
Q6AFE_DP_RX_DAI(DISPLAY_PORT_RX_4),
Q6AFE_DP_RX_DAI(DISPLAY_PORT_RX_5),
Q6AFE_DP_RX_DAI(DISPLAY_PORT_RX_6),
Q6AFE_DP_RX_DAI(DISPLAY_PORT_RX_7),
Q6AFE_CDC_DMA_RX_DAI(WSA_CODEC_DMA_RX_0),
Q6AFE_CDC_DMA_TX_DAI(WSA_CODEC_DMA_TX_0),
Q6AFE_CDC_DMA_RX_DAI(WSA_CODEC_DMA_RX_1),
@ -603,6 +611,9 @@ struct snd_soc_dai_driver *q6dsp_audio_ports_set_config(struct device *dev,
case DISPLAY_PORT_RX:
q6dsp_audio_fe_dais[i].ops = cfg->q6hdmi_ops;
break;
case DISPLAY_PORT_RX_1 ... DISPLAY_PORT_RX_7:
q6dsp_audio_fe_dais[i].ops = cfg->q6hdmi_ops;
break;
case SLIMBUS_0_RX ... SLIMBUS_6_TX:
q6dsp_audio_fe_dais[i].ops = cfg->q6slim_ops;
break;