Third Round of Renesas ARM Based SoC DT Updates for v3.17

* Initialise SCI using DT when booting the kzm9g, armadillo800eva,
   ape6evm and bockw boards without legacy-C code.
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Merge tag 'renesas-dt3-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Merge "Third Round of Renesas ARM Based SoC DT Updates for v3.17" from Simon
Horman:

* Initialise SCI using DT when booting the kzm9g, armadillo800eva,
  ape6evm and bockw boards without legacy-C code.

* tag 'renesas-dt3-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (24 commits)
  ARM: shmobile: kzm9g-reference: Initialise SCIF device using DT
  ARM: shmobile: sh73a0: Add SCIF nodes
  ARM: shmobile: armadillo800eva-reference: Initialise SCIF device using DT
  ARM: shmobile: r8a7740: Add SCIF nodes
  ARM: shmobile: ape6evm-reference: Initialise SCIF device using DT
  ARM: shmobile: r8a73a4: Add SCIF nodes
  ARM: shmobile: bockw-reference: Initialise SCIF device using DT
  ARM: shmobile: r8a7778: Add SCIF nodes
  ARM: shmobile: sh73a0: add SCI clock support for DT
  ARM: shmobile: r8a7740: correct SCI clock support for DT
  ARM: shmobile: r8a73a4: add SCI clock support for DT
  ARM: shmobile: r8a7778: add SCI clock support for DT
  ARM: shmobile: r8a7790: lager: use iic cores instead of i2c
  ARM: shmobile: Lager: Correct I2C bus for VDD MPU regulator
  ARM: shmobile: kzm9g-reference: Remove early_printk from command line
  ARM: shmobile: armadillo800eva-reference: Remove early_printk from command line
  ARM: shmobile: r8a7779: Consistently use tabs for indentation
  ARM: shmobile: henninger: Consistently use tabs for indentation
  ARM: shmobile: henninger: enable internal PCI
  ARM: shmobile: koelsch: enable internal PCI
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2014-07-18 21:39:29 -07:00
commit c6ffdc0741
24 changed files with 466 additions and 92 deletions

View File

@ -57,3 +57,13 @@
&scif2 {
status = "okay";
};
&spi4 {
status = "okay";
codec: codec@0 {
compatible = "wlf,wm8978";
reg = <0>;
spi-max-frequency = <5000000>;
};
};

View File

@ -16,6 +16,10 @@
model = "APE6EVM";
compatible = "renesas,ape6evm-reference", "renesas,r8a73a4";
aliases {
serial0 = &scifa0;
};
chosen {
bootargs = "console=ttySC0,115200 ignore_loglevel rw";
};
@ -90,9 +94,6 @@
};
&pfc {
pinctrl-0 = <&scifa0_pins>;
pinctrl-names = "default";
scifa0_pins: serial0 {
renesas,groups = "scifa0_data";
renesas,function = "scifa0";
@ -123,6 +124,13 @@
status = "okay";
};
&scifa0 {
pinctrl-0 = <&scifa0_pins>;
pinctrl-names = "default";
status = "okay";
};
&sdhi0 {
vmmc-supply = <&vcc_sdhi0>;
bus-width = <4>;

View File

@ -252,6 +252,48 @@
status = "disabled";
};
scifa0: serial@e6c40000 {
compatible = "renesas,scifa-r8a73a4", "renesas,scifa";
reg = <0 0xe6c40000 0 0x100>;
interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifa1: serial@e6c50000 {
compatible = "renesas,scifa-r8a73a4", "renesas,scifa";
reg = <0 0xe6c50000 0 0x100>;
interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifb2: serial@e6c20000 {
compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
reg = <0 0xe6c20000 0 0x100>;
interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifb3: serial@e6c30000 {
compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
reg = <0 0xe6c30000 0 0x100>;
interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifb4: serial@e6ce0000 {
compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
reg = <0 0xe6ce0000 0 0x100>;
interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifb5: serial@e6cf0000 {
compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
reg = <0 0xe6cf0000 0 0x100>;
interrupts = <0 151 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
mmcif0: mmc@ee200000 {
compatible = "renesas,sh-mmcif";
reg = <0 0xee200000 0 0x80>;

View File

@ -19,8 +19,12 @@
model = "armadillo 800 eva reference";
compatible = "renesas,armadillo800eva-reference", "renesas,r8a7740";
aliases {
serial1 = &scifa1;
};
chosen {
bootargs = "console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp rw";
bootargs = "console=tty0 console=ttySC1,115200 ignore_loglevel root=/dev/nfs ip=dhcp rw";
};
memory {
@ -202,9 +206,6 @@
};
&pfc {
pinctrl-0 = <&scifa1_pins>;
pinctrl-names = "default";
ether_pins: ether {
renesas,groups = "gether_mii", "gether_int";
renesas,function = "gether";
@ -256,6 +257,13 @@
status = "okay";
};
&scifa1 {
pinctrl-0 = <&scifa1_pins>;
pinctrl-names = "default";
status = "okay";
};
&sdhi0 {
pinctrl-0 = <&sdhi0_pins>;
pinctrl-names = "default";

View File

@ -156,6 +156,69 @@
status = "disabled";
};
scifa0: serial@e6c40000 {
compatible = "renesas,scifa-r8a7740", "renesas,scifa";
reg = <0xe6c40000 0x100>;
interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifa1: serial@e6c50000 {
compatible = "renesas,scifa-r8a7740", "renesas,scifa";
reg = <0xe6c50000 0x100>;
interrupts = <0 101 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifa2: serial@e6c60000 {
compatible = "renesas,scifa-r8a7740", "renesas,scifa";
reg = <0xe6c60000 0x100>;
interrupts = <0 102 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifa3: serial@e6c70000 {
compatible = "renesas,scifa-r8a7740", "renesas,scifa";
reg = <0xe6c70000 0x100>;
interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifa4: serial@e6c80000 {
compatible = "renesas,scifa-r8a7740", "renesas,scifa";
reg = <0xe6c80000 0x100>;
interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifa5: serial@e6cb0000 {
compatible = "renesas,scifa-r8a7740", "renesas,scifa";
reg = <0xe6cb0000 0x100>;
interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifa6: serial@e6cc0000 {
compatible = "renesas,scifa-r8a7740", "renesas,scifa";
reg = <0xe6cc0000 0x100>;
interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifa7: serial@e6cd0000 {
compatible = "renesas,scifa-r8a7740", "renesas,scifa";
reg = <0xe6cd0000 0x100>;
interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifb8: serial@e6c30000 {
compatible = "renesas,scifb-r8a7740", "renesas,scifb";
reg = <0xe6c30000 0x100>;
interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
pfc: pfc@e6050000 {
compatible = "renesas,pfc-r8a7740";
reg = <0xe6050000 0x8000>,

View File

@ -23,6 +23,10 @@
model = "bockw";
compatible = "renesas,bockw-reference", "renesas,r8a7778";
aliases {
serial0 = &scif0;
};
chosen {
bootargs = "console=ttySC0,115200 ignore_loglevel root=/dev/nfs ip=dhcp rw";
};
@ -70,9 +74,6 @@
};
&pfc {
pinctrl-0 = <&scif0_pins>;
pinctrl-names = "default";
scif0_pins: serial0 {
renesas,groups = "scif0_data_a", "scif0_ctrl";
renesas,function = "scif0";
@ -124,3 +125,10 @@
};
};
};
&scif0 {
pinctrl-0 = <&scif0_pins>;
pinctrl-names = "default";
status = "okay";
};

View File

@ -156,6 +156,48 @@
status = "disabled";
};
scif0: serial@ffe40000 {
compatible = "renesas,scif-r8a7778", "renesas,scif";
reg = <0xffe40000 0x100>;
interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scif1: serial@ffe41000 {
compatible = "renesas,scif-r8a7778", "renesas,scif";
reg = <0xffe41000 0x100>;
interrupts = <0 71 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scif2: serial@ffe42000 {
compatible = "renesas,scif-r8a7778", "renesas,scif";
reg = <0xffe42000 0x100>;
interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scif3: serial@ffe43000 {
compatible = "renesas,scif-r8a7778", "renesas,scif";
reg = <0xffe43000 0x100>;
interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scif4: serial@ffe44000 {
compatible = "renesas,scif-r8a7778", "renesas,scif";
reg = <0xffe44000 0x100>;
interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scif5: serial@ffe45000 {
compatible = "renesas,scif-r8a7778", "renesas,scif";
reg = <0xffe45000 0x100>;
interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
mmcif: mmc@ffe4e000 {
compatible = "renesas,sh-mmcif";
reg = <0xffe4e000 0x100>;

View File

@ -49,13 +49,13 @@
spi2 = &hspi2;
};
gic: interrupt-controller@f0001000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0xf0001000 0x1000>,
<0xf0000100 0x100>;
};
gic: interrupt-controller@f0001000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0xf0001000 0x1000>,
<0xf0000100 0x100>;
};
gpio0: gpio@ffc40000 {
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";

View File

@ -205,19 +205,19 @@
renesas,function = "msiof1";
};
i2c1_pins: i2c1 {
renesas,groups = "i2c1";
renesas,function = "i2c1";
iic1_pins: iic1 {
renesas,groups = "iic1";
renesas,function = "iic1";
};
i2c2_pins: i2c2 {
renesas,groups = "i2c2";
renesas,function = "i2c2";
iic2_pins: iic2 {
renesas,groups = "iic2";
renesas,function = "iic2";
};
i2c3_pins: i2c3 {
renesas,groups = "i2c3";
renesas,function = "i2c3";
iic3_pins: iic3 {
renesas,groups = "iic3";
renesas,function = "iic3";
};
usb0_pins: usb0 {
@ -352,25 +352,25 @@
cpu0-supply = <&vdd_dvfs>;
};
&i2c0 {
&iic0 {
status = "ok";
};
&i2c1 {
&iic1 {
status = "ok";
pinctrl-0 = <&i2c1_pins>;
pinctrl-0 = <&iic1_pins>;
pinctrl-names = "default";
};
&i2c2 {
&iic2 {
status = "ok";
pinctrl-0 = <&i2c2_pins>;
pinctrl-0 = <&iic2_pins>;
pinctrl-names = "default";
};
&i2c3 {
&iic3 {
pinctrl-names = "default";
pinctrl-0 = <&i2c3_pins>;
pinctrl-0 = <&iic3_pins>;
status = "okay";
vdd_dvfs: regulator@68 {

View File

@ -946,8 +946,8 @@
ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
interrupt-map-mask = <0xff00 0 0 0x7>;
interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>;
0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>;
};
pci1: pci@ee0b0000 {
@ -966,8 +966,8 @@
ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
interrupt-map-mask = <0xff00 0 0 0x7>;
interrupt-map = <0x0000 0 0 1 &gic 0 112 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic 0 112 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>;
0x0800 0 0 1 &gic 0 112 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>;
};
pci2: pci@ee0d0000 {
@ -986,8 +986,8 @@
ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
interrupt-map-mask = <0xff00 0 0 0x7>;
interrupt-map = <0x0000 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
0x0800 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
};
pciec: pcie@fe000000 {

View File

@ -125,6 +125,16 @@
"msiof0_tx";
renesas,function = "msiof0";
};
usb0_pins: usb0 {
renesas,groups = "usb0";
renesas,function = "usb0";
};
usb1_pins: usb1 {
renesas,groups = "usb1";
renesas,function = "usb1";
};
};
&scif0 {
@ -151,7 +161,7 @@
};
&sata0 {
status = "okay";
status = "okay";
};
&sdhi0 {
@ -231,6 +241,18 @@
};
};
&pci0 {
status = "okay";
pinctrl-0 = <&usb0_pins>;
pinctrl-names = "default";
};
&pci1 {
status = "okay";
pinctrl-0 = <&usb1_pins>;
pinctrl-names = "default";
};
&pcie_bus_clk {
status = "okay";
};

View File

@ -279,6 +279,16 @@
renesas,groups = "i2c6";
renesas,function = "i2c6";
};
usb0_pins: usb0 {
renesas,groups = "usb0";
renesas,function = "usb0";
};
usb1_pins: usb1 {
renesas,groups = "usb1";
renesas,function = "usb1";
};
};
&ether {
@ -426,6 +436,18 @@
};
};
&pci0 {
status = "okay";
pinctrl-0 = <&usb0_pins>;
pinctrl-names = "default";
};
&pci1 {
status = "okay";
pinctrl-0 = <&usb1_pins>;
pinctrl-names = "default";
};
&pcie_bus_clk {
status = "okay";
};

View File

@ -961,6 +961,46 @@
status = "disabled";
};
pci0: pci@ee090000 {
compatible = "renesas,pci-r8a7791";
device_type = "pci";
clocks = <&mstp7_clks R8A7791_CLK_EHCI>;
reg = <0 0xee090000 0 0xc00>,
<0 0xee080000 0 0x1100>;
interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
bus-range = <0 0>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
interrupt-map-mask = <0xff00 0 0 0x7>;
interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>;
};
pci1: pci@ee0d0000 {
compatible = "renesas,pci-r8a7791";
device_type = "pci";
clocks = <&mstp7_clks R8A7791_CLK_EHCI>;
reg = <0 0xee0d0000 0 0xc00>,
<0 0xee0c0000 0 0x1100>;
interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
bus-range = <1 1>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
interrupt-map-mask = <0xff00 0 0 0x7>;
interrupt-map = <0x0000 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic 0 113 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
};
pciec: pcie@fe000000 {
compatible = "renesas,pcie-r8a7791";
reg = <0 0xfe000000 0 0x80000>;

View File

@ -21,6 +21,10 @@
model = "KZM-A9-GT";
compatible = "renesas,kzm9g-reference", "renesas,sh73a0";
aliases {
serial4 = &scifa4;
};
cpus {
cpu@0 {
cpu0-supply = <&vdd_dvfs>;
@ -35,7 +39,7 @@
};
chosen {
bootargs = "console=tty0 console=ttySC4,115200 root=/dev/nfs ip=dhcp ignore_loglevel earlyprintk=sh-sci.4,115200 rw";
bootargs = "console=tty0 console=ttySC4,115200 root=/dev/nfs ip=dhcp ignore_loglevel rw";
};
memory {
@ -276,9 +280,6 @@
};
&pfc {
pinctrl-0 = <&scifa4_pins>;
pinctrl-names = "default";
i2c3_pins: i2c3 {
renesas,groups = "i2c3_1";
renesas,function = "i2c3";
@ -318,6 +319,13 @@
};
};
&scifa4 {
pinctrl-0 = <&scifa4_pins>;
pinctrl-names = "default";
status = "okay";
};
&sdhi0 {
pinctrl-0 = <&sdhi0_pins>;
pinctrl-names = "default";

View File

@ -235,6 +235,78 @@
status = "disabled";
};
scifa0: serial@e6c40000 {
compatible = "renesas,scifa-sh73a0", "renesas,scifa";
reg = <0xe6c40000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifa1: serial@e6c50000 {
compatible = "renesas,scifa-sh73a0", "renesas,scifa";
reg = <0xe6c50000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifa2: serial@e6c60000 {
compatible = "renesas,scifa-sh73a0", "renesas,scifa";
reg = <0xe6c60000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifa3: serial@e6c70000 {
compatible = "renesas,scifa-sh73a0", "renesas,scifa";
reg = <0xe6c70000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifa4: serial@e6c80000 {
compatible = "renesas,scifa-sh73a0", "renesas,scifa";
reg = <0xe6c80000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifa5: serial@e6cb0000 {
compatible = "renesas,scifa-sh73a0", "renesas,scifa";
reg = <0xe6cb0000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifa6: serial@e6cc0000 {
compatible = "renesas,scifa-sh73a0", "renesas,scifa";
reg = <0xe6cc0000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifa7: serial@e6cd0000 {
compatible = "renesas,scifa-sh73a0", "renesas,scifa";
reg = <0xe6cd0000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 143 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
scifb8: serial@e6c30000 {
compatible = "renesas,scifb-sh73a0", "renesas,scifb";
reg = <0xe6c30000 0x100>;
interrupt-parent = <&gic>;
interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
pfc: pfc@e6050000 {
compatible = "renesas,pfc-sh73a0";
reg = <0xe6050000 0x8000>,

View File

@ -574,11 +574,17 @@ static struct clk_lookup lookups[] = {
/* MSTP */
CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]),
CLKDEV_DEV_ID("e6c40000.serial", &mstp_clks[MSTP204]),
CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]),
CLKDEV_DEV_ID("e6c50000.serial", &mstp_clks[MSTP203]),
CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]),
CLKDEV_DEV_ID("e6c20000.serial", &mstp_clks[MSTP206]),
CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP207]),
CLKDEV_DEV_ID("e6c30000.serial", &mstp_clks[MSTP207]),
CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP216]),
CLKDEV_DEV_ID("e6ce0000.serial", &mstp_clks[MSTP216]),
CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP217]),
CLKDEV_DEV_ID("e6cf0000.serial", &mstp_clks[MSTP217]),
CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]),
CLKDEV_DEV_ID("e6700020.dma-controller", &mstp_clks[MSTP218]),
CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),

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@ -555,27 +555,27 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[MSTP128]),
CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]),
CLKDEV_DEV_ID("e6c80000.sci", &mstp_clks[MSTP200]),
CLKDEV_DEV_ID("e6c80000.serial", &mstp_clks[MSTP200]),
CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]),
CLKDEV_DEV_ID("e6c70000.sci", &mstp_clks[MSTP201]),
CLKDEV_DEV_ID("e6c70000.serial", &mstp_clks[MSTP201]),
CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP202]),
CLKDEV_DEV_ID("e6c60000.sci", &mstp_clks[MSTP202]),
CLKDEV_DEV_ID("e6c60000.serial", &mstp_clks[MSTP202]),
CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]),
CLKDEV_DEV_ID("e6c50000.sci", &mstp_clks[MSTP203]),
CLKDEV_DEV_ID("e6c50000.serial", &mstp_clks[MSTP203]),
CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]),
CLKDEV_DEV_ID("e6c40000.sci", &mstp_clks[MSTP204]),
CLKDEV_DEV_ID("e6c40000.serial", &mstp_clks[MSTP204]),
CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]),
CLKDEV_DEV_ID("e6c30000.sci", &mstp_clks[MSTP206]),
CLKDEV_DEV_ID("e6c30000.serial", &mstp_clks[MSTP206]),
CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]),
CLKDEV_DEV_ID("e6cb0000.sci", &mstp_clks[MSTP207]),
CLKDEV_DEV_ID("e6cb0000.serial", &mstp_clks[MSTP207]),
CLKDEV_DEV_ID("sh-dma-engine.3", &mstp_clks[MSTP214]),
CLKDEV_DEV_ID("sh-dma-engine.2", &mstp_clks[MSTP216]),
CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[MSTP217]),
CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]),
CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP222]),
CLKDEV_DEV_ID("e6cd0000.sci", &mstp_clks[MSTP222]),
CLKDEV_DEV_ID("e6cd0000.serial", &mstp_clks[MSTP222]),
CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP230]),
CLKDEV_DEV_ID("e6cc0000.sci", &mstp_clks[MSTP230]),
CLKDEV_DEV_ID("e6cc0000.serial", &mstp_clks[MSTP230]),
CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]),
CLKDEV_DEV_ID("fe1f0000.sound", &mstp_clks[MSTP328]),

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@ -202,11 +202,17 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP027]), /* I2C3 */
CLKDEV_DEV_ID("ffc73000.i2c", &mstp_clks[MSTP027]), /* I2C3 */
CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
CLKDEV_DEV_ID("ffe40000.serial", &mstp_clks[MSTP026]), /* SCIF0 */
CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
CLKDEV_DEV_ID("ffe41000.serial", &mstp_clks[MSTP025]), /* SCIF1 */
CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */
CLKDEV_DEV_ID("ffe42000.serial", &mstp_clks[MSTP024]), /* SCIF2 */
CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP023]), /* SCIF3 */
CLKDEV_DEV_ID("ffe43000.serial", &mstp_clks[MSTP023]), /* SCIF3 */
CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP022]), /* SCIF4 */
CLKDEV_DEV_ID("ffe44000.serial", &mstp_clks[MSTP022]), /* SCIF4 */
CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */
CLKDEV_DEV_ID("ffe45000.serial", &mstp_clks[MSTP021]), /* SCIF5 */
CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */
CLKDEV_DEV_ID("fffc7000.spi", &mstp_clks[MSTP007]), /* HSPI0 */
CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */

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@ -638,16 +638,25 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("e6820000.i2c", &mstp_clks[MSTP116]), /* I2C0 */
CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */
CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */
CLKDEV_DEV_ID("e6cd0000.serial", &mstp_clks[MSTP219]), /* SCIFA7 */
CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]), /* SY-DMAC */
CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[MSTP217]), /* MP-DMAC */
CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
CLKDEV_DEV_ID("e6cb0000.serial", &mstp_clks[MSTP207]), /* SCIFA5 */
CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */
CLKDEV_DEV_ID("0xe6c3000.serial", &mstp_clks[MSTP206]), /* SCIFB */
CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
CLKDEV_DEV_ID("e6c40000.serial", &mstp_clks[MSTP204]), /* SCIFA0 */
CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */
CLKDEV_DEV_ID("e6c50000.serial", &mstp_clks[MSTP203]), /* SCIFA1 */
CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP202]), /* SCIFA2 */
CLKDEV_DEV_ID("e6c60000.serial", &mstp_clks[MSTP202]), /* SCIFA2 */
CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), /* SCIFA3 */
CLKDEV_DEV_ID("e6c70000.serial", &mstp_clks[MSTP201]), /* SCIFA3 */
CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */
CLKDEV_DEV_ID("e6c80000.serial", &mstp_clks[MSTP200]), /* SCIFA4 */
CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */
CLKDEV_DEV_ID("e6cc0000.serial", &mstp_clks[MSTP331]), /* SCIFA6 */
CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI */
CLKDEV_DEV_ID("ec230000.sound", &mstp_clks[MSTP328]), /* FSI */
CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */

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@ -187,12 +187,6 @@ static struct resource cmt1_resources[] = {
void __init r8a73a4_add_dt_devices(void)
{
r8a73a4_register_scif(0);
r8a73a4_register_scif(1);
r8a73a4_register_scif(2);
r8a73a4_register_scif(3);
r8a73a4_register_scif(4);
r8a73a4_register_scif(5);
r8a7790_register_cmt(1);
}
@ -287,6 +281,12 @@ static struct resource dma_resources[] = {
void __init r8a73a4_add_standard_devices(void)
{
r8a73a4_add_dt_devices();
r8a73a4_register_scif(0);
r8a73a4_register_scif(1);
r8a73a4_register_scif(2);
r8a73a4_register_scif(3);
r8a73a4_register_scif(4);
r8a73a4_register_scif(5);
r8a73a4_register_irqc(0);
r8a73a4_register_irqc(1);
r8a73a4_register_thermal();

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@ -310,6 +310,10 @@ static struct platform_device ipmmu_device = {
};
static struct platform_device *r8a7740_devices_dt[] __initdata = {
&cmt1_device,
};
static struct platform_device *r8a7740_early_devices[] __initdata = {
&scif0_device,
&scif1_device,
&scif2_device,
@ -319,10 +323,6 @@ static struct platform_device *r8a7740_devices_dt[] __initdata = {
&scif6_device,
&scif7_device,
&scif8_device,
&cmt1_device,
};
static struct platform_device *r8a7740_early_devices[] __initdata = {
&irqpin0_device,
&irqpin1_device,
&irqpin2_device,

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@ -292,12 +292,6 @@ void __init r8a7778_add_dt_devices(void)
}
#endif
r8a7778_register_scif(0);
r8a7778_register_scif(1);
r8a7778_register_scif(2);
r8a7778_register_scif(3);
r8a7778_register_scif(4);
r8a7778_register_scif(5);
r8a7778_register_tmu(0);
}
@ -506,6 +500,12 @@ static void __init r8a7778_register_hpb_dmae(void)
void __init r8a7778_add_standard_devices(void)
{
r8a7778_add_dt_devices();
r8a7778_register_scif(0);
r8a7778_register_scif(1);
r8a7778_register_scif(2);
r8a7778_register_scif(3);
r8a7778_register_scif(4);
r8a7778_register_scif(5);
r8a7778_register_i2c(0);
r8a7778_register_i2c(1);
r8a7778_register_i2c(2);

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@ -696,6 +696,10 @@ static struct platform_device irqpin3_device = {
};
static struct platform_device *sh73a0_devices_dt[] __initdata = {
&cmt1_device,
};
static struct platform_device *sh73a0_early_devices[] __initdata = {
&scif0_device,
&scif1_device,
&scif2_device,
@ -705,10 +709,6 @@ static struct platform_device *sh73a0_devices_dt[] __initdata = {
&scif6_device,
&scif7_device,
&scif8_device,
&cmt1_device,
};
static struct platform_device *sh73a0_early_devices[] __initdata = {
&tmu0_device,
&ipmmu_device,
};

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@ -59,29 +59,37 @@ void __init shmobile_setup_delay(unsigned int max_cpu_core_mhz,
void __init shmobile_init_delay(void)
{
struct device_node *np, *parent;
u32 max_freq, freq;
struct device_node *np, *cpus;
bool is_a8_a9 = false;
bool is_a15 = false;
u32 max_freq = 0;
max_freq = 0;
cpus = of_find_node_by_path("/cpus");
if (!cpus)
return;
parent = of_find_node_by_path("/cpus");
if (parent) {
for_each_child_of_node(parent, np) {
if (!of_property_read_u32(np, "clock-frequency", &freq))
max_freq = max(max_freq, freq);
}
of_node_put(parent);
for_each_child_of_node(cpus, np) {
u32 freq;
if (!of_property_read_u32(np, "clock-frequency", &freq))
max_freq = max(max_freq, freq);
if (of_device_is_compatible(np, "arm,cortex-a8") ||
of_device_is_compatible(np, "arm,cortex-a9"))
is_a8_a9 = true;
else if (of_device_is_compatible(np, "arm,cortex-a15"))
is_a15 = true;
}
if (max_freq) {
if (of_find_compatible_node(NULL, NULL, "arm,cortex-a8"))
shmobile_setup_delay_hz(max_freq, 1, 3);
else if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9"))
shmobile_setup_delay_hz(max_freq, 1, 3);
else if (of_find_compatible_node(NULL, NULL, "arm,cortex-a15"))
if (!IS_ENABLED(CONFIG_ARM_ARCH_TIMER))
shmobile_setup_delay_hz(max_freq, 2, 4);
}
of_node_put(cpus);
if (!max_freq)
return;
if (is_a8_a9)
shmobile_setup_delay_hz(max_freq, 1, 3);
else if (is_a15 && !IS_ENABLED(CONFIG_ARM_ARCH_TIMER))
shmobile_setup_delay_hz(max_freq, 2, 4);
}
static void __init shmobile_late_time_init(void)