drm/amdgpu: enable VCN3.0 DPG for navy_flounder
Enable VCN3.0 DPG for navy_flounder by setting up the flag to the ASIC Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -776,7 +776,8 @@ static int nv_common_early_init(void *handle)
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break;
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case CHIP_NAVY_FLOUNDER:
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adev->cg_flags = AMD_CG_SUPPORT_VCN_MGCG;
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adev->pg_flags = AMD_PG_SUPPORT_VCN;
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adev->pg_flags = AMD_PG_SUPPORT_VCN |
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AMD_PG_SUPPORT_VCN_DPG;
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adev->external_rev_id = adev->rev_id + 0x32;
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break;
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