This adds uart support for mt6592 SoC.
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commit
c6b4916460
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@ -78,6 +78,12 @@
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#clock-cells = <0>;
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#clock-cells = <0>;
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};
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};
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uart_clk: dummy26m {
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compatible = "fixed-clock";
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clock-frequency = <26000000>;
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#clock-cells = <0>;
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};
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timer: timer@10008000 {
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timer: timer@10008000 {
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compatible = "mediatek,mt6577-timer";
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compatible = "mediatek,mt6577-timer";
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reg = <0x10008000 0x80>;
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reg = <0x10008000 0x80>;
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@ -102,4 +108,36 @@
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reg = <0x10211000 0x1000>,
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reg = <0x10211000 0x1000>,
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<0x10212000 0x1000>;
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<0x10212000 0x1000>;
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};
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};
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uart0: serial@11002000 {
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compatible = "mediatek,mt6577-uart";
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reg = <0x11002000 0x400>;
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interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&uart_clk>;
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status = "disabled";
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};
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uart1: serial@11003000 {
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compatible = "mediatek,mt6577-uart";
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reg = <0x11003000 0x400>;
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interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&uart_clk>;
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status = "disabled";
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};
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uart2: serial@11004000 {
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compatible = "mediatek,mt6577-uart";
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reg = <0x11004000 0x400>;
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interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&uart_clk>;
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status = "disabled";
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};
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uart3: serial@11005000 {
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compatible = "mediatek,mt6577-uart";
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reg = <0x11005000 0x400>;
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interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&uart_clk>;
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status = "disabled";
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};
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};
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};
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