ARM: OMAP2+: Configure dma_plat_info directly and drop dma_dev_attr
Let's prepare things for passing dma_plat_info to the dmaengine driver in device tree auxdata. To do that, we want to configure dma_plat_info directly. And we can also drop the related dma_dev_attr data. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Russell King <rmk+kernel@armlinux.org.uk> Cc: Vinod Koul <vkoul@kernel.org> Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -211,9 +211,16 @@ static const struct dma_slave_map omap24xx_sdma_dt_map[] = {
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{ "musb-hdrc.1.auto", "dmareq5", SDMA_FILTER_PARAM(64) }, /* OMAP2420 only */
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{ "musb-hdrc.1.auto", "dmareq5", SDMA_FILTER_PARAM(64) }, /* OMAP2420 only */
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};
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};
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static struct omap_dma_dev_attr dma_attr = {
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.dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
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IS_CSSA_32 | IS_CDSA_32,
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.lch_count = 32,
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};
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static struct omap_system_dma_plat_info dma_plat_info __initdata = {
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static struct omap_system_dma_plat_info dma_plat_info __initdata = {
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.reg_map = reg_map,
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.reg_map = reg_map,
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.channel_stride = 0x60,
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.channel_stride = 0x60,
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.dma_attr = &dma_attr,
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.show_dma_caps = omap2_show_dma_caps,
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.show_dma_caps = omap2_show_dma_caps,
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.clear_dma = omap2_clear_dma,
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.clear_dma = omap2_clear_dma,
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.dma_write = dma_write,
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.dma_write = dma_write,
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@ -230,22 +237,25 @@ static struct platform_device_info omap_dma_dev_info __initdata = {
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static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
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static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
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{
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{
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struct platform_device *pdev;
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struct platform_device *pdev;
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struct omap_system_dma_plat_info p;
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struct omap_dma_dev_attr *d;
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struct resource *mem;
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struct resource *mem;
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char *name = "omap_dma_system";
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char *name = "omap_dma_system";
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p = dma_plat_info;
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dma_plat_info.errata = configure_dma_errata();
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p.dma_attr = (struct omap_dma_dev_attr *)oh->dev_attr;
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p.errata = configure_dma_errata();
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if (soc_is_omap24xx()) {
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if (soc_is_omap24xx()) {
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/* DMA slave map for drivers not yet converted to DT */
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/* DMA slave map for drivers not yet converted to DT */
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p.slave_map = omap24xx_sdma_dt_map;
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dma_plat_info.slave_map = omap24xx_sdma_dt_map;
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p.slavecnt = ARRAY_SIZE(omap24xx_sdma_dt_map);
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dma_plat_info.slavecnt = ARRAY_SIZE(omap24xx_sdma_dt_map);
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}
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}
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pdev = omap_device_build(name, 0, oh, &p, sizeof(p));
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if (!soc_is_omap242x())
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dma_attr.dev_caps |= IS_RW_PRIORITY;
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if (soc_is_omap34xx() && (omap_type() != OMAP2_DEVICE_TYPE_GP))
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dma_attr.dev_caps |= HS_CHANNELS_RESERVED;
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pdev = omap_device_build(name, 0, oh, &dma_plat_info,
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sizeof(dma_plat_info));
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if (IS_ERR(pdev)) {
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if (IS_ERR(pdev)) {
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pr_err("%s: Can't build omap_device for %s:%s.\n",
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pr_err("%s: Can't build omap_device for %s:%s.\n",
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__func__, name, oh->name);
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__func__, name, oh->name);
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@ -267,11 +277,6 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
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return -ENOMEM;
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return -ENOMEM;
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}
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}
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d = oh->dev_attr;
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if (cpu_is_omap34xx() && (omap_type() != OMAP2_DEVICE_TYPE_GP))
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d->dev_caps |= HS_CHANNELS_RESERVED;
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/* Check the capabilities register for descriptor loading feature */
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/* Check the capabilities register for descriptor loading feature */
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if (soc_is_omap24xx() || soc_is_omap34xx() || soc_is_am35xx())
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if (soc_is_omap24xx() || soc_is_omap34xx() || soc_is_am35xx())
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dma_common_ch_end = CCFN;
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dma_common_ch_end = CCFN;
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@ -126,18 +126,10 @@ static struct omap_hwmod omap2420_i2c2_hwmod = {
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.flags = HWMOD_16BIT_REG,
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.flags = HWMOD_16BIT_REG,
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};
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};
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/* dma attributes */
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static struct omap_dma_dev_attr dma_dev_attr = {
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.dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
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IS_CSSA_32 | IS_CDSA_32,
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.lch_count = 32,
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};
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static struct omap_hwmod omap2420_dma_system_hwmod = {
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static struct omap_hwmod omap2420_dma_system_hwmod = {
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.name = "dma",
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.name = "dma",
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.class = &omap2xxx_dma_hwmod_class,
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.class = &omap2xxx_dma_hwmod_class,
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.main_clk = "core_l3_ck",
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.main_clk = "core_l3_ck",
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.dev_attr = &dma_dev_attr,
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.flags = HWMOD_NO_IDLEST,
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.flags = HWMOD_NO_IDLEST,
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};
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};
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@ -121,18 +121,10 @@ static struct omap_hwmod omap2430_gpio5_hwmod = {
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.class = &omap2xxx_gpio_hwmod_class,
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.class = &omap2xxx_gpio_hwmod_class,
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};
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};
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/* dma attributes */
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static struct omap_dma_dev_attr dma_dev_attr = {
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.dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
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IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY,
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.lch_count = 32,
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};
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static struct omap_hwmod omap2430_dma_system_hwmod = {
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static struct omap_hwmod omap2430_dma_system_hwmod = {
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.name = "dma",
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.name = "dma",
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.class = &omap2xxx_dma_hwmod_class,
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.class = &omap2xxx_dma_hwmod_class,
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.main_clk = "core_l3_ck",
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.main_clk = "core_l3_ck",
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.dev_attr = &dma_dev_attr,
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.flags = HWMOD_NO_IDLEST,
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.flags = HWMOD_NO_IDLEST,
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};
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};
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@ -833,13 +833,6 @@ static struct omap_hwmod omap3xxx_gpio6_hwmod = {
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.class = &omap3xxx_gpio_hwmod_class,
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.class = &omap3xxx_gpio_hwmod_class,
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};
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};
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/* dma attributes */
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static struct omap_dma_dev_attr dma_dev_attr = {
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.dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
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IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY,
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.lch_count = 32,
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};
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static struct omap_hwmod_class_sysconfig omap3xxx_dma_sysc = {
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static struct omap_hwmod_class_sysconfig omap3xxx_dma_sysc = {
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.rev_offs = 0x0000,
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.rev_offs = 0x0000,
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.sysc_offs = 0x002c,
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.sysc_offs = 0x002c,
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@ -870,7 +863,6 @@ static struct omap_hwmod omap3xxx_dma_system_hwmod = {
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.idlest_idle_bit = OMAP3430_ST_SDMA_SHIFT,
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.idlest_idle_bit = OMAP3430_ST_SDMA_SHIFT,
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},
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},
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},
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},
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.dev_attr = &dma_dev_attr,
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.flags = HWMOD_NO_IDLEST,
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.flags = HWMOD_NO_IDLEST,
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};
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};
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@ -422,13 +422,6 @@ static struct omap_hwmod_class omap44xx_dma_hwmod_class = {
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.sysc = &omap44xx_dma_sysc,
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.sysc = &omap44xx_dma_sysc,
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};
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};
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/* dma dev_attr */
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static struct omap_dma_dev_attr dma_dev_attr = {
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.dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
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IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY,
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.lch_count = 32,
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};
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/* dma_system */
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/* dma_system */
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static struct omap_hwmod omap44xx_dma_system_hwmod = {
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static struct omap_hwmod omap44xx_dma_system_hwmod = {
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.name = "dma_system",
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.name = "dma_system",
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@ -441,7 +434,6 @@ static struct omap_hwmod omap44xx_dma_system_hwmod = {
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.context_offs = OMAP4_RM_SDMA_SDMA_CONTEXT_OFFSET,
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.context_offs = OMAP4_RM_SDMA_SDMA_CONTEXT_OFFSET,
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},
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},
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},
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},
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.dev_attr = &dma_dev_attr,
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};
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};
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/*
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/*
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@ -256,13 +256,6 @@ static struct omap_hwmod_class omap54xx_dma_hwmod_class = {
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.sysc = &omap54xx_dma_sysc,
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.sysc = &omap54xx_dma_sysc,
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};
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};
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/* dma dev_attr */
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static struct omap_dma_dev_attr dma_dev_attr = {
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.dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
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IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY,
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.lch_count = 32,
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};
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/* dma_system */
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/* dma_system */
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static struct omap_hwmod omap54xx_dma_system_hwmod = {
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static struct omap_hwmod omap54xx_dma_system_hwmod = {
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.name = "dma_system",
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.name = "dma_system",
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@ -275,7 +268,6 @@ static struct omap_hwmod omap54xx_dma_system_hwmod = {
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.context_offs = OMAP54XX_RM_DMA_DMA_SYSTEM_CONTEXT_OFFSET,
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.context_offs = OMAP54XX_RM_DMA_DMA_SYSTEM_CONTEXT_OFFSET,
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},
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},
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},
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},
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.dev_attr = &dma_dev_attr,
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};
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};
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/*
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/*
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@ -411,13 +411,6 @@ static struct omap_hwmod_class dra7xx_dma_hwmod_class = {
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.sysc = &dra7xx_dma_sysc,
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.sysc = &dra7xx_dma_sysc,
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};
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};
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/* dma dev_attr */
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static struct omap_dma_dev_attr dma_dev_attr = {
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.dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY |
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IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY,
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.lch_count = 32,
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};
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/* dma_system */
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/* dma_system */
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static struct omap_hwmod dra7xx_dma_system_hwmod = {
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static struct omap_hwmod dra7xx_dma_system_hwmod = {
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.name = "dma_system",
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.name = "dma_system",
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@ -430,7 +423,6 @@ static struct omap_hwmod dra7xx_dma_system_hwmod = {
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.context_offs = DRA7XX_RM_DMA_DMA_SYSTEM_CONTEXT_OFFSET,
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.context_offs = DRA7XX_RM_DMA_DMA_SYSTEM_CONTEXT_OFFSET,
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},
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},
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},
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},
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.dev_attr = &dma_dev_attr,
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};
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};
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/*
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/*
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