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ARM: imx: enable multi-platform build 

It enables multi-platform build for imx.  With ARCH_MULTI_* options
coming to play, ARCH_MXC becomes an user invisible option, while
ARCH_IMX_V4_V5 and ARCH_IMX_V6_V7 get removed.  Both imx_v4_v5_defconfig
and imx_v6_v7_defconfig get updated to adopt the changes.

AUTO_ZRELADDR and ARM_PATCH_PHYS_VIRT are selected by ARCH_MXC now to
save the duplication.

Headers timex.h and uncompress.h are not needed for multi-platform
build.  Remove them.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This commit is contained in:
Shawn Guo 2012-09-17 09:38:39 +08:00
parent 69ac71d370
commit c5a0d4977f
6 changed files with 33 additions and 201 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
arch/arm/Kconfig
View File

@ -433,19 +433,6 @@ config ARCH_FOOTBRIDGE
Support for systems based on the DC21285 companion chip
("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
config ARCH_MXC
bool "Freescale MXC/iMX-based"
select ARCH_REQUIRE_GPIOLIB
select CLKDEV_LOOKUP
select CLKSRC_MMIO
select GENERIC_CLOCKEVENTS
select GENERIC_IRQ_CHIP
select MULTI_IRQ_HANDLER
select SPARSE_IRQ
select USE_OF
help
Support for Freescale MXC/iMX-based family of processors
config ARCH_MXS
bool "Freescale MXS-based"
select ARCH_REQUIRE_GPIOLIB

5
arch/arm/configs/imx_v4_v5_defconfig
View File

@ -17,8 +17,9 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_MXC=y
CONFIG_ARCH_IMX_V4_V5=y
CONFIG_ARCH_MULTI_V4T=y
CONFIG_ARCH_MULTI_V5=y
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_MX1ADS=y
CONFIG_MACH_SCB9328=y
CONFIG_MACH_APF9328=y

3
arch/arm/configs/imx_v6_v7_defconfig
View File

@ -16,7 +16,8 @@ CONFIG_MODULE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SRCVERSION_ALL=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_ARCH_MXC=y
CONFIG_ARCH_MULTI_V6=y
CONFIG_ARCH_MULTI_V7=y
CONFIG_MACH_MX31LILLY=y
CONFIG_MACH_MX31LITE=y
CONFIG_MACH_PCM037=y

59
arch/arm/mach-imx/Kconfig
View File

@ -1,4 +1,20 @@
if ARCH_MXC
config ARCH_MXC
def_bool y if ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7
select ARCH_REQUIRE_GPIOLIB
select ARM_PATCH_PHYS_VIRT
select AUTO_ZRELADDR if !ZBOOT_ROM
select CLKDEV_LOOKUP
select CLKSRC_MMIO
select GENERIC_CLOCKEVENTS
select GENERIC_IRQ_CHIP
select MULTI_IRQ_HANDLER
select SPARSE_IRQ
select USE_OF
help
Support for Freescale MXC/iMX-based family of processors
menu "Freescale i.MX support"
depends on ARCH_MXC
config MXC_IRQ_PRIOR
bool "Use IRQ priority"
@ -161,21 +177,7 @@ config SOC_IMX51
select PINCTRL_IMX51
select SOC_IMX5
menu "Freescale MXC Implementations"
choice
prompt "Freescale CPU family:"
default ARCH_IMX_V6_V7
config ARCH_IMX_V4_V5
bool "i.MX1, i.MX21, i.MX25, i.MX27"
select ARM_PATCH_PHYS_VIRT
select AUTO_ZRELADDR if !ZBOOT_ROM
help
This enables support for systems based on the Freescale i.MX ARMv4
and ARMv5 SoCs
if ARCH_IMX_V4_V5
if ARCH_MULTI_V4T
comment "MX1 platforms:"
config MACH_MXLADS
@ -204,6 +206,10 @@ config MACH_APF9328
help
Say Yes here if you are using the Armadeus APF9328 development board
endif
if ARCH_MULTI_V5
comment "MX21 platforms:"
config MACH_MX21ADS
@ -455,16 +461,7 @@ config MACH_IMX27_DT
endif
config ARCH_IMX_V6_V7
bool "i.MX3, i.MX5, i.MX6"
select ARM_PATCH_PHYS_VIRT
select AUTO_ZRELADDR if !ZBOOT_ROM
select MIGHT_HAVE_CACHE_L2X0
help
This enables support for systems based on the Freescale i.MX3, i.MX5
and i.MX6 family.
if ARCH_IMX_V6_V7
if ARCH_MULTI_V6
comment "MX31 platforms:"
@ -729,6 +726,10 @@ config MACH_VPR200
Include support for VPR200 platform. This includes specific
configurations for the board and its peripherals.
endif
if ARCH_MULTI_V7
comment "i.MX5 platforms:"
config MACH_MX50_RDP
@ -847,10 +848,6 @@ config SOC_IMX6Q
endif
endchoice
endmenu
source "arch/arm/mach-imx/devices/Kconfig"
endif
endmenu

22
arch/arm/mach-imx/include/mach/timex.h
View File

@ -1,22 +0,0 @@
/*
* Copyright (C) 1999 ARM Limited
* Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __ASM_ARCH_MXC_TIMEX_H__
#define __ASM_ARCH_MXC_TIMEX_H__
/* Bogus value */
#define CLOCK_TICK_RATE 12345678
#endif /* __ASM_ARCH_MXC_TIMEX_H__ */

132
arch/arm/mach-imx/include/mach/uncompress.h
View File

@ -1,132 +0,0 @@
/*
* arch/arm/plat-mxc/include/mach/uncompress.h
*
* Copyright (C) 1999 ARM Limited
* Copyright (C) Shane Nay (shane@minirl.com)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __ASM_ARCH_MXC_UNCOMPRESS_H__
#define __ASM_ARCH_MXC_UNCOMPRESS_H__
#define __MXC_BOOT_UNCOMPRESS
#include <asm/mach-types.h>
unsigned long uart_base;
#define UART(x) (*(volatile unsigned long *)(uart_base + (x)))
#define USR2 0x98
#define USR2_TXFE (1<<14)
#define TXR 0x40
#define UCR1 0x80
#define UCR1_UARTEN 1
/*
* The following code assumes the serial port has already been
* initialized by the bootloader. We search for the first enabled
* port in the most probable order. If you didn't setup a port in
* your bootloader then nothing will appear (which might be desired).
*
* This does not append a newline
*/
static void putc(int ch)
{
if (!uart_base)
return;
if (!(UART(UCR1) & UCR1_UARTEN))
return;
while (!(UART(USR2) & USR2_TXFE))
barrier();
UART(TXR) = ch;
}
static inline void flush(void)
{
}
#define MX1_UART1_BASE_ADDR 0x00206000
#define MX25_UART1_BASE_ADDR 0x43f90000
#define MX2X_UART1_BASE_ADDR 0x1000a000
#define MX3X_UART1_BASE_ADDR 0x43F90000
#define MX3X_UART2_BASE_ADDR 0x43F94000
#define MX3X_UART5_BASE_ADDR 0x43FB4000
#define MX51_UART1_BASE_ADDR 0x73fbc000
#define MX50_UART1_BASE_ADDR 0x53fbc000
#define MX53_UART1_BASE_ADDR 0x53fbc000
static __inline__ void __arch_decomp_setup(unsigned long arch_id)
{
switch (arch_id) {
case MACH_TYPE_MX1ADS:
case MACH_TYPE_SCB9328:
uart_base = MX1_UART1_BASE_ADDR;
break;
case MACH_TYPE_MX25_3DS:
uart_base = MX25_UART1_BASE_ADDR;
break;
case MACH_TYPE_IMX27LITE:
case MACH_TYPE_MX27_3DS:
case MACH_TYPE_MX27ADS:
case MACH_TYPE_PCM038:
case MACH_TYPE_MX21ADS:
case MACH_TYPE_PCA100:
case MACH_TYPE_MXT_TD60:
case MACH_TYPE_IMX27IPCAM:
uart_base = MX2X_UART1_BASE_ADDR;
break;
case MACH_TYPE_MX31LITE:
case MACH_TYPE_ARMADILLO5X0:
case MACH_TYPE_MX31MOBOARD:
case MACH_TYPE_QONG:
case MACH_TYPE_MX31_3DS:
case MACH_TYPE_PCM037:
case MACH_TYPE_MX31ADS:
case MACH_TYPE_MX35_3DS:
case MACH_TYPE_PCM043:
case MACH_TYPE_LILLY1131:
case MACH_TYPE_VPR200:
case MACH_TYPE_EUKREA_CPUIMX35SD:
uart_base = MX3X_UART1_BASE_ADDR;
break;
case MACH_TYPE_MAGX_ZN5:
uart_base = MX3X_UART2_BASE_ADDR;
break;
case MACH_TYPE_BUG:
uart_base = MX3X_UART5_BASE_ADDR;
break;
case MACH_TYPE_MX51_BABBAGE:
case MACH_TYPE_EUKREA_CPUIMX51SD:
case MACH_TYPE_MX51_3DS:
uart_base = MX51_UART1_BASE_ADDR;
break;
case MACH_TYPE_MX50_RDP:
uart_base = MX50_UART1_BASE_ADDR;
break;
case MACH_TYPE_MX53_EVK:
case MACH_TYPE_MX53_LOCO:
case MACH_TYPE_MX53_SMD:
case MACH_TYPE_MX53_ARD:
uart_base = MX53_UART1_BASE_ADDR;
break;
default:
break;
}
}
#define arch_decomp_setup() __arch_decomp_setup(arch_id)
#define arch_decomp_wdog()
#endif /* __ASM_ARCH_MXC_UNCOMPRESS_H__ */