ARM: dts: meson8: add the DDR clock controller

Add the DDR clock controller and pass it's DDR_CLKID_DDR_PLL to the main
(HHI) clock controller as "ddr_clk". The "ddr_clk" is used as one of the
inputs for the audio clock muxes.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This commit is contained in:
Martin Blumenstingl 2019-12-08 19:05:24 +01:00 committed by Kevin Hilman
parent 630ea3108a
commit c4ac5c37a4
1 changed files with 11 additions and 2 deletions

View File

@ -3,6 +3,7 @@
* Copyright 2014 Carlo Caione <carlo@caione.org>
*/
#include <dt-bindings/clock/meson8-ddr-clkc.h>
#include <dt-bindings/clock/meson8b-clkc.h>
#include <dt-bindings/gpio/meson8-gpio.h>
#include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
@ -195,6 +196,14 @@
#size-cells = <1>;
ranges = <0x0 0xc8000000 0x8000>;
ddr_clkc: clock-controller@400 {
compatible = "amlogic,meson8-ddr-clkc";
reg = <0x400 0x20>;
clocks = <&xtal>;
clock-names = "xtal";
#clock-cells = <1>;
};
dmcbus: bus@6000 {
compatible = "simple-bus";
reg = <0x6000 0x400>;
@ -455,8 +464,8 @@
&hhi {
clkc: clock-controller {
compatible = "amlogic,meson8-clkc";
clocks = <&xtal>;
clock-names = "xtal";
clocks = <&xtal>, <&ddr_clkc DDR_CLKID_DDR_PLL>;
clock-names = "xtal", "ddr_pll";
#clock-cells = <1>;
#reset-cells = <1>;
};