ARM: dts: meson8: add the DDR clock controller
Add the DDR clock controller and pass it's DDR_CLKID_DDR_PLL to the main (HHI) clock controller as "ddr_clk". The "ddr_clk" is used as one of the inputs for the audio clock muxes. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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* Copyright 2014 Carlo Caione <carlo@caione.org>
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*/
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#include <dt-bindings/clock/meson8-ddr-clkc.h>
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#include <dt-bindings/clock/meson8b-clkc.h>
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#include <dt-bindings/gpio/meson8-gpio.h>
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#include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
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#size-cells = <1>;
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ranges = <0x0 0xc8000000 0x8000>;
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ddr_clkc: clock-controller@400 {
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compatible = "amlogic,meson8-ddr-clkc";
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reg = <0x400 0x20>;
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clocks = <&xtal>;
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clock-names = "xtal";
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#clock-cells = <1>;
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};
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dmcbus: bus@6000 {
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compatible = "simple-bus";
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reg = <0x6000 0x400>;
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@ -455,8 +464,8 @@
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&hhi {
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clkc: clock-controller {
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compatible = "amlogic,meson8-clkc";
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clocks = <&xtal>;
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clock-names = "xtal";
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clocks = <&xtal>, <&ddr_clkc DDR_CLKID_DDR_PLL>;
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clock-names = "xtal", "ddr_pll";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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