UbiquitousOS
/
OpenCloudOS-Kernel
mirror of https://gitee.com/OpenCloudOS/OpenCloudOS-Kernel.git
11
0
Fork 0
Code Issues Projects Releases Wiki Activity

Add the minimal DTS support for DRA7xx based SoC core. 

Add the initial support for N900 and gta04 phones.
 Enable USB3 on OMAP5 evm board.
 Add support for cryto accelerators
 Add new IGEP AQUILA board
 Add AM33XX EDMA support
 Update HSUSB node to use the reset-gpios fmwk
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIcBAABAgAGBQJSWE8VAAoJEK1b4JDGryJ1SQgQAJv43EFPZtSSVJ1a7OpcqPba
 N3qRRta1o7yAGwQpWcTIsDLre42YeUnVyqH6dzr5ivESeCdLzjJCTq0gS3tMT3P2
 G+csQoOAHEEgUYdkNWs+trJlpSQmXGKM9XfIc5qkK6n6NQ0qVBcwBK0grgyoJwYB
 Z1y5a6+ZV0NJ+qZeORJcpHGDH8ODRYJJ/4aajgZoF+3GPYVc/KX2uN4OcCdq1Od9
 zYUn7M6SZ0gNEVznQAHjTUiMP7qvWAA+ueBKU+K3HoqsIFc32hE+sIpIV6nHeao3
 XTmwEciICyIeLWdu1WwDGozEGmPjVynj7m6TznCD6rMbLp5COmZnPQs1XtZ+NAdl
 7j339BJ4dmRHmbYkoW9JP/6nzAEQhtOG87Ms3pJDbYpFrZDupOREt6s1kFw2VCSE
 i6tPwp5dhQ8NqnZlrz7OoRcv8RRC/yyym6mtvcWOxxiPLBgpucLuTjvHcHhGVlRL
 crDK90zs1Cs7c+tOT5AXlgotEu9QYFOanYtAgF9WYN+g63GzxJRDokOXNhUEAevA
 7lX37D5ueDbnkBdHKDIvBFu5+7pERg7dbjdlHiAKyjZSgSo8XkHyRGsSP4lISkgX
 b2o/CC/g+81N7lC8dO670wnLGez5mE89uq4P39VcvM+aSs8lLZFsklKNFYIXpNz0
 q59ju5gqiINS+V0B/WGc
 =O1R9
 -----END PGP SIGNATURE-----

Merge tag 'for_3.13/dts_signed' of git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt into omap-for-v3.13/dt

Add the minimal DTS support for DRA7xx based SoC core.
Add the initial support for N900 and gta04 phones.
Enable USB3 on OMAP5 evm board.
Add support for cryto accelerators
Add new IGEP AQUILA board
Add AM33XX EDMA support
Update HSUSB node to use the reset-gpios fmwk
This commit is contained in:
Tony Lindgren 2013-10-11 15:40:07 -07:00
parent d0e639c9e0 6cf02dbb4b
commit c49f4984fd
33 changed files with 3132 additions and 812 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

31
Documentation/devicetree/bindings/crypto/omap-aes.txt Normal file
View File

@ -0,0 +1,31 @@
OMAP SoC AES crypto Module
Required properties:
- compatible : Should contain entries for this and backward compatible
AES versions:
- "ti,omap2-aes" for OMAP2.
- "ti,omap3-aes" for OMAP3.
- "ti,omap4-aes" for OMAP4 and AM33XX.
Note that the OMAP2 and 3 versions are compatible (OMAP3 supports
more algorithms) but they are incompatible with OMAP4.
- ti,hwmods: Name of the hwmod associated with the AES module
- reg : Offset and length of the register set for the module
- interrupts : the interrupt-specifier for the AES module.
Optional properties:
- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
Documentation/devicetree/bindings/dma/dma.txt
- dma-names: DMA request names should include "tx" and "rx" if present.
Example:
/* AM335x */
aes: aes@53500000 {
compatible = "ti,omap4-aes";
ti,hwmods = "aes";
reg = <0x53500000 0xa0>;
interrupts = <102>;
dmas = <&edma 6>,
<&edma 5>;
dma-names = "tx", "rx";
};

28
Documentation/devicetree/bindings/crypto/omap-sham.txt Normal file
View File

@ -0,0 +1,28 @@
OMAP SoC SHA crypto Module
Required properties:
- compatible : Should contain entries for this and backward compatible
SHAM versions:
- "ti,omap2-sham" for OMAP2 & OMAP3.
- "ti,omap4-sham" for OMAP4 and AM33XX.
Note that these two versions are incompatible.
- ti,hwmods: Name of the hwmod associated with the SHAM module
- reg : Offset and length of the register set for the module
- interrupts : the interrupt-specifier for the SHAM module.
Optional properties:
- dmas: DMA specifiers for the rx dma. See the DMA client binding,
Documentation/devicetree/bindings/dma/dma.txt
- dma-names: DMA request name. Should be "rx" if a dma is present.
Example:
/* AM335x */
sham: sham@53100000 {
compatible = "ti,omap4-sham";
ti,hwmods = "sham";
reg = <0x53100000 0x200>;
interrupts = <109>;
dmas = <&edma 36>;
dma-names = "rx";
};

26
Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
View File

@ -20,8 +20,17 @@ ti,dual-volt: boolean, supports dual voltage cards
ti,non-removable: non-removable slot (like eMMC)
ti,needs-special-reset: Requires a special softreset sequence
ti,needs-special-hs-handling: HSMMC IP needs special setting for handling High Speed
dmas: List of DMA specifiers with the controller specific format
as described in the generic DMA client binding. A tx and rx
specifier is required.
dma-names: List of DMA request names. These strings correspond
1:1 with the DMA specifiers listed in dmas. The string naming is
to be "rx" and "tx" for RX and TX DMA requests, respectively.
Examples:
[hwmod populated DMA resources]
Example:
mmc1: mmc@0x4809c000 {
compatible = "ti,omap4-hsmmc";
reg = <0x4809c000 0x400>;
@ -31,3 +40,18 @@ Example:
vmmc-supply = <&vmmc>; /* phandle to regulator node */
ti,non-removable;
};
[generic DMA request binding]
mmc1: mmc@0x4809c000 {
compatible = "ti,omap4-hsmmc";
reg = <0x4809c000 0x400>;
ti,hwmods = "mmc1";
ti,dual-volt;
bus-width = <4>;
vmmc-supply = <&vmmc>; /* phandle to regulator node */
ti,non-removable;
dmas = <&edma 24
&edma 25>;
dma-names = "tx", "rx";
};

6
arch/arm/boot/dts/Makefile
View File

@ -172,7 +172,9 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
omap3-devkit8000.dtb \
omap3-beagle-xm.dtb \
omap3-evm.dtb \
omap3-n900.dtb \
omap3-tobi.dtb \
omap3-gta04.dtb \
omap3-igep0020.dtb \
omap3-igep0030.dtb \
omap4-panda.dtb \
@ -186,9 +188,11 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
am335x-evmsk.dtb \
am335x-bone.dtb \
am335x-boneblack.dtb \
am335x-base0033.dtb \
am3517-evm.dtb \
am3517_mt_ventoux.dtb \
am43x-epos-evm.dtb
am43x-epos-evm.dtb \
dra7-evm.dtb
dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb
dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
dtb-$(CONFIG_ARCH_U8500) += ste-snowball.dtb \

16
arch/arm/boot/dts/am335x-base0033.dts Normal file
View File

@ -0,0 +1,16 @@
/*
* am335x-base0033.dts - Device Tree file for IGEP AQUILA EXPANSION
*
* Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include "am335x-igep0033.dtsi"
/ {
model = "IGEP COM AM335x on AQUILA Expansion";
compatible = "isee,am335x-base0033", "isee,am335x-igep0033", "ti,am33xx";
};

315
arch/arm/boot/dts/am335x-bone-common.dtsi
View File

@ -21,145 +21,6 @@
reg = <0x80000000 0x10000000>; /* 256 MB */
};
am33xx_pinmux: pinmux@44e10800 {
pinctrl-names = "default";
pinctrl-0 = <&clkout2_pin>;
user_leds_s0: user_leds_s0 {
pinctrl-single,pins = <
0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
>;
};
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
clkout2_pin: pinmux_clkout2_pin {
pinctrl-single,pins = <
0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
>;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 1 reset value */
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
/* MDIO reset value */
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
};
ocp {
uart0: serial@44e09000 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
musb: usb@47400000 {
status = "okay";
control@44e10000 {
status = "okay";
};
usb-phy@47401300 {
status = "okay";
};
usb-phy@47401b00 {
status = "okay";
};
usb@47401000 {
status = "okay";
};
usb@47401800 {
status = "okay";
dr_mode = "host";
};
dma-controller@07402000 {
status = "okay";
};
};
i2c0: i2c@44e0b000 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
clock-frequency = <400000>;
tps: tps@24 {
reg = <0x24>;
};
};
};
leds {
pinctrl-names = "default";
pinctrl-0 = <&user_leds_s0>;
@ -183,15 +44,182 @@
led@4 {
label = "beaglebone:green:usr2";
gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "cpu0";
default-state = "off";
};
led@5 {
label = "beaglebone:green:usr3";
gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc1";
default-state = "off";
};
};
vmmcsd_fixed: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "vmmcsd_fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
&am33xx_pinmux {
pinctrl-names = "default";
pinctrl-0 = <&clkout2_pin>;
user_leds_s0: user_leds_s0 {
pinctrl-single,pins = <
0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
>;
};
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
clkout2_pin: pinmux_clkout2_pin {
pinctrl-single,pins = <
0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
>;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 1 reset value */
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
/* MDIO reset value */
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */
>;
};
emmc_pins: pinmux_emmc_pins {
pinctrl-single,pins = <
0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&usb {
status = "okay";
control@44e10000 {
status = "okay";
};
usb-phy@47401300 {
status = "okay";
};
usb-phy@47401b00 {
status = "okay";
};
usb@47401000 {
status = "okay";
};
usb@47401800 {
status = "okay";
dr_mode = "host";
};
dma-controller@07402000 {
status = "okay";
};
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
clock-frequency = <400000>;
tps: tps@24 {
reg = <0x24>;
};
};
/include/ "tps65217.dtsi"
@ -260,3 +288,12 @@
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
};
&mmc1 {
status = "okay";
bus-width = <0x4>;
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
cd-inverted;
};

18
arch/arm/boot/dts/am335x-bone.dts
View File

@ -9,3 +9,21 @@
#include "am33xx.dtsi"
#include "am335x-bone-common.dtsi"
&ldo3_reg {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
&mmc1 {
vmmc-supply = <&ldo3_reg>;
};
&sham {
status = "okay";
};
&aes {
status = "okay";
};

61
arch/arm/boot/dts/am335x-boneblack.dts
View File

@ -15,3 +15,64 @@
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
&mmc1 {
vmmc-supply = <&vmmcsd_fixed>;
};
&mmc2 {
vmmc-supply = <&vmmcsd_fixed>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_pins>;
bus-width = <8>;
status = "okay";
ti,vcc-aux-disable-is-sleep;
};
&am33xx_pinmux {
nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {
pinctrl-single,pins = <
0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */
0xa0 0x08 /* lcd_data0.lcd_data0, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xa4 0x08 /* lcd_data1.lcd_data1, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xa8 0x08 /* lcd_data2.lcd_data2, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xac 0x08 /* lcd_data3.lcd_data3, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xb0 0x08 /* lcd_data4.lcd_data4, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xb4 0x08 /* lcd_data5.lcd_data5, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xb8 0x08 /* lcd_data6.lcd_data6, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xbc 0x08 /* lcd_data7.lcd_data7, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xc0 0x08 /* lcd_data8.lcd_data8, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xc4 0x08 /* lcd_data9.lcd_data9, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xc8 0x08 /* lcd_data10.lcd_data10, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xcc 0x08 /* lcd_data11.lcd_data11, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xd0 0x08 /* lcd_data12.lcd_data12, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xd4 0x08 /* lcd_data13.lcd_data13, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xd8 0x08 /* lcd_data14.lcd_data14, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xdc 0x08 /* lcd_data15.lcd_data15, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */
0xe0 0x00 /* lcd_vsync.lcd_vsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
0xe4 0x00 /* lcd_hsync.lcd_hsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
0xe8 0x00 /* lcd_pclk.lcd_pclk, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */
>;
};
nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins {
pinctrl-single,pins = <
0x1b0 0x03 /* xdma_event_intr0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT */
>;
};
};
&lcdc {
status = "okay";
};
/ {
hdmi {
compatible = "ti,tilcdc,slave";
i2c = <&i2c0>;
pinctrl-names = "default", "off";
pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
status = "okay";
};
};

721
arch/arm/boot/dts/am335x-evm.dts
View File

@ -24,324 +24,6 @@
reg = <0x80000000 0x10000000>; /* 256 MB */
};
am33xx_pinmux: pinmux@44e10800 {
pinctrl-names = "default";
pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>;
matrix_keypad_s0: matrix_keypad_s0 {
pinctrl-single,pins = <
0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */
>;
};
volume_keys_s0: volume_keys_s0 {
pinctrl-single,pins = <
0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */
0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */
>;
};
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
i2c1_pins: pinmux_i2c1_pins {
pinctrl-single,pins = <
0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */
0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
clkout2_pin: pinmux_clkout2_pin {
pinctrl-single,pins = <
0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
>;
};
nandflash_pins_s0: nandflash_pins_s0 {
pinctrl-single,pins = <
0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
>;
};
ecap0_pins: backlight_pins {
pinctrl-single,pins = <
0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
>;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 1 reset value */
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
/* MDIO reset value */
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
};
ocp {
uart0: serial@44e09000 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
i2c0: i2c@44e0b000 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
clock-frequency = <400000>;
tps: tps@2d {
reg = <0x2d>;
};
};
musb: usb@47400000 {
status = "okay";
control@44e10000 {
status = "okay";
};
usb-phy@47401300 {
status = "okay";
};
usb-phy@47401b00 {
status = "okay";
};
usb@47401000 {
status = "okay";
};
usb@47401800 {
status = "okay";
dr_mode = "host";
};
dma-controller@07402000 {
status = "okay";
};
};
i2c1: i2c@4802a000 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
status = "okay";
clock-frequency = <100000>;
lis331dlh: lis331dlh@18 {
compatible = "st,lis331dlh", "st,lis3lv02d";
reg = <0x18>;
Vdd-supply = <&lis3_reg>;
Vdd_IO-supply = <&lis3_reg>;
st,click-single-x;
st,click-single-y;
st,click-single-z;
st,click-thresh-x = <10>;
st,click-thresh-y = <10>;
st,click-thresh-z = <10>;
st,irq1-click;
st,irq2-click;
st,wakeup-x-lo;
st,wakeup-x-hi;
st,wakeup-y-lo;
st,wakeup-y-hi;
st,wakeup-z-lo;
st,wakeup-z-hi;
st,min-limit-x = <120>;
st,min-limit-y = <120>;
st,min-limit-z = <140>;
st,max-limit-x = <550>;
st,max-limit-y = <550>;
st,max-limit-z = <750>;
};
tsl2550: tsl2550@39 {
compatible = "taos,tsl2550";
reg = <0x39>;
};
tmp275: tmp275@48 {
compatible = "ti,tmp275";
reg = <0x48>;
};
};
elm: elm@48080000 {
status = "okay";
};
epwmss0: epwmss@48300000 {
status = "okay";
ecap0: ecap@48300100 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ecap0_pins>;
};
};
gpmc: gpmc@50000000 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nandflash_pins_s0>;
ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
nand@0,0 {
reg = <0 0 0>; /* CS0, offset 0 */
nand-bus-width = <8>;
ti,nand-ecc-opt = "bch8";
gpmc,device-nand = "true";
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <34>;
gpmc,adv-wr-off-ns = <44>;
gpmc,we-on-ns = <0>;
gpmc,we-off-ns = <40>;
gpmc,oe-on-ns = <0>;
gpmc,oe-off-ns = <54>;
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
gpmc,wait-on-read = "true";
gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
#address-cells = <1>;
#size-cells = <1>;
elm_id = <&elm>;
/* MTD partition table */
partition@0 {
label = "SPL1";
reg = <0x00000000 0x000020000>;
};
partition@1 {
label = "SPL2";
reg = <0x00020000 0x00020000>;
};
partition@2 {
label = "SPL3";
reg = <0x00040000 0x00020000>;
};
partition@3 {
label = "SPL4";
reg = <0x00060000 0x00020000>;
};
partition@4 {
label = "U-boot";
reg = <0x00080000 0x001e0000>;
};
partition@5 {
label = "environment";
reg = <0x00260000 0x00020000>;
};
partition@6 {
label = "Kernel";
reg = <0x00280000 0x00500000>;
};
partition@7 {
label = "File-System";
reg = <0x00780000 0x0F880000>;
};
};
};
};
vbat: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "vbat";
@ -403,6 +85,393 @@
brightness-levels = <0 51 53 56 62 75 101 152 255>;
default-brightness-level = <8>;
};
panel {
compatible = "ti,tilcdc,panel";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&lcd_pins_s0>;
panel-info {
ac-bias = <255>;
ac-bias-intrpt = <0>;
dma-burst-sz = <16>;
bpp = <32>;
fdd = <0x80>;
sync-edge = <0>;
sync-ctrl = <1>;
raster-order = <0>;
fifo-th = <0>;
};
display-timings {
800x480p62 {
clock-frequency = <30000000>;
hactive = <800>;
vactive = <480>;
hfront-porch = <39>;
hback-porch = <39>;
hsync-len = <47>;
vback-porch = <29>;
vfront-porch = <13>;
vsync-len = <2>;
hsync-active = <1>;
vsync-active = <1>;
};
};
};
};
&am33xx_pinmux {
pinctrl-names = "default";
pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>;
matrix_keypad_s0: matrix_keypad_s0 {
pinctrl-single,pins = <
0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */
>;
};
volume_keys_s0: volume_keys_s0 {
pinctrl-single,pins = <
0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */
0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */
>;
};
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
i2c1_pins: pinmux_i2c1_pins {
pinctrl-single,pins = <
0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */
0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
clkout2_pin: pinmux_clkout2_pin {
pinctrl-single,pins = <
0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
>;
};
nandflash_pins_s0: nandflash_pins_s0 {
pinctrl-single,pins = <
0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
>;
};
ecap0_pins: backlight_pins {
pinctrl-single,pins = <
0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
>;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 1 reset value */
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
/* MDIO reset value */
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
lcd_pins_s0: lcd_pins_s0 {
pinctrl-single,pins = <
0x20 0x01 /* gpmc_ad8.lcd_data16, OUTPUT | MODE1 */
0x24 0x01 /* gpmc_ad9.lcd_data17, OUTPUT | MODE1 */
0x28 0x01 /* gpmc_ad10.lcd_data18, OUTPUT | MODE1 */
0x2c 0x01 /* gpmc_ad11.lcd_data19, OUTPUT | MODE1 */
0x30 0x01 /* gpmc_ad12.lcd_data20, OUTPUT | MODE1 */
0x34 0x01 /* gpmc_ad13.lcd_data21, OUTPUT | MODE1 */
0x38 0x01 /* gpmc_ad14.lcd_data22, OUTPUT | MODE1 */
0x3c 0x01 /* gpmc_ad15.lcd_data23, OUTPUT | MODE1 */
0xa0 0x00 /* lcd_data0.lcd_data0, OUTPUT | MODE0 */
0xa4 0x00 /* lcd_data1.lcd_data1, OUTPUT | MODE0 */
0xa8 0x00 /* lcd_data2.lcd_data2, OUTPUT | MODE0 */
0xac 0x00 /* lcd_data3.lcd_data3, OUTPUT | MODE0 */
0xb0 0x00 /* lcd_data4.lcd_data4, OUTPUT | MODE0 */
0xb4 0x00 /* lcd_data5.lcd_data5, OUTPUT | MODE0 */
0xb8 0x00 /* lcd_data6.lcd_data6, OUTPUT | MODE0 */
0xbc 0x00 /* lcd_data7.lcd_data7, OUTPUT | MODE0 */
0xc0 0x00 /* lcd_data8.lcd_data8, OUTPUT | MODE0 */
0xc4 0x00 /* lcd_data9.lcd_data9, OUTPUT | MODE0 */
0xc8 0x00 /* lcd_data10.lcd_data10, OUTPUT | MODE0 */
0xcc 0x00 /* lcd_data11.lcd_data11, OUTPUT | MODE0 */
0xd0 0x00 /* lcd_data12.lcd_data12, OUTPUT | MODE0 */
0xd4 0x00 /* lcd_data13.lcd_data13, OUTPUT | MODE0 */
0xd8 0x00 /* lcd_data14.lcd_data14, OUTPUT | MODE0 */
0xdc 0x00 /* lcd_data15.lcd_data15, OUTPUT | MODE0 */
0xe0 0x00 /* lcd_vsync.lcd_vsync, OUTPUT | MODE0 */
0xe4 0x00 /* lcd_hsync.lcd_hsync, OUTPUT | MODE0 */
0xe8 0x00 /* lcd_pclk.lcd_pclk, OUTPUT | MODE0 */
0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OUTPUT | MODE0 */
>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
clock-frequency = <400000>;
tps: tps@2d {
reg = <0x2d>;
};
};
&usb {
status = "okay";
control@44e10000 {
status = "okay";
};
usb-phy@47401300 {
status = "okay";
};
usb-phy@47401b00 {
status = "okay";
};
usb@47401000 {
status = "okay";
};
usb@47401800 {
status = "okay";
dr_mode = "host";
};
dma-controller@07402000 {
status = "okay";
};
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
status = "okay";
clock-frequency = <100000>;
lis331dlh: lis331dlh@18 {
compatible = "st,lis331dlh", "st,lis3lv02d";
reg = <0x18>;
Vdd-supply = <&lis3_reg>;
Vdd_IO-supply = <&lis3_reg>;
st,click-single-x;
st,click-single-y;
st,click-single-z;
st,click-thresh-x = <10>;
st,click-thresh-y = <10>;
st,click-thresh-z = <10>;
st,irq1-click;
st,irq2-click;
st,wakeup-x-lo;
st,wakeup-x-hi;
st,wakeup-y-lo;
st,wakeup-y-hi;
st,wakeup-z-lo;
st,wakeup-z-hi;
st,min-limit-x = <120>;
st,min-limit-y = <120>;
st,min-limit-z = <140>;
st,max-limit-x = <550>;
st,max-limit-y = <550>;
st,max-limit-z = <750>;
};
tsl2550: tsl2550@39 {
compatible = "taos,tsl2550";
reg = <0x39>;
};
tmp275: tmp275@48 {
compatible = "ti,tmp275";
reg = <0x48>;
};
};
&lcdc {
status = "okay";
};
&elm {
status = "okay";
};
&epwmss0 {
status = "okay";
ecap0: ecap@48300100 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ecap0_pins>;
};
};
&gpmc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nandflash_pins_s0>;
ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
nand@0,0 {
reg = <0 0 0>; /* CS0, offset 0 */
nand-bus-width = <8>;
ti,nand-ecc-opt = "bch8";
gpmc,device-nand = "true";
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <34>;
gpmc,adv-wr-off-ns = <44>;
gpmc,we-on-ns = <0>;
gpmc,we-off-ns = <40>;
gpmc,oe-on-ns = <0>;
gpmc,oe-off-ns = <54>;
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
gpmc,wait-on-read = "true";
gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
#address-cells = <1>;
#size-cells = <1>;
elm_id = <&elm>;
/* MTD partition table */
partition@0 {
label = "SPL1";
reg = <0x00000000 0x000020000>;
};
partition@1 {
label = "SPL2";
reg = <0x00020000 0x00020000>;
};
partition@2 {
label = "SPL3";
reg = <0x00040000 0x00020000>;
};
partition@3 {
label = "SPL4";
reg = <0x00060000 0x00020000>;
};
partition@4 {
label = "U-boot";
reg = <0x00080000 0x001e0000>;
};
partition@5 {
label = "environment";
reg = <0x00260000 0x00020000>;
};
partition@6 {
label = "Kernel";
reg = <0x00280000 0x00500000>;
};
partition@7 {
label = "File-System";
reg = <0x00780000 0x0F880000>;
};
};
};
#include "tps65910.dtsi"
@ -477,6 +546,8 @@
};
vmmc_reg: regulator@12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
@ -517,3 +588,17 @@
ti,adc-channels = <4 5 6 7>;
};
};
&mmc1 {
status = "okay";
vmmc-supply = <&vmmc_reg>;
bus-width = <4>;
};
&sham {
status = "okay";
};
&aes {
status = "okay";
};

422
arch/arm/boot/dts/am335x-evmsk.dts
View File

@ -31,210 +31,6 @@
reg = <0x80000000 0x10000000>; /* 256 MB */
};
am33xx_pinmux: pinmux@44e10800 {
pinctrl-names = "default";
pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>;
user_leds_s0: user_leds_s0 {
pinctrl-single,pins = <
0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
0x14 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
0x18 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */
0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */
>;
};
gpio_keys_s0: gpio_keys_s0 {
pinctrl-single,pins = <
0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */
0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */
0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */
0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */
>;
};
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
clkout2_pin: pinmux_clkout2_pin {
pinctrl-single,pins = <
0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
>;
};
ecap2_pins: backlight_pins {
pinctrl-single,pins = <
0x19c 0x4 /* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */
>;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
/* Slave 2 */
0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */
0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 1 reset value */
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
/* Slave 2 reset value*/
0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
/* MDIO reset value */
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
};
ocp {
uart0: serial@44e09000 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
i2c0: i2c@44e0b000 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
clock-frequency = <400000>;
tps: tps@2d {
reg = <0x2d>;
};
lis331dlh: lis331dlh@18 {
compatible = "st,lis331dlh", "st,lis3lv02d";
reg = <0x18>;
Vdd-supply = <&lis3_reg>;
Vdd_IO-supply = <&lis3_reg>;
st,click-single-x;
st,click-single-y;
st,click-single-z;
st,click-thresh-x = <10>;
st,click-thresh-y = <10>;
st,click-thresh-z = <10>;
st,irq1-click;
st,irq2-click;
st,wakeup-x-lo;
st,wakeup-x-hi;
st,wakeup-y-lo;
st,wakeup-y-hi;
st,wakeup-z-lo;
st,wakeup-z-hi;
st,min-limit-x = <120>;
st,min-limit-y = <120>;
st,min-limit-z = <140>;
st,max-limit-x = <550>;
st,max-limit-y = <550>;
st,max-limit-z = <750>;
};
};
musb: usb@47400000 {
status = "okay";
control@44e10000 {
status = "okay";
};
usb-phy@47401300 {
status = "okay";
};
usb@47401000 {
status = "okay";
};
};
epwmss2: epwmss@48304000 {
status = "okay";
ecap2: ecap@48304100 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ecap2_pins>;
};
};
};
vbat: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "vbat";
@ -321,6 +117,208 @@
};
};
&am33xx_pinmux {
pinctrl-names = "default";
pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>;
user_leds_s0: user_leds_s0 {
pinctrl-single,pins = <
0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
0x14 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
0x18 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */
0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */
>;
};
gpio_keys_s0: gpio_keys_s0 {
pinctrl-single,pins = <
0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */
0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */
0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */
0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */
>;
};
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
clkout2_pin: pinmux_clkout2_pin {
pinctrl-single,pins = <
0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
>;
};
ecap2_pins: backlight_pins {
pinctrl-single,pins = <
0x19c 0x4 /* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */
>;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
/* Slave 2 */
0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */
0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 1 reset value */
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
/* Slave 2 reset value*/
0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
/* MDIO reset value */
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
clock-frequency = <400000>;
tps: tps@2d {
reg = <0x2d>;
};
lis331dlh: lis331dlh@18 {
compatible = "st,lis331dlh", "st,lis3lv02d";
reg = <0x18>;
Vdd-supply = <&lis3_reg>;
Vdd_IO-supply = <&lis3_reg>;
st,click-single-x;
st,click-single-y;
st,click-single-z;
st,click-thresh-x = <10>;
st,click-thresh-y = <10>;
st,click-thresh-z = <10>;
st,irq1-click;
st,irq2-click;
st,wakeup-x-lo;
st,wakeup-x-hi;
st,wakeup-y-lo;
st,wakeup-y-hi;
st,wakeup-z-lo;
st,wakeup-z-hi;
st,min-limit-x = <120>;
st,min-limit-y = <120>;
st,min-limit-z = <140>;
st,max-limit-x = <550>;
st,max-limit-y = <550>;
st,max-limit-z = <750>;
};
};
&usb {
status = "okay";
control@44e10000 {
status = "okay";
};
usb-phy@47401300 {
status = "okay";
};
usb@47401000 {
status = "okay";
};
};
&epwmss2 {
status = "okay";
ecap2: ecap@48304100 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ecap2_pins>;
};
};
#include "tps65910.dtsi"
&tps {
@ -393,6 +391,8 @@
};
vmmc_reg: regulator@12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
@ -419,3 +419,17 @@
phy_id = <&davinci_mdio>, <1>;
phy-mode = "rgmii-txid";
};
&mmc1 {
status = "okay";
vmmc-supply = <&vmmc_reg>;
bus-width = <4>;
};
&sham {
status = "okay";
};
&aes {
status = "okay";
};

265
arch/arm/boot/dts/am335x-igep0033.dtsi Normal file
View File

@ -0,0 +1,265 @@
/*
* am335x-igep0033.dtsi - Device Tree file for IGEP COM AQUILA AM335x
*
* Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "am33xx.dtsi"
/ {
cpus {
cpu@0 {
cpu0-supply = <&vdd1_reg>;
};
};
memory {
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256 MB */
};
leds {
pinctrl-names = "default";
pinctrl-0 = <&leds_pins>;
compatible = "gpio-leds";
led@0 {
label = "com:green:user";
gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
};
vbat: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "vbat";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
};
};
&am33xx_pinmux {
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
nandflash_pins: pinmux_nandflash_pins {
pinctrl-single,pins = <
0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
leds_pins: pinmux_leds_pins {
pinctrl-single,pins = <
0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
>;
};
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>;
};
&elm {
status = "okay";
};
&gpmc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nandflash_pins>;
ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
nand@0,0 {
reg = <0 0 0>; /* CS0, offset 0 */
nand-bus-width = <8>;
ti,nand-ecc-opt = "bch8";
gpmc,device-nand = "true";
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <34>;
gpmc,adv-wr-off-ns = <44>;
gpmc,we-on-ns = <0>;
gpmc,we-off-ns = <40>;
gpmc,oe-on-ns = <0>;
gpmc,oe-off-ns = <54>;
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
gpmc,wait-on-read = "true";
gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
#address-cells = <1>;
#size-cells = <1>;
elm_id = <&elm>;
/* MTD partition table */
partition@0 {
label = "SPL";
reg = <0x00000000 0x000080000>;
};
partition@1 {
label = "U-boot";
reg = <0x00080000 0x001e0000>;
};
partition@2 {
label = "U-Boot Env";
reg = <0x00260000 0x00020000>;
};
partition@3 {
label = "Kernel";
reg = <0x00280000 0x00500000>;
};
partition@4 {
label = "File System";
reg = <0x00780000 0x007880000>;
};
};
};
&i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
clock-frequency = <400000>;
tps: tps@2d {
reg = <0x2d>;
};
};
&uart0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
};
#include "tps65910.dtsi"
&tps {
vcc1-supply = <&vbat>;
vcc2-supply = <&vbat>;
vcc3-supply = <&vbat>;
vcc4-supply = <&vbat>;
vcc5-supply = <&vbat>;
vcc6-supply = <&vbat>;
vcc7-supply = <&vbat>;
vccio-supply = <&vbat>;
regulators {
vrtc_reg: regulator@0 {
regulator-always-on;
};
vio_reg: regulator@1 {
regulator-always-on;
};
vdd1_reg: regulator@2 {
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
regulator-name = "vdd_mpu";
regulator-min-microvolt = <912500>;
regulator-max-microvolt = <1312500>;
regulator-boot-on;
regulator-always-on;
};
vdd2_reg: regulator@3 {
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
regulator-name = "vdd_core";
regulator-min-microvolt = <912500>;
regulator-max-microvolt = <1150000>;
regulator-boot-on;
regulator-always-on;
};
vdd3_reg: regulator@4 {
regulator-always-on;
};
vdig1_reg: regulator@5 {
regulator-always-on;
};
vdig2_reg: regulator@6 {
regulator-always-on;
};
vpll_reg: regulator@7 {
regulator-always-on;
};
vdac_reg: regulator@8 {
regulator-always-on;
};
vaux1_reg: regulator@9 {
regulator-always-on;
};
vaux2_reg: regulator@10 {
regulator-always-on;
};
vaux33_reg: regulator@11 {
regulator-always-on;
};
vmmc_reg: regulator@12 {
regulator-always-on;
};
};
};

103
arch/arm/boot/dts/am33xx.dtsi
View File

@ -30,6 +30,8 @@
usb1 = &usb1;
phy0 = &usb0_phy;
phy1 = &usb1_phy;
ethernet0 = &cpsw_emac0;
ethernet1 = &cpsw_emac1;
};
cpus {
@ -57,6 +59,11 @@
};
};
pmu {
compatible = "arm,cortex-a8-pmu";
interrupts = <3>;
};
/*
* The soc node represents the soc top level view. It is uses for IPs
* that are not memory mapped in the MPU view or for the MPU itself.
@ -100,13 +107,25 @@
reg = <0x48200000 0x1000>;
};
edma: edma@49000000 {
compatible = "ti,edma3";
ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
reg = <0x49000000 0x10000>,
<0x44e10f90 0x10>;
interrupts = <12 13 14>;
#dma-cells = <1>;
dma-channels = <64>;
ti,edma-regions = <4>;
ti,edma-slots = <256>;
};
gpio0: gpio@44e07000 {
compatible = "ti,omap4-gpio";
ti,hwmods = "gpio1";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
#interrupt-cells = <2>;
reg = <0x44e07000 0x1000>;
interrupts = <96>;
};
@ -117,7 +136,7 @@
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
#interrupt-cells = <2>;
reg = <0x4804c000 0x1000>;
interrupts = <98>;
};
@ -128,7 +147,7 @@
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
#interrupt-cells = <2>;
reg = <0x481ac000 0x1000>;
interrupts = <32>;
};
@ -139,7 +158,7 @@
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
#interrupt-cells = <2>;
reg = <0x481ae000 0x1000>;
interrupts = <62>;
};
@ -228,6 +247,44 @@
status = "disabled";
};
mmc1: mmc@48060000 {
compatible = "ti,omap4-hsmmc";
ti,hwmods = "mmc1";
ti,dual-volt;
ti,needs-special-reset;
ti,needs-special-hs-handling;
dmas = <&edma 24
&edma 25>;
dma-names = "tx", "rx";
interrupts = <64>;
interrupt-parent = <&intc>;
reg = <0x48060000 0x1000>;
status = "disabled";
};
mmc2: mmc@481d8000 {
compatible = "ti,omap4-hsmmc";
ti,hwmods = "mmc2";
ti,needs-special-reset;
dmas = <&edma 2
&edma 3>;
dma-names = "tx", "rx";
interrupts = <28>;
interrupt-parent = <&intc>;
reg = <0x481d8000 0x1000>;
status = "disabled";
};
mmc3: mmc@47810000 {
compatible = "ti,omap4-hsmmc";
ti,hwmods = "mmc3";
ti,needs-special-reset;
interrupts = <29>;
interrupt-parent = <&intc>;
reg = <0x47810000 0x1000>;
status = "disabled";
};
wdt2: wdt@44e35000 {
compatible = "ti,omap3-wdt";
ti,hwmods = "wd_timer2";
@ -323,6 +380,11 @@
interrupts = <65>;
ti,spi-num-cs = <2>;
ti,hwmods = "spi0";
dmas = <&edma 16
&edma 17
&edma 18
&edma 19>;
dma-names = "tx0", "rx0", "tx1", "rx1";
status = "disabled";
};
@ -334,6 +396,11 @@
interrupts = <125>;
ti,spi-num-cs = <2>;
ti,hwmods = "spi1";
dmas = <&edma 42
&edma 43
&edma 44
&edma 45>;
dma-names = "tx0", "rx0", "tx1", "rx1";
status = "disabled";
};
@ -617,6 +684,15 @@
status = "disabled";
};
lcdc: lcdc@4830e000 {
compatible = "ti,am33xx-tilcdc";
reg = <0x4830e000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <36>;
ti,hwmods = "lcdc";
status = "disabled";
};
tscadc: tscadc@44e0d000 {
compatible = "ti,am3359-tscadc";
reg = <0x44e0d000 0x1000>;
@ -645,5 +721,24 @@
#size-cells = <1>;
status = "disabled";
};
sham: sham@53100000 {
compatible = "ti,omap4-sham";
ti,hwmods = "sham";
reg = <0x53100000 0x200>;
interrupts = <109>;
dmas = <&edma 36>;
dma-names = "rx";
};
aes: aes@53500000 {
compatible = "ti,omap4-aes";
ti,hwmods = "aes";
reg = <0x53500000 0xa0>;
interrupts = <103>;
dmas = <&edma 6>,
<&edma 5>;
dma-names = "tx", "rx";
};
};
};

361
arch/arm/boot/dts/am4372.dtsi
View File

@ -22,8 +22,12 @@
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <0>;
};
};
@ -45,6 +49,47 @@
compatible = "ti,am4372-uart","ti,omap2-uart";
reg = <0x44e09000 0x2000>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart1";
};
uart1: serial@48022000 {
compatible = "ti,am4372-uart","ti,omap2-uart";
reg = <0x48022000 0x2000>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart2";
status = "disabled";
};
uart2: serial@48024000 {
compatible = "ti,am4372-uart","ti,omap2-uart";
reg = <0x48024000 0x2000>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart3";
status = "disabled";
};
uart3: serial@481a6000 {
compatible = "ti,am4372-uart","ti,omap2-uart";
reg = <0x481a6000 0x2000>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart4";
status = "disabled";
};
uart4: serial@481a8000 {
compatible = "ti,am4372-uart","ti,omap2-uart";
reg = <0x481a8000 0x2000>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart5";
status = "disabled";
};
uart5: serial@481aa000 {
compatible = "ti,am4372-uart","ti,omap2-uart";
reg = <0x481aa000 0x2000>;
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart6";
status = "disabled";
};
timer1: timer@44e31000 {
@ -52,17 +97,333 @@
reg = <0x44e31000 0x400>;
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
ti,timer-alwon;
ti,hwmods = "timer1";
};
timer2: timer@48040000 {
compatible = "ti,am4372-timer","ti,am335x-timer";
reg = <0x48040000 0x400>;
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer2";
};
timer3: timer@48042000 {
compatible = "ti,am4372-timer","ti,am335x-timer";
reg = <0x48042000 0x400>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer3";
status = "disabled";
};
timer4: timer@48044000 {
compatible = "ti,am4372-timer","ti,am335x-timer";
reg = <0x48044000 0x400>;
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
ti,timer-pwm;
ti,hwmods = "timer4";
status = "disabled";
};
timer5: timer@48046000 {
compatible = "ti,am4372-timer","ti,am335x-timer";
reg = <0x48046000 0x400>;
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
ti,timer-pwm;
ti,hwmods = "timer5";
status = "disabled";
};
timer6: timer@48048000 {
compatible = "ti,am4372-timer","ti,am335x-timer";
reg = <0x48048000 0x400>;
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
ti,timer-pwm;
ti,hwmods = "timer6";
status = "disabled";
};
timer7: timer@4804a000 {
compatible = "ti,am4372-timer","ti,am335x-timer";
reg = <0x4804a000 0x400>;
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
ti,timer-pwm;
ti,hwmods = "timer7";
status = "disabled";
};
timer8: timer@481c1000 {
compatible = "ti,am4372-timer","ti,am335x-timer";
reg = <0x481c1000 0x400>;
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer8";
status = "disabled";
};
timer9: timer@4833d000 {
compatible = "ti,am4372-timer","ti,am335x-timer";
reg = <0x4833d000 0x400>;
interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer9";
status = "disabled";
};
timer10: timer@4833f000 {
compatible = "ti,am4372-timer","ti,am335x-timer";
reg = <0x4833f000 0x400>;
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer10";
status = "disabled";
};
timer11: timer@48341000 {
compatible = "ti,am4372-timer","ti,am335x-timer";
reg = <0x48341000 0x400>;
interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer11";
status = "disabled";
};
counter32k: counter@44e86000 {
compatible = "ti,am4372-counter32k","ti,omap-counter32k";
reg = <0x44e86000 0x40>;
ti,hwmods = "counter_32k";
};
rtc@44e3e000 {
compatible = "ti,am4372-rtc","ti,da830-rtc";
reg = <0x44e3e000 0x1000>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "rtc";
status = "disabled";
};
wdt@44e35000 {
compatible = "ti,am4372-wdt","ti,omap3-wdt";
reg = <0x44e35000 0x1000>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "wd_timer2";
status = "disabled";
};
gpio0: gpio@44e07000 {
compatible = "ti,am4372-gpio","ti,omap4-gpio";
reg = <0x44e07000 0x1000>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
ti,hwmods = "gpio1";
status = "disabled";
};
gpio1: gpio@4804c000 {
compatible = "ti,am4372-gpio","ti,omap4-gpio";
reg = <0x4804c000 0x1000>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
ti,hwmods = "gpio2";
status = "disabled";
};
gpio2: gpio@481ac000 {
compatible = "ti,am4372-gpio","ti,omap4-gpio";
reg = <0x481ac000 0x1000>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
ti,hwmods = "gpio3";
status = "disabled";
};
gpio3: gpio@481ae000 {
compatible = "ti,am4372-gpio","ti,omap4-gpio";
reg = <0x481ae000 0x1000>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
ti,hwmods = "gpio4";
status = "disabled";
};
gpio4: gpio@48320000 {
compatible = "ti,am4372-gpio","ti,omap4-gpio";
reg = <0x48320000 0x1000>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
ti,hwmods = "gpio5";
status = "disabled";
};
gpio5: gpio@48322000 {
compatible = "ti,am4372-gpio","ti,omap4-gpio";
reg = <0x48322000 0x1000>;
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
ti,hwmods = "gpio6";
status = "disabled";
};
i2c0: i2c@44e0b000 {
compatible = "ti,am4372-i2c","ti,omap4-i2c";
reg = <0x44e0b000 0x1000>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "i2c1";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c1: i2c@4802a000 {
compatible = "ti,am4372-i2c","ti,omap4-i2c";
reg = <0x4802a000 0x1000>;
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "i2c2";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c2: i2c@4819c000 {
compatible = "ti,am4372-i2c","ti,omap4-i2c";
reg = <0x4819c000 0x1000>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "i2c3";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
spi0: spi@48030000 {
compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
reg = <0x48030000 0x400>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "spi0";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
spi1: spi@481a0000 {
compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
reg = <0x481a0000 0x400>;
interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "spi1";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
spi2: spi@481a2000 {
compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
reg = <0x481a2000 0x400>;
interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "spi2";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
spi3: spi@481a4000 {
compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
reg = <0x481a4000 0x400>;
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "spi3";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
spi4: spi@48345000 {
compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
reg = <0x48345000 0x400>;
interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "spi4";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
mac: ethernet@4a100000 {
compatible = "ti,am4372-cpsw","ti,cpsw";
reg = <0x4a100000 0x800
0x4a101200 0x100>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "cpgmac0";
status = "disabled";
};
epwmss0: epwmss@48300000 {
compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
reg = <0x48300000 0x10>;
ti,hwmods = "epwmss0";
status = "disabled";
};
epwmss1: epwmss@48302000 {
compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
reg = <0x48302000 0x10>;
ti,hwmods = "epwmss1";
status = "disabled";
};
epwmss2: epwmss@48304000 {
compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
reg = <0x48304000 0x10>;
ti,hwmods = "epwmss2";
status = "disabled";
};
epwmss3: epwmss@48306000 {
compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
reg = <0x48306000 0x10>;
ti,hwmods = "epwmss3";
status = "disabled";
};
epwmss4: epwmss@48308000 {
compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
reg = <0x48308000 0x10>;
ti,hwmods = "epwmss4";
status = "disabled";
};
epwmss5: epwmss@4830a000 {
compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
reg = <0x4830a000 0x10>;
ti,hwmods = "epwmss5";
status = "disabled";
};
aes: aes@53501000 {
compatible = "ti,omap4-aes";
ti,hwmods = "aes";
reg = <0x53501000 0xa0>;
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
};
des: des@53701000 {
compatible = "ti,omap4-des";
ti,hwmods = "des";
reg = <0x53701000 0xa0>;
interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
};
};
};

271
arch/arm/boot/dts/dra7-evm.dts Normal file
View File

@ -0,0 +1,271 @@
/*
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "dra7.dtsi"
/ {
model = "TI DRA7";
compatible = "ti,dra7-evm", "ti,dra752", "ti,dra7";
memory {
device_type = "memory";
reg = <0x80000000 0x60000000>; /* 1536 MB */
};
mmc2_3v3: fixedregulator-mmc2 {
compatible = "regulator-fixed";
regulator-name = "mmc2_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
&dra7_pmx_core {
i2c1_pins: pinmux_i2c1_pins {
pinctrl-single,pins = <
0x400 (PIN_INPUT | MUX_MODE0) /* i2c1_sda */
0x404 (PIN_INPUT | MUX_MODE0) /* i2c1_scl */
>;
};
i2c2_pins: pinmux_i2c2_pins {
pinctrl-single,pins = <
0x408 (PIN_INPUT | MUX_MODE0) /* i2c2_sda */
0x40c (PIN_INPUT | MUX_MODE0) /* i2c2_scl */
>;
};
i2c3_pins: pinmux_i2c3_pins {
pinctrl-single,pins = <
0x410 (PIN_INPUT | MUX_MODE0) /* i2c3_sda */
0x414 (PIN_INPUT | MUX_MODE0) /* i2c3_scl */
>;
};
mcspi1_pins: pinmux_mcspi1_pins {
pinctrl-single,pins = <
0x3a4 (PIN_INPUT | MUX_MODE0) /* spi2_clk */
0x3a8 (PIN_INPUT | MUX_MODE0) /* spi2_d1 */
0x3ac (PIN_INPUT | MUX_MODE0) /* spi2_d0 */
0x3b0 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs0 */
0x3b4 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs1 */
0x3b8 (PIN_INPUT_SLEW | MUX_MODE6) /* spi2_cs2 */
0x3bc (PIN_INPUT_SLEW | MUX_MODE6) /* spi2_cs3 */
>;
};
mcspi2_pins: pinmux_mcspi2_pins {
pinctrl-single,pins = <
0x3c0 (PIN_INPUT | MUX_MODE0) /* spi2_sclk */
0x3c4 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */
0x3c8 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */
0x3cc (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs0 */
>;
};
uart1_pins: pinmux_uart1_pins {
pinctrl-single,pins = <
0x3e0 (PIN_INPUT_SLEW | MUX_MODE0) /* uart1_rxd */
0x3e4 (PIN_INPUT_SLEW | MUX_MODE0) /* uart1_txd */
0x3e8 (PIN_INPUT | MUX_MODE3) /* uart1_ctsn */
0x3ec (PIN_INPUT | MUX_MODE3) /* uart1_rtsn */
>;
};
uart2_pins: pinmux_uart2_pins {
pinctrl-single,pins = <
0x3f0 (PIN_INPUT | MUX_MODE0) /* uart2_rxd */
0x3f4 (PIN_INPUT | MUX_MODE0) /* uart2_txd */
0x3f8 (PIN_INPUT | MUX_MODE0) /* uart2_ctsn */
0x3fc (PIN_INPUT | MUX_MODE0) /* uart2_rtsn */
>;
};
uart3_pins: pinmux_uart3_pins {
pinctrl-single,pins = <
0x248 (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd */
0x24c (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd */
>;
};
};
&i2c1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
clock-frequency = <400000>;
tps659038: tps659038@58 {
compatible = "ti,tps659038";
reg = <0x58>;
tps659038_pmic {
compatible = "ti,tps659038-pmic";
regulators {
smps123_reg: smps123 {
/* VDD_MPU */
regulator-name = "smps123";
regulator-min-microvolt = < 850000>;
regulator-max-microvolt = <1250000>;
regulator-always-on;
regulator-boot-on;
};
smps45_reg: smps45 {
/* VDD_DSPEVE */
regulator-name = "smps45";
regulator-min-microvolt = < 850000>;
regulator-max-microvolt = <1150000>;
regulator-boot-on;
};
smps6_reg: smps6 {
/* VDD_GPU - over VDD_SMPS6 */
regulator-name = "smps6";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <12500000>;
regulator-boot-on;
};
smps7_reg: smps7 {
/* CORE_VDD */
regulator-name = "smps7";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1030000>;
regulator-always-on;
regulator-boot-on;
};
smps8_reg: smps8 {
/* VDD_IVAHD */
regulator-name = "smps8";
regulator-min-microvolt = < 850000>;
regulator-max-microvolt = <1250000>;
regulator-boot-on;
};
smps9_reg: smps9 {
/* VDDS1V8 */
regulator-name = "smps9";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
ldo1_reg: ldo1 {
/* LDO1_OUT --> SDIO */
regulator-name = "ldo1";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
ldo2_reg: ldo2 {
/* VDD_RTCIO */
/* LDO2 -> VDDSHV5, LDO2 also goes to CAN_PHY_3V3 */
regulator-name = "ldo2";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
ldo3_reg: ldo3 {
/* VDDA_1V8_PHY */
regulator-name = "ldo3";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
};
ldo9_reg: ldo9 {
/* VDD_RTC */
regulator-name = "ldo9";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
regulator-boot-on;
};
ldoln_reg: ldoln {
/* VDDA_1V8_PLL */
regulator-name = "ldoln";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
ldousb_reg: ldousb {
/* VDDA_3V_USB: VDDA_USBHS33 */
regulator-name = "ldousb";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
};
};
};
};
&i2c2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins>;
clock-frequency = <400000>;
};
&i2c3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c3_pins>;
clock-frequency = <3400000>;
};
&mcspi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcspi1_pins>;
};
&mcspi2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcspi2_pins>;
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
};
&uart2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
};
&mmc1 {
status = "okay";
vmmc-supply = <&ldo1_reg>;
bus-width = <4>;
};
&mmc2 {
status = "okay";
vmmc-supply = <&mmc2_3v3>;
bus-width = <8>;
};

575
arch/arm/boot/dts/dra7.dtsi Normal file
View File

@ -0,0 +1,575 @@
/*
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
* Based on "omap4.dtsi"
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/dra.h>
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "ti,dra7xx";
interrupt-parent = <&gic>;
aliases {
serial0 = &uart1;
serial1 = &uart2;
serial2 = &uart3;
serial3 = &uart4;
serial4 = &uart5;
serial5 = &uart6;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <1>;
};
};
timer {
compatible = "arm,armv7-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
gic: interrupt-controller@48211000 {
compatible = "arm,cortex-a15-gic";
interrupt-controller;
#interrupt-cells = <3>;
reg = <0x48211000 0x1000>,
<0x48212000 0x1000>,
<0x48214000 0x2000>,
<0x48216000 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
};
/*
* The soc node represents the soc top level view. It is uses for IPs
* that are not memory mapped in the MPU view or for the MPU itself.
*/
soc {
compatible = "ti,omap-infra";
mpu {
compatible = "ti,omap5-mpu";
ti,hwmods = "mpu";
};
};
/*
* XXX: Use a flat representation of the SOC interconnect.
* The real OMAP interconnect network is quite complex.
* Since that will not bring real advantage to represent that in DT for
* the moment, just use a fake OCP bus entry to represent the whole bus
* hierarchy.
*/
ocp {
compatible = "ti,omap4-l3-noc", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
ti,hwmods = "l3_main_1", "l3_main_2";
reg = <0x44000000 0x2000>,
<0x44800000 0x3000>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
counter32k: counter@4ae04000 {
compatible = "ti,omap-counter32k";
reg = <0x4ae04000 0x40>;
ti,hwmods = "counter_32k";
};
dra7_pmx_core: pinmux@4a003400 {
compatible = "pinctrl-single";
reg = <0x4a003400 0x0464>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0x3fffffff>;
};
sdma: dma-controller@4a056000 {
compatible = "ti,omap4430-sdma";
reg = <0x4a056000 0x1000>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
#dma-channels = <32>;
#dma-requests = <127>;
};
gpio1: gpio@4ae10000 {
compatible = "ti,omap4-gpio";
reg = <0x4ae10000 0x200>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "gpio1";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio2: gpio@48055000 {
compatible = "ti,omap4-gpio";
reg = <0x48055000 0x200>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "gpio2";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio3: gpio@48057000 {
compatible = "ti,omap4-gpio";
reg = <0x48057000 0x200>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "gpio3";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio4: gpio@48059000 {
compatible = "ti,omap4-gpio";
reg = <0x48059000 0x200>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "gpio4";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio5: gpio@4805b000 {
compatible = "ti,omap4-gpio";
reg = <0x4805b000 0x200>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "gpio5";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio6: gpio@4805d000 {
compatible = "ti,omap4-gpio";
reg = <0x4805d000 0x200>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "gpio6";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio7: gpio@48051000 {
compatible = "ti,omap4-gpio";
reg = <0x48051000 0x200>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "gpio7";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
gpio8: gpio@48053000 {
compatible = "ti,omap4-gpio";
reg = <0x48053000 0x200>;
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "gpio8";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
};
uart1: serial@4806a000 {
compatible = "ti,omap4-uart";
reg = <0x4806a000 0x100>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart1";
clock-frequency = <48000000>;
status = "disabled";
};
uart2: serial@4806c000 {
compatible = "ti,omap4-uart";
reg = <0x4806c000 0x100>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart2";
clock-frequency = <48000000>;
status = "disabled";
};
uart3: serial@48020000 {
compatible = "ti,omap4-uart";
reg = <0x48020000 0x100>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart3";
clock-frequency = <48000000>;
status = "disabled";
};
uart4: serial@4806e000 {
compatible = "ti,omap4-uart";
reg = <0x4806e000 0x100>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart4";
clock-frequency = <48000000>;
status = "disabled";
};
uart5: serial@48066000 {
compatible = "ti,omap4-uart";
reg = <0x48066000 0x100>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart5";
clock-frequency = <48000000>;
status = "disabled";
};
uart6: serial@48068000 {
compatible = "ti,omap4-uart";
reg = <0x48068000 0x100>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "uart6";
clock-frequency = <48000000>;
status = "disabled";
};
uart7: serial@48420000 {
compatible = "ti,omap4-uart";
reg = <0x48420000 0x100>;
ti,hwmods = "uart7";
clock-frequency = <48000000>;
status = "disabled";
};
uart8: serial@48422000 {
compatible = "ti,omap4-uart";
reg = <0x48422000 0x100>;
ti,hwmods = "uart8";
clock-frequency = <48000000>;
status = "disabled";
};
uart9: serial@48424000 {
compatible = "ti,omap4-uart";
reg = <0x48424000 0x100>;
ti,hwmods = "uart9";
clock-frequency = <48000000>;
status = "disabled";
};
uart10: serial@4ae2b000 {
compatible = "ti,omap4-uart";
reg = <0x4ae2b000 0x100>;
ti,hwmods = "uart10";
clock-frequency = <48000000>;
status = "disabled";
};
timer1: timer@4ae18000 {
compatible = "ti,omap5430-timer";
reg = <0x4ae18000 0x80>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer1";
ti,timer-alwon;
};
timer2: timer@48032000 {
compatible = "ti,omap5430-timer";
reg = <0x48032000 0x80>;
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer2";
};
timer3: timer@48034000 {
compatible = "ti,omap5430-timer";
reg = <0x48034000 0x80>;
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer3";
};
timer4: timer@48036000 {
compatible = "ti,omap5430-timer";
reg = <0x48036000 0x80>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer4";
};
timer5: timer@48820000 {
compatible = "ti,omap5430-timer";
reg = <0x48820000 0x80>;
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer5";
ti,timer-dsp;
};
timer6: timer@48822000 {
compatible = "ti,omap5430-timer";
reg = <0x48822000 0x80>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer6";
ti,timer-dsp;
ti,timer-pwm;
};
timer7: timer@48824000 {
compatible = "ti,omap5430-timer";
reg = <0x48824000 0x80>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer7";
ti,timer-dsp;
};
timer8: timer@48826000 {
compatible = "ti,omap5430-timer";
reg = <0x48826000 0x80>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer8";
ti,timer-dsp;
ti,timer-pwm;
};
timer9: timer@4803e000 {
compatible = "ti,omap5430-timer";
reg = <0x4803e000 0x80>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer9";
};
timer10: timer@48086000 {
compatible = "ti,omap5430-timer";
reg = <0x48086000 0x80>;
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer10";
};
timer11: timer@48088000 {
compatible = "ti,omap5430-timer";
reg = <0x48088000 0x80>;
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer11";
ti,timer-pwm;
};
timer13: timer@48828000 {
compatible = "ti,omap5430-timer";
reg = <0x48828000 0x80>;
ti,hwmods = "timer13";
status = "disabled";
};
timer14: timer@4882a000 {
compatible = "ti,omap5430-timer";
reg = <0x4882a000 0x80>;
ti,hwmods = "timer14";
status = "disabled";
};
timer15: timer@4882c000 {
compatible = "ti,omap5430-timer";
reg = <0x4882c000 0x80>;
ti,hwmods = "timer15";
status = "disabled";
};
timer16: timer@4882e000 {
compatible = "ti,omap5430-timer";
reg = <0x4882e000 0x80>;
ti,hwmods = "timer16";
status = "disabled";
};
wdt2: wdt@4ae14000 {
compatible = "ti,omap4-wdt";
reg = <0x4ae14000 0x80>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "wd_timer2";
};
i2c1: i2c@48070000 {
compatible = "ti,omap4-i2c";
reg = <0x48070000 0x100>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c1";
status = "disabled";
};
i2c2: i2c@48072000 {
compatible = "ti,omap4-i2c";
reg = <0x48072000 0x100>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c2";
status = "disabled";
};
i2c3: i2c@48060000 {
compatible = "ti,omap4-i2c";
reg = <0x48060000 0x100>;
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c3";
status = "disabled";
};
i2c4: i2c@4807a000 {
compatible = "ti,omap4-i2c";
reg = <0x4807a000 0x100>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c4";
status = "disabled";
};
i2c5: i2c@4807c000 {
compatible = "ti,omap4-i2c";
reg = <0x4807c000 0x100>;
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c5";
status = "disabled";
};
mmc1: mmc@4809c000 {
compatible = "ti,omap4-hsmmc";
reg = <0x4809c000 0x400>;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc1";
ti,dual-volt;
ti,needs-special-reset;
dmas = <&sdma 61>, <&sdma 62>;
dma-names = "tx", "rx";
status = "disabled";
};
mmc2: mmc@480b4000 {
compatible = "ti,omap4-hsmmc";
reg = <0x480b4000 0x400>;
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc2";
ti,needs-special-reset;
dmas = <&sdma 47>, <&sdma 48>;
dma-names = "tx", "rx";
status = "disabled";
};
mmc3: mmc@480ad000 {
compatible = "ti,omap4-hsmmc";
reg = <0x480ad000 0x400>;
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc3";
ti,needs-special-reset;
dmas = <&sdma 77>, <&sdma 78>;
dma-names = "tx", "rx";
status = "disabled";
};
mmc4: mmc@480d1000 {
compatible = "ti,omap4-hsmmc";
reg = <0x480d1000 0x400>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc4";
ti,needs-special-reset;
dmas = <&sdma 57>, <&sdma 58>;
dma-names = "tx", "rx";
status = "disabled";
};
mcspi1: spi@48098000 {
compatible = "ti,omap4-mcspi";
reg = <0x48098000 0x200>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "mcspi1";
ti,spi-num-cs = <4>;
dmas = <&sdma 35>,
<&sdma 36>,
<&sdma 37>,
<&sdma 38>,
<&sdma 39>,
<&sdma 40>,
<&sdma 41>,
<&sdma 42>;
dma-names = "tx0", "rx0", "tx1", "rx1",
"tx2", "rx2", "tx3", "rx3";
status = "disabled";
};
mcspi2: spi@4809a000 {
compatible = "ti,omap4-mcspi";
reg = <0x4809a000 0x200>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "mcspi2";
ti,spi-num-cs = <2>;
dmas = <&sdma 43>,
<&sdma 44>,
<&sdma 45>,
<&sdma 46>;
dma-names = "tx0", "rx0", "tx1", "rx1";
status = "disabled";
};
mcspi3: spi@480b8000 {
compatible = "ti,omap4-mcspi";
reg = <0x480b8000 0x200>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "mcspi3";
ti,spi-num-cs = <2>;
dmas = <&sdma 15>, <&sdma 16>;
dma-names = "tx0", "rx0";
status = "disabled";
};
mcspi4: spi@480ba000 {
compatible = "ti,omap4-mcspi";
reg = <0x480ba000 0x200>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "mcspi4";
ti,spi-num-cs = <1>;
dmas = <&sdma 70>, <&sdma 71>;
dma-names = "tx0", "rx0";
status = "disabled";
};
};
};

6
arch/arm/boot/dts/omap2420-h4.dts
View File

@ -50,15 +50,15 @@
label = "bootloader";
reg = <0 0x20000>;
};
partition@0x20000 {
partition@20000 {
label = "params";
reg = <0x20000 0x20000>;
};
partition@0x40000 {
partition@40000 {
label = "kernel";
reg = <0x40000 0x200000>;
};
partition@0x240000 {
partition@240000 {
label = "file-system";
reg = <0x240000 0x3dc0000>;
};

65
arch/arm/boot/dts/omap3-beagle-xm.dts
View File

@ -69,6 +69,23 @@
};
};
/* HS USB Port 2 Power */
hsusb2_power: hsusb2_power_reg {
compatible = "regulator-fixed";
regulator-name = "hsusb2_vbus";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&twl_gpio 18 0>; /* GPIO LEDA */
startup-delay-us = <70000>;
};
/* HS USB Host PHY on PORT 2 */
hsusb2_phy: hsusb2_phy {
compatible = "usb-nop-xceiv";
reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>; /* gpio_147 */
vcc-supply = <&hsusb2_power>;
};
};
&omap3_pmx_wkup {
@ -79,6 +96,37 @@
};
};
&omap3_pmx_core {
pinctrl-names = "default";
pinctrl-0 = <
&hsusbb2_pins
>;
uart3_pins: pinmux_uart3_pins {
pinctrl-single,pins = <
0x16e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */
>;
};
hsusbb2_pins: pinmux_hsusbb2_pins {
pinctrl-single,pins = <
0x5c0 (PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
0x5c2 (PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
0x5c4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
0x5c6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
0x5c8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
0x5cA (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
0x1a6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */
0x1a8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */
0x1aa (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */
0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */
0x1ae (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
>;
};
};
&i2c1 {
clock-frequency = <2600000>;
@ -148,15 +196,6 @@
power = <50>;
};
&omap3_pmx_core {
uart3_pins: pinmux_uart3_pins {
pinctrl-single,pins = <
0x16e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */
>;
};
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
@ -166,3 +205,11 @@
pinctrl-names = "default";
pinctrl-0 = <&gpio1_pins>;
};
&usbhshost {
port2-mode = "ehci-phy";
};
&usbhsehci {
phys = <0 &hsusb2_phy>;
};

44
arch/arm/boot/dts/omap3-beagle.dts
View File

@ -44,17 +44,6 @@
};
};
/* HS USB Port 2 RESET */
hsusb2_reset: hsusb2_reset_reg {
compatible = "regulator-fixed";
regulator-name = "hsusb2_reset";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio5 19 0>; /* gpio_147 */
startup-delay-us = <70000>;
enable-active-high;
};
/* HS USB Port 2 Power */
hsusb2_power: hsusb2_power_reg {
compatible = "regulator-fixed";
@ -68,7 +57,7 @@
/* HS USB Host PHY on PORT 2 */
hsusb2_phy: hsusb2_phy {
compatible = "usb-nop-xceiv";
reset-supply = <&hsusb2_reset>;
reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>; /* gpio_147 */
vcc-supply = <&hsusb2_power>;
};
@ -101,18 +90,18 @@
hsusbb2_pins: pinmux_hsusbb2_pins {
pinctrl-single,pins = <
0x5c0 (PIN_OUTPUT | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_clk */
0x5c2 (PIN_OUTPUT | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_stp */
0x5c4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dir */
0x5c6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_nxt */
0x5c8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat0 */
0x5cA (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat1 */
0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat2 */
0x1a6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat3 */
0x1a8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat4 */
0x1aa (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat5 */
0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat6 */
0x1ae (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat7 */
0x5c0 (PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
0x5c2 (PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
0x5c4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
0x5c6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
0x5c8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
0x5cA (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
0x1a6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */
0x1a8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */
0x1aa (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */
0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */
0x1ae (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
>;
};
@ -180,3 +169,10 @@
pinctrl-names = "default";
pinctrl-0 = <&gpio1_pins>;
};
&usb_otg_hs {
interface-type = <0>;
usb-phy = <&usb2_phy>;
mode = <3>;
power = <50>;
};

2
arch/arm/boot/dts/omap3-devkit8000.dts
View File

@ -125,7 +125,7 @@
nand-bus-width = <16>;
gpmc,device-nand;
gpmc,sync-clki-ps = <0>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;

168
arch/arm/boot/dts/omap3-gta04.dts Normal file
View File

@ -0,0 +1,168 @@
/*
* Copyright (C) 2013 Marek Belisko <marek@goldelico.com>
*
* Based on omap3-beagle-xm.dts
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "omap36xx.dtsi"
/ {
model = "OMAP3 GTA04";
compatible = "ti,omap3-gta04", "ti,omap3";
cpus {
cpu@0 {
cpu0-supply = <&vcc>;
};
};
memory {
device_type = "memory";
reg = <0x80000000 0x20000000>; /* 512 MB */
};
gpio-keys {
compatible = "gpio-keys";
aux-button {
label = "aux";
linux,code = <169>;
gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
gpio-key,wakeup;
};
};
};
&omap3_pmx_core {
uart1_pins: pinmux_uart1_pins {
pinctrl-single,pins = <
0x152 (PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
0x14c (PIN_OUTPUT |MUX_MODE0) /* uart1_tx.uart1_tx */
>;
};
uart2_pins: pinmux_uart2_pins {
pinctrl-single,pins = <
0x14a (PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
0x148 (PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
>;
};
uart3_pins: pinmux_uart3_pins {
pinctrl-single,pins = <
0x16e (PIN_INPUT | MUX_MODE0) /* uart3_rx.uart3_rx */
0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx.uart3_tx */
>;
};
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
0x114 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
0x116 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
>;
};
};
&i2c1 {
clock-frequency = <2600000>;
twl: twl@48 {
reg = <0x48>;
interrupts = <7>; /* SYS_NIRQ cascaded to intc */
interrupt-parent = <&intc>;
};
};
#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"
&i2c2 {
clock-frequency = <400000>;
/* pressure sensor */
bmp085@77 {
compatible = "bosch,bmp085";
reg = <0x77>;
};
/* leds */
tca6507@45 {
compatible = "ti,tca6507";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x45>;
gta04_led0: red_aux@0 {
label = "gta04:red:aux";
reg = <0x0>;
};
gta04_led1: green_aux@1 {
label = "gta04:green:aux";
reg = <0x1>;
};
gta04_led3: red_power@3 {
label = "gta04:red:power";
reg = <0x3>;
linux,default-trigger = "default-on";
};
gta04_led4: green_power@4 {
label = "gta04:green:power";
reg = <0x4>;
};
};
};
&i2c3 {
clock-frequency = <100000>;
};
&usb_otg_hs {
interface-type = <0>;
usb-phy = <&usb2_phy>;
mode = <3>;
power = <50>;
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
vmmc-supply = <&vmmc1>;
vmmc_aux-supply = <&vsim>;
bus-width = <4>;
};
&mmc2 {
status = "disabled";
};
&mmc3 {
status = "disabled";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
};

11
arch/arm/boot/dts/omap3-igep.dtsi
View File

@ -77,6 +77,8 @@
0x1a2 (PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
>;
};
leds_pins: pinmux_leds_pins { };
};
&i2c1 {
@ -141,3 +143,12 @@
&twl_gpio {
ti,use-leds;
};
&usb_otg_hs {
interface-type = <0>;
usb-phy = <&usb2_phy>;
phys = <&usb2_phy>;
phy-names = "usb2-phy";
mode = <3>;
power = <50>;
};

70
arch/arm/boot/dts/omap3-igep0020.dts
View File

@ -16,7 +16,10 @@
compatible = "isee,omap3-igep0020", "ti,omap3";
leds {
pinctrl-names = "default";
pinctrl-0 = <&leds_pins>;
compatible = "gpio-leds";
boot {
label = "omap3:green:boot";
gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
@ -52,6 +55,55 @@
regulator-name = "vdd33a";
regulator-always-on;
};
/* HS USB Port 1 Power */
hsusb1_power: hsusb1_power_reg {
compatible = "regulator-fixed";
regulator-name = "hsusb1_vbus";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&twl_gpio 18 GPIO_ACTIVE_LOW>; /* GPIO LEDA */
startup-delay-us = <70000>;
};
/* HS USB Host PHY on PORT 1 */
hsusb1_phy: hsusb1_phy {
compatible = "usb-nop-xceiv";
reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; /* gpio_24 */
vcc-supply = <&hsusb1_power>;
};
};
&omap3_pmx_core {
pinctrl-names = "default";
pinctrl-0 = <
&hsusbb1_pins
>;
hsusbb1_pins: pinmux_hsusbb1_pins {
pinctrl-single,pins = <
0x5aa (PIN_OUTPUT | MUX_MODE3) /* etk_ctl.hsusb1_clk */
0x5a8 (PIN_OUTPUT | MUX_MODE3) /* etk_clk.hsusb1_stp */
0x5bc (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d8.hsusb1_dir */
0x5be (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d9.hsusb1_nxt */
0x5ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d0.hsusb1_data0 */
0x5ae (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d1.hsusb1_data1 */
0x5b0 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d2.hsusb1_data2 */
0x5b2 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d3.hsusb1_data7 */
0x5b4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d4.hsusb1_data4 */
0x5b6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d5.hsusb1_data5 */
0x5b8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d6.hsusb1_data6 */
0x5ba (PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d7.hsusb1_data3 */
>;
};
};
&leds_pins {
pinctrl-single,pins = <
0x5c4 (PIN_OUTPUT | MUX_MODE4) /* etk_d12.gpio_26 */
0x5c6 (PIN_OUTPUT | MUX_MODE4) /* etk_d13.gpio_27 */
0x5c8 (PIN_OUTPUT | MUX_MODE4) /* etk_d14.gpio_28 */
>;
};
&i2c3 {
@ -99,19 +151,19 @@
label = "SPL";
reg = <0 0x100000>;
};
partition@0x80000 {
partition@80000 {
label = "U-Boot";
reg = <0x100000 0x180000>;
};
partition@0x1c0000 {
partition@1c0000 {
label = "Environment";
reg = <0x280000 0x100000>;
};
partition@0x280000 {
partition@280000 {
label = "Kernel";
reg = <0x380000 0x300000>;
};
partition@0x780000 {
partition@780000 {
label = "Filesystem";
reg = <0x680000 0x1f980000>;
};
@ -147,7 +199,7 @@
gpmc,cycle2cycle-diffcsen;
interrupt-parent = <&gpio6>;
interrupts = <16 8>;
interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
vmmc-supply = <&vddvario>;
vmmc_aux-supply = <&vdd33a>;
reg-io-width = <4>;
@ -155,3 +207,11 @@
smsc,save-mac-address;
};
};
&usbhshost {
port1-mode = "ehci-phy";
};
&usbhsehci {
phys = <&hsusb1_phy>;
};

17
arch/arm/boot/dts/omap3-igep0030.dts
View File

@ -16,7 +16,10 @@
compatible = "isee,omap3-igep0030", "ti,omap3";
leds {
pinctrl-names = "default";
pinctrl-0 = <&leds_pins>;
compatible = "gpio-leds";
boot {
label = "omap3:green:boot";
gpios = <&twl_gpio 13 GPIO_ACTIVE_LOW>;
@ -43,6 +46,12 @@
};
};
&leds_pins {
pinctrl-single,pins = <
0x5b0 (PIN_OUTPUT | MUX_MODE4) /* etk_d2.gpio_16 */
>;
};
&gpmc {
ranges = <0 0 0x00000000 0x20000000>;
@ -74,19 +83,19 @@
label = "SPL";
reg = <0 0x100000>;
};
partition@0x80000 {
partition@80000 {
label = "U-Boot";
reg = <0x100000 0x180000>;
};
partition@0x1c0000 {
partition@1c0000 {
label = "Environment";
reg = <0x280000 0x100000>;
};
partition@0x280000 {
partition@280000 {
label = "Kernel";
reg = <0x380000 0x300000>;
};
partition@0x780000 {
partition@780000 {
label = "Filesystem";
reg = <0x680000 0x1f980000>;
};

92
arch/arm/boot/dts/omap3-n900.dts Normal file
View File

@ -0,0 +1,92 @@
/*
* Copyright (C) 2013 Pavel Machek <pavel@ucw.cz>
* Copyright 2013 Aaro Koskinen <aaro.koskinen@iki.fi>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 (or later) as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "omap34xx.dtsi"
/ {
model = "Nokia N900";
compatible = "nokia,omap3-n900", "ti,omap3";
cpus {
cpu@0 {
cpu0-supply = <&vcc>;
};
};
memory {
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256 MB */
};
};
&i2c1 {
clock-frequency = <2200000>;
twl: twl@48 {
reg = <0x48>;
interrupts = <7>; /* SYS_NIRQ cascaded to intc */
interrupt-parent = <&intc>;
};
};
#include "twl4030.dtsi"
&twl_gpio {
ti,pullups = <0x0>;
ti,pulldowns = <0x03ff3f>; /* BIT(0..5) | BIT(8..17) */
};
&i2c2 {
clock-frequency = <400000>;
};
&i2c3 {
clock-frequency = <100000>;
};
&mmc1 {
status = "disabled";
};
&mmc2 {
status = "disabled";
};
&mmc3 {
status = "disabled";
};
&mcspi1 {
/*
* For some reason, touchscreen is necessary for screen to work at
* all on real hw. It works well without it on emulator.
*
* Also... order in the device tree actually matters here.
*/
tsc2005@0 {
compatible = "tsc2005";
spi-max-frequency = <6000000>;
reg = <0>;
};
mipid@2 {
compatible = "acx565akm";
spi-max-frequency = <6000000>;
reg = <2>;
};
};
&usb_otg_hs {
interface-type = <0>;
usb-phy = <&usb2_phy>;
mode = <2>;
power = <50>;
};

2
arch/arm/boot/dts/omap3.dtsi
View File

@ -111,7 +111,7 @@
pinctrl-single,function-mask = <0x7f1f>;
};
omap3_pmx_wkup: pinmux@0x48002a00 {
omap3_pmx_wkup: pinmux@48002a00 {
compatible = "ti,omap3-padconf", "pinctrl-single";
reg = <0x48002a00 0x5c>;
#address-cells = <1>;

22
arch/arm/boot/dts/omap3430-sdp.dts
View File

@ -84,15 +84,15 @@
label = "bootloader-nor";
reg = <0 0x40000>;
};
partition@0x40000 {
partition@40000 {
label = "params-nor";
reg = <0x40000 0x40000>;
};
partition@0x80000 {
partition@80000 {
label = "kernel-nor";
reg = <0x80000 0x200000>;
};
partition@0x280000 {
partition@280000 {
label = "filesystem-nor";
reg = <0x240000 0x7d80000>;
};
@ -125,19 +125,19 @@
label = "xloader-nand";
reg = <0 0x80000>;
};
partition@0x80000 {
partition@80000 {
label = "bootloader-nand";
reg = <0x80000 0x140000>;
};
partition@0x1c0000 {
partition@1c0000 {
label = "params-nand";
reg = <0x1c0000 0xc0000>;
};
partition@0x280000 {
partition@280000 {
label = "kernel-nand";
reg = <0x280000 0x500000>;
};
partition@0x780000 {
partition@780000 {
label = "filesystem-nand";
reg = <0x780000 0x7880000>;
};
@ -170,19 +170,19 @@
label = "xloader-onenand";
reg = <0 0x80000>;
};
partition@0x80000 {
partition@80000 {
label = "bootloader-onenand";
reg = <0x80000 0x40000>;
};
partition@0xc0000 {
partition@c0000 {
label = "params-onenand";
reg = <0xc0000 0x20000>;
};
partition@0xe0000 {
partition@e0000 {
label = "kernel-onenand";
reg = <0xe0000 0x200000>;
};
partition@0x2e0000 {
partition@2e0000 {
label = "filesystem-onenand";
reg = <0x2e0000 0xfd20000>;
};

39
arch/arm/boot/dts/omap4-panda-common.dtsi
View File

@ -60,22 +60,6 @@
"AFMR", "Line In";
};
/*
* Temp hack: Need to be replaced with the proper gpio-controlled
* reset driver as soon it will be merged.
* http://thread.gmane.org/gmane.linux.drivers.devicetree/36830
*/
/* HS USB Port 1 RESET */
hsusb1_reset: hsusb1_reset_reg {
compatible = "regulator-fixed";
regulator-name = "hsusb1_reset";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio2 30 0>; /* gpio_62 */
startup-delay-us = <70000>;
enable-active-high;
};
/* HS USB Port 1 Power */
hsusb1_power: hsusb1_power_reg {
compatible = "regulator-fixed";
@ -97,7 +81,7 @@
/* HS USB Host PHY on PORT 1 */
hsusb1_phy: hsusb1_phy {
compatible = "usb-nop-xceiv";
reset-supply = <&hsusb1_reset>;
reset-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; /* gpio_62 */
vcc-supply = <&hsusb1_power>;
/**
* FIXME:
@ -122,23 +106,9 @@
};
};
&omap4_pmx_wkup {
pinctrl-names = "default";
pinctrl-0 = <
&twl6030_wkup_pins
>;
twl6030_wkup_pins: pinmux_twl6030_wkup_pins {
pinctrl-single,pins = <
0x14 (PIN_OUTPUT | MUX_MODE2) /* fref_clk0_out.sys_drm_msecure */
>;
};
};
&omap4_pmx_core {
pinctrl-names = "default";
pinctrl-0 = <
&twl6030_pins
&twl6040_pins
&mcpdm_pins
&mcbsp1_pins
@ -147,12 +117,6 @@
&hsusbb1_pins
>;
twl6030_pins: pinmux_twl6030_pins {
pinctrl-single,pins = <
0x15e (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1.sys_nirq1 */
>;
};
twl6040_pins: pinmux_twl6040_pins {
pinctrl-single,pins = <
0xe0 (PIN_OUTPUT | MUX_MODE3) /* hdq_sio.gpio_127 */
@ -305,6 +269,7 @@
};
#include "twl6030.dtsi"
#include "twl6030_omap4.dtsi"
&i2c2 {
pinctrl-names = "default";

21
arch/arm/boot/dts/omap4-sdp.dts
View File

@ -155,23 +155,9 @@
};
};
&omap4_pmx_wkup {
pinctrl-names = "default";
pinctrl-0 = <
&twl6030_wkup_pins
>;
twl6030_wkup_pins: pinmux_twl6030_wkup_pins {
pinctrl-single,pins = <
0x14 (PIN_OUTPUT | MUX_MODE2) /* fref_clk0_out.sys_drm_msecure */
>;
};
};
&omap4_pmx_core {
pinctrl-names = "default";
pinctrl-0 = <
&twl6030_pins
&twl6040_pins
&mcpdm_pins
&dmic_pins
@ -206,12 +192,6 @@
>;
};
twl6030_pins: pinmux_twl6030_pins {
pinctrl-single,pins = <
0x15e (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1.sys_nirq1 */
>;
};
twl6040_pins: pinmux_twl6040_pins {
pinctrl-single,pins = <
0xe0 (PIN_OUTPUT | MUX_MODE3) /* hdq_sio.gpio_127 */
@ -370,6 +350,7 @@
};
#include "twl6030.dtsi"
#include "twl6030_omap4.dtsi"
&i2c2 {
pinctrl-names = "default";

20
arch/arm/boot/dts/omap4.dtsi
View File

@ -56,7 +56,7 @@
cache-level = <2>;
};
local-timer@0x48240600 {
local-timer@48240600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x48240600 0x20>;
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>;
@ -663,5 +663,23 @@
ram-bits = <12>;
ti,has-mailbox;
};
aes: aes@4b501000 {
compatible = "ti,omap4-aes";
ti,hwmods = "aes";
reg = <0x4b501000 0xa0>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&sdma 111>, <&sdma 110>;
dma-names = "tx", "rx";
};
des: des@480a5000 {
compatible = "ti,omap4-des";
ti,hwmods = "des";
reg = <0x480a5000 0xa0>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&sdma 117>, <&sdma 116>;
dma-names = "tx", "rx";
};
};
};

52
arch/arm/boot/dts/omap5-uevm.dts
View File

@ -27,21 +27,10 @@
regulator-max-microvolt = <3000000>;
};
/* HS USB Port 2 RESET */
hsusb2_reset: hsusb2_reset_reg {
compatible = "regulator-fixed";
regulator-name = "hsusb2_reset";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>; /* gpio3_80 HUB_NRESET */
startup-delay-us = <70000>;
enable-active-high;
};
/* HS USB Host PHY on PORT 2 */
hsusb2_phy: hsusb2_phy {
compatible = "usb-nop-xceiv";
reset-supply = <&hsusb2_reset>;
reset-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>; /* gpio3_80 HUB_NRESET */
/**
* FIXME
* Put the right clock phandle here when available
@ -51,21 +40,10 @@
clock-frequency = <19200000>;
};
/* HS USB Port 3 RESET */
hsusb3_reset: hsusb3_reset_reg {
compatible = "regulator-fixed";
regulator-name = "hsusb3_reset";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; /* gpio3_79 ETH_NRESET */
startup-delay-us = <70000>;
enable-active-high;
};
/* HS USB Host PHY on PORT 3 */
hsusb3_phy: hsusb3_phy {
compatible = "usb-nop-xceiv";
reset-supply = <&hsusb3_reset>;
reset-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; /* gpio3_79 ETH_NRESET */
};
leds {
@ -271,6 +249,14 @@
reg = <0x48>;
interrupt-controller;
#interrupt-cells = <2>;
ti,system-power-controller;
extcon_usb3: palmas_usb {
compatible = "ti,palmas-usb-vid";
ti,enable-vbus-detection;
ti,enable-id-detection;
ti,wakeup;
};
palmas_pmic {
compatible = "ti,palmas-pmic";
@ -334,9 +320,18 @@
ti,smps-range = <0x80>;
};
smps10_reg: smps10 {
smps10_out2_reg: smps10_out2 {
/* VBUS_5V_OTG */
regulator-name = "smps10";
regulator-name = "smps10_out2";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
};
smps10_out1_reg: smps10_out1 {
/* VBUS_5V_OTG */
regulator-name = "smps10_out1";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
@ -470,6 +465,11 @@
phys = <0 &hsusb2_phy &hsusb3_phy>;
};
&usb3 {
extcon = <&extcon_usb3>;
vbus-supply = <&smps10_out1_reg>;
};
&mcspi1 {
};

6
arch/arm/boot/dts/omap5.dtsi
View File

@ -604,7 +604,7 @@
ti,hwmods = "wd_timer2";
};
emif1: emif@0x4c000000 {
emif1: emif@4c000000 {
compatible = "ti,emif-4d5";
ti,hwmods = "emif1";
phy-type = <2>; /* DDR PHY type: Intelli PHY */
@ -615,7 +615,7 @@
hw-caps-temp-alert;
};
emif2: emif@0x4d000000 {
emif2: emif@4d000000 {
compatible = "ti,emif-4d5";
ti,hwmods = "emif2";
phy-type = <2>; /* DDR PHY type: Intelli PHY */
@ -634,7 +634,7 @@
ti,type = <2>;
};
omap_dwc3@4a020000 {
usb3: omap_dwc3@4a020000 {
compatible = "ti,dwc3";
ti,hwmods = "usb_otg_ss";
reg = <0x4a020000 0x10000>;

38
arch/arm/boot/dts/twl6030_omap4.dtsi Normal file
View File

@ -0,0 +1,38 @@
/*
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
&twl {
/*
* On most OMAP4 platforms, the twl6030 IRQ line is connected
* to the SYS_NIRQ1 line on OMAP and the twl6030 MSECURE line is
* connected to the fref_clk0_out.sys_drm_msecure line.
* Therefore, configure the defaults for the SYS_NIRQ1 and
* fref_clk0_out.sys_drm_msecure pins here.
*/
pinctrl-names = "default";
pinctrl-0 = <
&twl6030_pins
&twl6030_wkup_pins
>;
};
&omap4_pmx_wkup {
twl6030_wkup_pins: pinmux_twl6030_wkup_pins {
pinctrl-single,pins = <
0x14 (PIN_OUTPUT | MUX_MODE2) /* fref_clk0_out.sys_drm_msecure */
>;
};
};
&omap4_pmx_core {
twl6030_pins: pinmux_twl6030_pins {
pinctrl-single,pins = <
0x15e (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1.sys_nirq1 */
>;
};
};

50
include/dt-bindings/pinctrl/dra.h Normal file
View File

@ -0,0 +1,50 @@
/*
* This header provides constants for DRA pinctrl bindings.
*
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
* Author: Rajendra Nayak <rnayak@ti.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _DT_BINDINGS_PINCTRL_DRA_H
#define _DT_BINDINGS_PINCTRL_DRA_H
/* DRA7 mux mode options for each pin. See TRM for options */
#define MUX_MODE0 0x0
#define MUX_MODE1 0x1
#define MUX_MODE2 0x2
#define MUX_MODE3 0x3
#define MUX_MODE4 0x4
#define MUX_MODE5 0x5
#define MUX_MODE6 0x6
#define MUX_MODE7 0x7
#define MUX_MODE8 0x8
#define MUX_MODE9 0x9
#define MUX_MODE10 0xa
#define MUX_MODE11 0xb
#define MUX_MODE12 0xc
#define MUX_MODE13 0xd
#define MUX_MODE14 0xe
#define MUX_MODE15 0xf
#define PULL_ENA (1 << 16)
#define PULL_UP (1 << 17)
#define INPUT_EN (1 << 18)
#define SLEWCONTROL (1 << 19)
#define WAKEUP_EN (1 << 24)
#define WAKEUP_EVENT (1 << 25)
/* Active pin states */
#define PIN_OUTPUT 0
#define PIN_OUTPUT_PULLUP (PIN_OUTPUT | PULL_ENA | PULL_UP)
#define PIN_OUTPUT_PULLDOWN (PIN_OUTPUT | PULL_ENA)
#define PIN_INPUT INPUT_EN
#define PIN_INPUT_SLEW (INPUT_EN | SLEWCONTROL)
#define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP)
#define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN)
#endif