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irqchip/loongson-htvec: Support 8 groups of HT vectors 

The original version can only used by old Loongson-3 which only use 4
groups of HT vectors. Now Loongson-3A R4 can use 8 groups, so improve
the driver to support all 8 groups.

Fixes: 818e915fba ("irqchip: Add Loongson HyperTransport Vector support")
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Link: https://lore.kernel.org/r/1596099090-23516-5-git-send-email-chenhc@lemote.com
This commit is contained in:
Huacai Chen 2020-07-30 16:51:29 +08:00 committed by Marc Zyngier
parent c9c73a0541
commit c47e388cfc
1 changed files with 10 additions and 12 deletions
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22
drivers/irqchip/irq-loongson-htvec.c
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@ -19,15 +19,14 @@
/* Registers */ /* Registers */
#define HTVEC_EN_OFF 0x20 #define HTVEC_EN_OFF 0x20
#define HTVEC_MAX_PARENT_IRQ 4 #define HTVEC_MAX_PARENT_IRQ 8
#define VEC_COUNT_PER_REG 32 #define VEC_COUNT_PER_REG 32
#define VEC_REG_COUNT 4
#define VEC_COUNT (VEC_COUNT_PER_REG * VEC_REG_COUNT)
#define VEC_REG_IDX(irq_id) ((irq_id) / VEC_COUNT_PER_REG) #define VEC_REG_IDX(irq_id) ((irq_id) / VEC_COUNT_PER_REG)
#define VEC_REG_BIT(irq_id) ((irq_id) % VEC_COUNT_PER_REG) #define VEC_REG_BIT(irq_id) ((irq_id) % VEC_COUNT_PER_REG)
struct htvec { struct htvec {
int num_parents;
void __iomem *base; void __iomem *base;
struct irq_domain *htvec_domain; struct irq_domain *htvec_domain;
raw_spinlock_t htvec_lock; raw_spinlock_t htvec_lock;
@ -43,7 +42,7 @@ static void htvec_irq_dispatch(struct irq_desc *desc)
chained_irq_enter(chip, desc); chained_irq_enter(chip, desc);
for (i = 0; i < VEC_REG_COUNT; i++) { for (i = 0; i < priv->num_parents; i++) {
pending = readl(priv->base + 4 * i); pending = readl(priv->base + 4 * i);
while (pending) { while (pending) {
int bit = __ffs(pending); int bit = __ffs(pending);
@ -150,7 +149,7 @@ static void htvec_reset(struct htvec *priv)
u32 idx; u32 idx;
/* Clear IRQ cause registers, mask all interrupts */ /* Clear IRQ cause registers, mask all interrupts */
for (idx = 0; idx < VEC_REG_COUNT; idx++) { for (idx = 0; idx < priv->num_parents; idx++) {
writel_relaxed(0x0, priv->base + HTVEC_EN_OFF + 4 * idx); writel_relaxed(0x0, priv->base + HTVEC_EN_OFF + 4 * idx);
writel_relaxed(0xFFFFFFFF, priv->base); writel_relaxed(0xFFFFFFFF, priv->base);
} }
@ -160,7 +159,7 @@ static int htvec_of_init(struct device_node *node,
struct device_node *parent) struct device_node *parent)
{ {
struct htvec *priv; struct htvec *priv;
int err, parent_irq[4], num_parents = 0, i; int err, parent_irq[8], i;
priv = kzalloc(sizeof(*priv), GFP_KERNEL); priv = kzalloc(sizeof(*priv), GFP_KERNEL);
if (!priv) if (!priv)
@ -179,19 +178,18 @@ static int htvec_of_init(struct device_node *node,
if (parent_irq[i] <= 0) if (parent_irq[i] <= 0)
break; break;
num_parents++; priv->num_parents++;
} }
if (!num_parents) { if (!priv->num_parents) {
pr_err("Failed to get parent irqs\n"); pr_err("Failed to get parent irqs\n");
err = -ENODEV; err = -ENODEV;
goto iounmap_base; goto iounmap_base;
} }
priv->htvec_domain = irq_domain_create_linear(of_node_to_fwnode(node), priv->htvec_domain = irq_domain_create_linear(of_node_to_fwnode(node),
VEC_COUNT, (VEC_COUNT_PER_REG * priv->num_parents),
&htvec_domain_ops, &htvec_domain_ops, priv);
priv);
if (!priv->htvec_domain) { if (!priv->htvec_domain) {
pr_err("Failed to create IRQ domain\n"); pr_err("Failed to create IRQ domain\n");
err = -ENOMEM; err = -ENOMEM;
@ -200,7 +198,7 @@ static int htvec_of_init(struct device_node *node,
htvec_reset(priv); htvec_reset(priv);
for (i = 0; i < num_parents; i++) for (i = 0; i < priv->num_parents; i++)
irq_set_chained_handler_and_data(parent_irq[i], irq_set_chained_handler_and_data(parent_irq[i],
htvec_irq_dispatch, priv); htvec_irq_dispatch, priv);