irqchip/loongson-htvec: Support 8 groups of HT vectors
The original version can only used by old Loongson-3 which only use 4
groups of HT vectors. Now Loongson-3A R4 can use 8 groups, so improve
the driver to support all 8 groups.
Fixes: 818e915fba
("irqchip: Add Loongson HyperTransport Vector support")
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Link: https://lore.kernel.org/r/1596099090-23516-5-git-send-email-chenhc@lemote.com
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@ -19,15 +19,14 @@
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/* Registers */
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#define HTVEC_EN_OFF 0x20
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#define HTVEC_MAX_PARENT_IRQ 4
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#define HTVEC_MAX_PARENT_IRQ 8
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#define VEC_COUNT_PER_REG 32
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#define VEC_REG_COUNT 4
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#define VEC_COUNT (VEC_COUNT_PER_REG * VEC_REG_COUNT)
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#define VEC_REG_IDX(irq_id) ((irq_id) / VEC_COUNT_PER_REG)
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#define VEC_REG_BIT(irq_id) ((irq_id) % VEC_COUNT_PER_REG)
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struct htvec {
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int num_parents;
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void __iomem *base;
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struct irq_domain *htvec_domain;
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raw_spinlock_t htvec_lock;
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@ -43,7 +42,7 @@ static void htvec_irq_dispatch(struct irq_desc *desc)
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chained_irq_enter(chip, desc);
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for (i = 0; i < VEC_REG_COUNT; i++) {
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for (i = 0; i < priv->num_parents; i++) {
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pending = readl(priv->base + 4 * i);
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while (pending) {
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int bit = __ffs(pending);
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@ -150,7 +149,7 @@ static void htvec_reset(struct htvec *priv)
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u32 idx;
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/* Clear IRQ cause registers, mask all interrupts */
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for (idx = 0; idx < VEC_REG_COUNT; idx++) {
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for (idx = 0; idx < priv->num_parents; idx++) {
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writel_relaxed(0x0, priv->base + HTVEC_EN_OFF + 4 * idx);
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writel_relaxed(0xFFFFFFFF, priv->base);
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}
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@ -160,7 +159,7 @@ static int htvec_of_init(struct device_node *node,
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struct device_node *parent)
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{
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struct htvec *priv;
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int err, parent_irq[4], num_parents = 0, i;
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int err, parent_irq[8], i;
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priv = kzalloc(sizeof(*priv), GFP_KERNEL);
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if (!priv)
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@ -179,19 +178,18 @@ static int htvec_of_init(struct device_node *node,
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if (parent_irq[i] <= 0)
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break;
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num_parents++;
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priv->num_parents++;
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}
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if (!num_parents) {
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if (!priv->num_parents) {
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pr_err("Failed to get parent irqs\n");
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err = -ENODEV;
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goto iounmap_base;
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}
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priv->htvec_domain = irq_domain_create_linear(of_node_to_fwnode(node),
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VEC_COUNT,
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&htvec_domain_ops,
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priv);
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(VEC_COUNT_PER_REG * priv->num_parents),
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&htvec_domain_ops, priv);
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if (!priv->htvec_domain) {
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pr_err("Failed to create IRQ domain\n");
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err = -ENOMEM;
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@ -200,7 +198,7 @@ static int htvec_of_init(struct device_node *node,
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htvec_reset(priv);
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for (i = 0; i < num_parents; i++)
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for (i = 0; i < priv->num_parents; i++)
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irq_set_chained_handler_and_data(parent_irq[i],
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htvec_irq_dispatch, priv);
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