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net: dsa: microchip: ksz8795: use common xmii function 

This patch updates the ksz8795 cpu configuration to use the ksz common
xmii set functions.

Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Arun Ramadoss 2022-07-24 14:58:22 +05:30 committed by David S. Miller
parent 0ab7f6bf16
commit c476bede4b
2 changed files with 1 additions and 42 deletions
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35
drivers/net/dsa/microchip/ksz8795.c
View File

@ -1116,7 +1116,6 @@ void ksz8_port_mirror_del(struct ksz_device *dev, int port,
static void ksz8795_cpu_interface_select(struct ksz_device *dev, int port) static void ksz8795_cpu_interface_select(struct ksz_device *dev, int port)
{ {
struct ksz_port *p = &dev->ports[port]; struct ksz_port *p = &dev->ports[port];
u8 data8;
if (!p->interface && dev->compat_interface) { if (!p->interface && dev->compat_interface) {
dev_warn(dev->dev, dev_warn(dev->dev,
@ -1126,39 +1125,7 @@ static void ksz8795_cpu_interface_select(struct ksz_device *dev, int port)
p->interface = dev->compat_interface; p->interface = dev->compat_interface;
} }
/* Configure MII interface for proper network communication. */ ksz_set_xmii(dev, port, p->interface);
ksz_read8(dev, REG_PORT_5_CTRL_6, &data8);
data8 &= ~PORT_INTERFACE_TYPE;
data8 &= ~PORT_GMII_1GPS_MODE;
switch (p->interface) {
case PHY_INTERFACE_MODE_MII:
p->phydev.speed = SPEED_100;
break;
case PHY_INTERFACE_MODE_RMII:
data8 |= PORT_INTERFACE_RMII;
p->phydev.speed = SPEED_100;
break;
case PHY_INTERFACE_MODE_GMII:
data8 |= PORT_GMII_1GPS_MODE;
data8 |= PORT_INTERFACE_GMII;
p->phydev.speed = SPEED_1000;
break;
default:
data8 &= ~PORT_RGMII_ID_IN_ENABLE;
data8 &= ~PORT_RGMII_ID_OUT_ENABLE;
if (p->interface == PHY_INTERFACE_MODE_RGMII_ID ||
p->interface == PHY_INTERFACE_MODE_RGMII_RXID)
data8 |= PORT_RGMII_ID_IN_ENABLE;
if (p->interface == PHY_INTERFACE_MODE_RGMII_ID ||
p->interface == PHY_INTERFACE_MODE_RGMII_TXID)
data8 |= PORT_RGMII_ID_OUT_ENABLE;
data8 |= PORT_GMII_1GPS_MODE;
data8 |= PORT_INTERFACE_RGMII;
p->phydev.speed = SPEED_1000;
break;
}
ksz_write8(dev, REG_PORT_5_CTRL_6, data8);
p->phydev.duplex = 1;
} }
void ksz8_port_setup(struct ksz_device *dev, int port, bool cpu_port) void ksz8_port_setup(struct ksz_device *dev, int port, bool cpu_port)

8
drivers/net/dsa/microchip/ksz8795_reg.h
View File

@ -170,15 +170,7 @@
#define REG_PORT_5_CTRL_6 0x56 #define REG_PORT_5_CTRL_6 0x56
#define PORT_MII_INTERNAL_CLOCK BIT(7) #define PORT_MII_INTERNAL_CLOCK BIT(7)
#define PORT_GMII_1GPS_MODE BIT(6)
#define PORT_RGMII_ID_IN_ENABLE BIT(4)
#define PORT_RGMII_ID_OUT_ENABLE BIT(3)
#define PORT_GMII_MAC_MODE BIT(2) #define PORT_GMII_MAC_MODE BIT(2)
#define PORT_INTERFACE_TYPE 0x3
#define PORT_INTERFACE_MII 0
#define PORT_INTERFACE_RMII 1
#define PORT_INTERFACE_GMII 2
#define PORT_INTERFACE_RGMII 3
#define REG_PORT_1_CTRL_7 0x17 #define REG_PORT_1_CTRL_7 0x17
#define REG_PORT_2_CTRL_7 0x27 #define REG_PORT_2_CTRL_7 0x27