net: dsa: microchip: ksz8795: use common xmii function
This patch updates the ksz8795 cpu configuration to use the ksz common xmii set functions. Signed-off-by: Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -1116,7 +1116,6 @@ void ksz8_port_mirror_del(struct ksz_device *dev, int port,
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static void ksz8795_cpu_interface_select(struct ksz_device *dev, int port)
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{
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struct ksz_port *p = &dev->ports[port];
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u8 data8;
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if (!p->interface && dev->compat_interface) {
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dev_warn(dev->dev,
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@ -1126,39 +1125,7 @@ static void ksz8795_cpu_interface_select(struct ksz_device *dev, int port)
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p->interface = dev->compat_interface;
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}
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/* Configure MII interface for proper network communication. */
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ksz_read8(dev, REG_PORT_5_CTRL_6, &data8);
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data8 &= ~PORT_INTERFACE_TYPE;
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data8 &= ~PORT_GMII_1GPS_MODE;
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switch (p->interface) {
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case PHY_INTERFACE_MODE_MII:
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p->phydev.speed = SPEED_100;
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break;
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case PHY_INTERFACE_MODE_RMII:
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data8 |= PORT_INTERFACE_RMII;
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p->phydev.speed = SPEED_100;
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break;
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case PHY_INTERFACE_MODE_GMII:
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data8 |= PORT_GMII_1GPS_MODE;
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data8 |= PORT_INTERFACE_GMII;
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p->phydev.speed = SPEED_1000;
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break;
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default:
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data8 &= ~PORT_RGMII_ID_IN_ENABLE;
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data8 &= ~PORT_RGMII_ID_OUT_ENABLE;
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if (p->interface == PHY_INTERFACE_MODE_RGMII_ID ||
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p->interface == PHY_INTERFACE_MODE_RGMII_RXID)
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data8 |= PORT_RGMII_ID_IN_ENABLE;
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if (p->interface == PHY_INTERFACE_MODE_RGMII_ID ||
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p->interface == PHY_INTERFACE_MODE_RGMII_TXID)
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data8 |= PORT_RGMII_ID_OUT_ENABLE;
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data8 |= PORT_GMII_1GPS_MODE;
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data8 |= PORT_INTERFACE_RGMII;
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p->phydev.speed = SPEED_1000;
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break;
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}
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ksz_write8(dev, REG_PORT_5_CTRL_6, data8);
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p->phydev.duplex = 1;
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ksz_set_xmii(dev, port, p->interface);
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}
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void ksz8_port_setup(struct ksz_device *dev, int port, bool cpu_port)
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@ -170,15 +170,7 @@
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#define REG_PORT_5_CTRL_6 0x56
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#define PORT_MII_INTERNAL_CLOCK BIT(7)
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#define PORT_GMII_1GPS_MODE BIT(6)
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#define PORT_RGMII_ID_IN_ENABLE BIT(4)
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#define PORT_RGMII_ID_OUT_ENABLE BIT(3)
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#define PORT_GMII_MAC_MODE BIT(2)
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#define PORT_INTERFACE_TYPE 0x3
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#define PORT_INTERFACE_MII 0
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#define PORT_INTERFACE_RMII 1
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#define PORT_INTERFACE_GMII 2
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#define PORT_INTERFACE_RGMII 3
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#define REG_PORT_1_CTRL_7 0x17
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#define REG_PORT_2_CTRL_7 0x27
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