drm/amdgpu: Initialize vcn v4_0_3 ras function
Initialize vcn v4_0_3 ras function Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -51,6 +51,7 @@ static int vcn_v4_0_3_set_powergating_state(void *handle,
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static int vcn_v4_0_3_pause_dpg_mode(struct amdgpu_device *adev,
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int inst_idx, struct dpg_pause_state *new_state);
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static void vcn_v4_0_3_unified_ring_set_wptr(struct amdgpu_ring *ring);
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static void vcn_v4_0_3_set_ras_funcs(struct amdgpu_device *adev);
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/**
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* vcn_v4_0_3_early_init - set function pointers
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@ -68,6 +69,7 @@ static int vcn_v4_0_3_early_init(void *handle)
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vcn_v4_0_3_set_unified_ring_funcs(adev);
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vcn_v4_0_3_set_irq_funcs(adev);
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vcn_v4_0_3_set_ras_funcs(adev);
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return amdgpu_vcn_early_init(adev);
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}
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@ -130,6 +132,14 @@ static int vcn_v4_0_3_sw_init(void *handle)
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if (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)
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adev->vcn.pause_dpg_mode = vcn_v4_0_3_pause_dpg_mode;
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if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__VCN)) {
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r = amdgpu_vcn_ras_sw_init(adev);
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if (r) {
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dev_err(adev->dev, "Failed to initialize vcn ras block!\n");
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return r;
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}
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}
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return 0;
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}
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@ -1488,3 +1498,19 @@ static void vcn_v4_0_3_reset_ras_error_count(struct amdgpu_device *adev)
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for (i = 0; i < adev->vcn.num_vcn_inst; i++)
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vcn_v4_0_3_inst_reset_ras_error_count(adev, i);
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}
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static const struct amdgpu_ras_block_hw_ops vcn_v4_0_3_ras_hw_ops = {
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.query_ras_error_count = vcn_v4_0_3_query_ras_error_count,
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.reset_ras_error_count = vcn_v4_0_3_reset_ras_error_count,
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};
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static struct amdgpu_vcn_ras vcn_v4_0_3_ras = {
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.ras_block = {
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.hw_ops = &vcn_v4_0_3_ras_hw_ops,
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},
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};
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static void vcn_v4_0_3_set_ras_funcs(struct amdgpu_device *adev)
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{
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adev->vcn.ras = &vcn_v4_0_3_ras;
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}
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