PCI: mvebu: Fix reporting Data Link Layer Link Active on emulated bridge
Add support for reporting PCI_EXP_LNKSTA_DLLLA bit in Link Control register on emulated bridge via PCIE_STAT_OFF reg. Function mvebu_pcie_link_up() already parses this register and returns if Data Link is Active or not. Also correctly indicate DLLLA capability via PCI_EXP_LNKCAP_DLLLARC bit in Link Control Capability register which is required for reporting DLLLA bit. Link: https://lore.kernel.org/r/20220104153529.31647-12-pali@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Rob Herring <robh@kernel.org>
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@ -548,13 +548,18 @@ mvebu_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge,
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/*
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* PCIe requires that the Clock Power Management capability bit
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* is hard-wired to zero for downstream ports but HW returns 1.
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* Additionally enable Data Link Layer Link Active Reporting
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* Capable bit as DL_Active indication is provided too.
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*/
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*value = mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCAP) &
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~PCI_EXP_LNKCAP_CLKPM;
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*value = (mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCAP) &
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~PCI_EXP_LNKCAP_CLKPM) | PCI_EXP_LNKCAP_DLLLARC;
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break;
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case PCI_EXP_LNKCTL:
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*value = mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL);
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/* DL_Active indication is provided via PCIE_STAT_OFF */
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*value = mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL) |
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(mvebu_pcie_link_up(port) ?
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(PCI_EXP_LNKSTA_DLLLA << 16) : 0);
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break;
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case PCI_EXP_SLTCTL:
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