Second set of dts changes for omap variants for v4.17
This series of patches configures few new drivers and adds omap5 specific nodes: - Enable USB OTG mode for xhci on am437x - A series of changes to configure aux control module instance on omap5 mostly to get the audio clocks configured - A series of changes to update droid4 for MDM6600 modem USB PHY and UART1 pinctrl -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlqz27sRHHRvbnlAYXRv bWlkZS5jb20ACgkQG9Q+yVyrpXMl0g/5Ac6Lbj1GtMGh0lPLwbQlEnNNrrRRczcO Bj4IiALC2Kn/DZwypoY4iswNP9qfGEd5R8CW+J2DiSZiqw5WrsncnMmLVGlrAh4g cet9pKaWkQIdu8y0FtAc7Gymxr9la/W8qcS1ysvXELf6jok/0xkOdrX6Zrq79XjC nbw72QGWHi3UAcI90FUI7/FNcFDkPjo8ZoggPDTn4j47/nwIKRcLb+L060GK7ity Tpd0yiqZz1zeZog0+6Fi4GBmQJ1mu3IaD8HELkVlKGHE8GUHd7qDsZN8lPpgfoWZ TQvEDYZKj7gVDm7o6/diSfyMEF1PoSa3lVZ/ST3xmK/DmqzEueWtTLSJvz0XYvtM wpJnAEneVK6lmqciiPiOdmIbV06FtdQScdKqsxBOKzGIuKY4Ygye09IC1ApBdscl BjDJmhomXXQ9j187DbrEMi0WdtXF+1EtUm0ffowhFbL6hd/bOqyz323o+3tMnX8g n0287cP6hcCxFrRMS1/uz4yFMPW+Ew/7lppVlU53KAWjQAc3R2Vkg77MgDQDmmzO 71Ou2Cd6hWmPjcN6VLmStQFtAs3CMWADnCTrEx+JGsMj3LdCIxoBBOrrR176s094 PZafu/JG3QlN/siLcR8UpX5levHxq0kYTJKHs/W3AG0Aep2IV6lG6RnHhBEw49yV t+hLdRHwbGM= =JWxW -----END PGP SIGNATURE----- Merge tag 'omap-for-v4.17/dt-pt2-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt Pull "Second set of dts changes for omap variants for v4.17" from Tony Lindgren: This series of patches configures few new drivers and adds omap5 specific nodes: - Enable USB OTG mode for xhci on am437x - A series of changes to configure aux control module instance on omap5 mostly to get the audio clocks configured - A series of changes to update droid4 for MDM6600 modem USB PHY and UART1 pinctrl * tag 'omap-for-v4.17/dt-pt2-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: omap4-droid4: Configure uart1 pins ARM: dts: omap4-droid4: Configure MDM6600 USB PHY ARM: dts: omap4-droid4: Fix USB PHY port naming ARM: dts: omap5-board-common: Add phandle for mclk clock for twl6040 ARM: dts: omap5: add fref_xtal_ck support ARM: dts: omap5: add support for control module wkup pad config dt-bindings: omap5: ctrl: Support for control module wkup pad config ARM: dts: am43xx: Enable dual-role mode for USB1
This commit is contained in:
Arnd Bergmann
commit
c3a694ac3b
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@ -25,6 +25,7 @@ Required properties:
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"ti,omap4-scm-padconf-wkup"
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"ti,omap5-scm-core"
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"ti,omap5-scm-padconf-core"
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"ti,omap5-scm-wkup-pad-conf"
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"ti,dra7-scm-core"
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- reg: Contains Control Module register address range
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(base address and length)
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@ -805,7 +805,7 @@
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};
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&usb1 {
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dr_mode = "peripheral";
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dr_mode = "otg";
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status = "okay";
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};
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@ -600,7 +600,7 @@
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};
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&usb1 {
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dr_mode = "peripheral";
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dr_mode = "otg";
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&usb1_pins>;
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@ -856,7 +856,7 @@
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};
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&usb1 {
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dr_mode = "peripheral";
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dr_mode = "otg";
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status = "okay";
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};
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@ -70,8 +70,30 @@
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regulator-always-on;
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};
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/* HS USB Host PHY on PORT 1 */
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hsusb1_phy: hsusb1_phy {
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/* FS USB Host PHY on port 1 for mdm6600 */
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fsusb1_phy: usb-phy@1 {
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compatible = "motorola,mapphone-mdm6600";
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pinctrl-0 = <&usb_mdm6600_pins>;
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pinctrl-names = "default";
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enable-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>; /* gpio_95 */
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power-gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>; /* gpio_54 */
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reset-gpios = <&gpio2 17 GPIO_ACTIVE_HIGH>; /* gpio_49 */
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/* mode: gpio_148 gpio_149 */
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motorola,mode-gpios = <&gpio5 20 GPIO_ACTIVE_HIGH>,
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<&gpio5 21 GPIO_ACTIVE_HIGH>;
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/* cmd: gpio_103 gpio_104 gpio_142 */
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motorola,cmd-gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>,
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<&gpio4 8 GPIO_ACTIVE_HIGH>,
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<&gpio5 14 GPIO_ACTIVE_HIGH>;
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/* status: gpio_52 gpio_53 gpio_55 */
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motorola,status-gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>,
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<&gpio2 21 GPIO_ACTIVE_HIGH>,
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<&gpio2 23 GPIO_ACTIVE_HIGH>;
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#phy-cells = <0>;
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};
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/* HS USB host TLL nop-phy on port 2 for w3glte */
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hsusb2_phy: usb-phy@2 {
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compatible = "usb-nop-xceiv";
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#phy-cells = <0>;
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};
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@ -455,6 +477,43 @@
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>;
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};
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usb_mdm6600_pins: pinmux_usb_mdm6600_pins {
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pinctrl-single,pins = <
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/* enable 0x4a1000d8 usbb1_ulpitll_dat7.gpio_95 ag16 */
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OMAP4_IOPAD(0x0d8, PIN_INPUT | MUX_MODE3)
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/* power 0x4a10007c gpmc_nwp.gpio_54 c25 */
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OMAP4_IOPAD(0x07c, PIN_OUTPUT | MUX_MODE3)
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/* reset 0x4a100072 gpmc_a25.gpio_49 d20 */
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OMAP4_IOPAD(0x072, PIN_OUTPUT | MUX_MODE3)
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/* mode0/bpwake 0x4a10014e sdmmc5_dat1.gpio_148 af4 */
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OMAP4_IOPAD(0x14e, PIN_OUTPUT | MUX_MODE3)
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/* mode1/apwake 0x4a100150 sdmmc5_dat2.gpio_149 ag3 */
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OMAP4_IOPAD(0x150, PIN_OFF_OUTPUT_LOW | PIN_INPUT | MUX_MODE3)
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/* status0 0x4a10007e gpmc_clk.gpio_55 b22 */
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OMAP4_IOPAD(0x07e, PIN_INPUT | MUX_MODE3)
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/* status1 0x4a10007a gpmc_ncs3.gpio_53 c22 */
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OMAP4_IOPAD(0x07a, PIN_INPUT | MUX_MODE3)
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/* status2 0x4a100078 gpmc_ncs2.gpio_52 d21 */
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OMAP4_IOPAD(0x078, PIN_INPUT | MUX_MODE3)
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/* cmd0 0x4a100094 gpmc_ncs6.gpio_103 c24 */
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OMAP4_IOPAD(0x094, PIN_OUTPUT | MUX_MODE3)
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/* cmd1 0x4a100096 gpmc_ncs7.gpio_104 d24 */
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OMAP4_IOPAD(0x096, PIN_OUTPUT | MUX_MODE3)
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/* cmd2 0x4a100142 uart3_rts_sd.gpio_142 f28 */
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OMAP4_IOPAD(0x142, PIN_OUTPUT | MUX_MODE3)
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>;
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};
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usb_ulpi_pins: pinmux_usb_ulpi_pins {
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pinctrl-single,pins = <
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OMAP4_IOPAD(0x196, MUX_MODE7)
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@ -494,6 +553,28 @@
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>;
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};
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/*
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* Note that the v3.0.8 stock userspace dynamically remuxes uart1
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* rts pin probably for PM purposes to PIN_INPUT_PULLUP | MUX_MODE7
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* when not used. If needed, we can add rts pin remux later based
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* on power measurements.
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*/
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uart1_pins: pinmux_uart1_pins {
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pinctrl-single,pins = <
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/* 0x4a10013c mcspi1_cs2.uart1_cts ag23 */
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OMAP4_IOPAD(0x13c, PIN_INPUT_PULLUP | MUX_MODE1)
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/* 0x4a10013e mcspi1_cs3.uart1_rts ah23 */
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OMAP4_IOPAD(0x13e, MUX_MODE1)
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/* 0x4a100140 uart3_cts_rctx.uart1_tx f27 */
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OMAP4_IOPAD(0x140, PIN_OUTPUT | MUX_MODE1)
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/* 0x4a1001ca dpm_emu14.uart1_rx aa3 */
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OMAP4_IOPAD(0x1ca, PIN_INPUT_PULLUP | MUX_MODE2)
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>;
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};
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/* uart3_tx_irtx and uart3_rx_irrx */
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uart3_pins: pinmux_uart3_pins {
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pinctrl-single,pins = <
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@ -563,6 +644,17 @@
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};
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};
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/*
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* As uart1 is wired to mdm6600 with rts and cts, we can use the cts pin for
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* uart1 wakeirq.
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*/
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_pins>;
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interrupts-extended = <&wakeupgen GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH
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&omap4_pmx_core 0xfc>;
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};
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&uart3 {
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interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH
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&omap4_pmx_core 0x17c>;
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@ -579,8 +671,13 @@
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};
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};
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&usbhsohci {
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phys = <&fsusb1_phy>;
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phy-names = "usb";
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};
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&usbhsehci {
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phys = <&hsusb1_phy>;
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phys = <&hsusb2_phy>;
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};
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&usbhshost {
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@ -659,8 +659,8 @@
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v2v1-supply = <&smps9_reg>;
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enable-active-high;
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clocks = <&clk32kgaudio>;
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clock-names = "clk32k";
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clocks = <&clk32kgaudio>, <&fref_xtal_ck>;
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clock-names = "clk32k", "mclk";
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};
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};
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@ -287,6 +287,28 @@
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pinctrl-single,register-width = <16>;
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pinctrl-single,function-mask = <0x7fff>;
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};
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omap5_scm_wkup_pad_conf: omap5_scm_wkup_pad_conf@cda0 {
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compatible = "ti,omap5-scm-wkup-pad-conf",
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"simple-bus";
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reg = <0xcda0 0x60>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0xcda0 0x60>;
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scm_wkup_pad_conf: scm_conf@0 {
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compatible = "syscon", "simple-bus";
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reg = <0x0 0x60>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x0 0x60>;
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scm_wkup_pad_conf_clocks: clocks@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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};
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};
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ocmcram: ocmcram@40300000 {
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@ -1179,3 +1179,13 @@
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};
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};
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};
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&scm_wkup_pad_conf_clocks {
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fref_xtal_ck: fref_xtal_ck {
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#clock-cells = <0>;
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compatible = "ti,gate-clock";
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clocks = <&sys_clkin>;
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ti,bit-shift = <28>;
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reg = <0x14>;
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};
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};
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