Merge branch 'xpcs-phylink_pcs_ops'
Vladimir Oltean says: ==================== Convert xpcs to phylink_pcs_ops Background: the sja1105 DSA driver currently drives a Designware XPCS for SGMII and 2500base-X, and it would be nice to reuse some code with the xpcs module. This would also help consolidate the phylink_pcs_ops, since the only other dedicated PCS driver, currently, is the lynx_pcs. Therefore, this series makes the xpcs expose the same kind of API that the lynx_pcs module does. The main changes are getting rid of struct mdio_xpcs_ops, being compatible with struct phylink_pcs_ops and being less reliant on the phy_interface_t passed to xpcs_probe (now renamed to xpcs_create). This patch series is partially tested (some code paths have been covered on the NXP SJA1105 and some others with the help of Vee Khee Wong on Intel Tiger Lake / stmmac) but further testing on 10G setups would be appreciated, if possible. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller
commit
c356be0574
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@ -503,8 +503,7 @@ struct mac_device_info {
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const struct stmmac_hwtimestamp *ptp;
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const struct stmmac_tc_ops *tc;
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const struct stmmac_mmc_ops *mmc;
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const struct mdio_xpcs_ops *xpcs;
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struct mdio_xpcs_args xpcs_args;
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struct mdio_xpcs_args *xpcs;
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struct mii_regs mii; /* MII register Addresses */
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struct mac_link link;
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void __iomem *pcsr; /* vpointer to device CSRs */
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@ -613,20 +613,6 @@ struct stmmac_mmc_ops {
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#define stmmac_mmc_read(__priv, __args...) \
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stmmac_do_void_callback(__priv, mmc, read, __args)
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/* XPCS callbacks */
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#define stmmac_xpcs_validate(__priv, __args...) \
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stmmac_do_callback(__priv, xpcs, validate, __args)
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#define stmmac_xpcs_config(__priv, __args...) \
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stmmac_do_callback(__priv, xpcs, config, __args)
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#define stmmac_xpcs_get_state(__priv, __args...) \
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stmmac_do_callback(__priv, xpcs, get_state, __args)
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#define stmmac_xpcs_link_up(__priv, __args...) \
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stmmac_do_callback(__priv, xpcs, link_up, __args)
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#define stmmac_xpcs_probe(__priv, __args...) \
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stmmac_do_callback(__priv, xpcs, probe, __args)
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#define stmmac_xpcs_config_eee(__priv, __args...) \
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stmmac_do_callback(__priv, xpcs, config_eee, __args)
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struct stmmac_regs_off {
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u32 ptp_off;
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u32 mmc_off;
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@ -720,11 +720,13 @@ static int stmmac_ethtool_op_set_eee(struct net_device *dev,
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netdev_warn(priv->dev,
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"Setting EEE tx-lpi is not supported\n");
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ret = stmmac_xpcs_config_eee(priv, &priv->hw->xpcs_args,
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priv->plat->mult_fact_100ns,
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edata->eee_enabled);
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if (ret)
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return ret;
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if (priv->hw->xpcs) {
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ret = xpcs_config_eee(priv->hw->xpcs,
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priv->plat->mult_fact_100ns,
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edata->eee_enabled);
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if (ret)
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return ret;
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}
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if (!edata->eee_enabled)
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stmmac_disable_eee_mode(priv);
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@ -996,29 +996,14 @@ static void stmmac_validate(struct phylink_config *config,
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linkmode_andnot(state->advertising, state->advertising, mask);
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/* If PCS is supported, check which modes it supports. */
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stmmac_xpcs_validate(priv, &priv->hw->xpcs_args, supported, state);
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}
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static void stmmac_mac_pcs_get_state(struct phylink_config *config,
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struct phylink_link_state *state)
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{
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struct stmmac_priv *priv = netdev_priv(to_net_dev(config->dev));
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state->link = 0;
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stmmac_xpcs_get_state(priv, &priv->hw->xpcs_args, state);
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if (priv->hw->xpcs)
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xpcs_validate(priv->hw->xpcs, supported, state);
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}
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static void stmmac_mac_config(struct phylink_config *config, unsigned int mode,
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const struct phylink_link_state *state)
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{
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struct stmmac_priv *priv = netdev_priv(to_net_dev(config->dev));
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stmmac_xpcs_config(priv, &priv->hw->xpcs_args, state);
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}
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static void stmmac_mac_an_restart(struct phylink_config *config)
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{
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/* Not Supported */
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/* Nothing to do, xpcs_config() handles everything */
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}
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static void stmmac_fpe_link_state_handle(struct stmmac_priv *priv, bool is_up)
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@ -1060,8 +1045,6 @@ static void stmmac_mac_link_up(struct phylink_config *config,
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struct stmmac_priv *priv = netdev_priv(to_net_dev(config->dev));
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u32 ctrl;
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stmmac_xpcs_link_up(priv, &priv->hw->xpcs_args, speed, interface);
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ctrl = readl(priv->ioaddr + MAC_CTRL_REG);
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ctrl &= ~priv->hw->link.speed_mask;
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@ -1154,9 +1137,7 @@ static void stmmac_mac_link_up(struct phylink_config *config,
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static const struct phylink_mac_ops stmmac_phylink_mac_ops = {
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.validate = stmmac_validate,
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.mac_pcs_get_state = stmmac_mac_pcs_get_state,
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.mac_config = stmmac_mac_config,
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.mac_an_restart = stmmac_mac_an_restart,
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.mac_link_down = stmmac_mac_link_down,
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.mac_link_up = stmmac_mac_link_up,
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};
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@ -1233,6 +1214,7 @@ static int stmmac_init_phy(struct net_device *dev)
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static int stmmac_phy_setup(struct stmmac_priv *priv)
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{
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struct stmmac_mdio_bus_data *mdio_bus_data = priv->plat->mdio_bus_data;
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struct fwnode_handle *fwnode = of_fwnode_handle(priv->plat->phylink_node);
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int mode = priv->plat->phy_interface;
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struct phylink *phylink;
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@ -1240,8 +1222,7 @@ static int stmmac_phy_setup(struct stmmac_priv *priv)
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priv->phylink_config.dev = &priv->dev->dev;
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priv->phylink_config.type = PHYLINK_NETDEV;
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priv->phylink_config.pcs_poll = true;
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priv->phylink_config.ovr_an_inband =
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priv->plat->mdio_bus_data->xpcs_an_inband;
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priv->phylink_config.ovr_an_inband = mdio_bus_data->xpcs_an_inband;
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if (!fwnode)
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fwnode = dev_fwnode(priv->device);
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@ -1251,6 +1232,12 @@ static int stmmac_phy_setup(struct stmmac_priv *priv)
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if (IS_ERR(phylink))
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return PTR_ERR(phylink);
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if (mdio_bus_data->has_xpcs) {
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struct mdio_xpcs_args *xpcs = priv->hw->xpcs;
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phylink_set_pcs(phylink, &xpcs->pcs);
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}
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priv->phylink = phylink;
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return 0;
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}
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@ -3638,6 +3625,7 @@ static int stmmac_request_irq(struct net_device *dev)
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int stmmac_open(struct net_device *dev)
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{
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struct stmmac_priv *priv = netdev_priv(dev);
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int mode = priv->plat->phy_interface;
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int bfsize = 0;
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u32 chan;
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int ret;
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@ -3650,7 +3638,8 @@ int stmmac_open(struct net_device *dev)
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if (priv->hw->pcs != STMMAC_PCS_TBI &&
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priv->hw->pcs != STMMAC_PCS_RTBI &&
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priv->hw->xpcs_args.an_mode != DW_AN_C73) {
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(!priv->hw->xpcs ||
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xpcs_get_an_mode(priv->hw->xpcs, mode) != DW_AN_C73)) {
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ret = stmmac_init_phy(dev);
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if (ret) {
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netdev_err(priv->dev,
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@ -444,14 +444,6 @@ int stmmac_mdio_register(struct net_device *ndev)
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max_addr = PHY_MAX_ADDR;
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}
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if (mdio_bus_data->has_xpcs) {
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priv->hw->xpcs = mdio_xpcs_get_ops();
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if (!priv->hw->xpcs) {
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err = -ENODEV;
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goto bus_register_fail;
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}
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}
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if (mdio_bus_data->needs_reset)
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new_bus->reset = &stmmac_mdio_reset;
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@ -510,25 +502,27 @@ int stmmac_mdio_register(struct net_device *ndev)
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}
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/* Try to probe the XPCS by scanning all addresses. */
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if (priv->hw->xpcs) {
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struct mdio_xpcs_args *xpcs = &priv->hw->xpcs_args;
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int ret, mode = priv->plat->phy_interface;
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max_addr = PHY_MAX_ADDR;
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if (mdio_bus_data->has_xpcs) {
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int mode = priv->plat->phy_interface;
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struct mdio_device *mdiodev;
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struct mdio_xpcs_args *xpcs;
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xpcs->bus = new_bus;
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for (addr = 0; addr < PHY_MAX_ADDR; addr++) {
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mdiodev = mdio_device_create(new_bus, addr);
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if (IS_ERR(mdiodev))
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continue;
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found = 0;
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for (addr = 0; addr < max_addr; addr++) {
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xpcs->addr = addr;
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ret = stmmac_xpcs_probe(priv, xpcs, mode);
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if (!ret) {
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found = 1;
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break;
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xpcs = xpcs_create(mdiodev, mode);
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if (IS_ERR_OR_NULL(xpcs)) {
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mdio_device_free(mdiodev);
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continue;
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}
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priv->hw->xpcs = xpcs;
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break;
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}
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if (!found && !mdio_node) {
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if (!priv->hw->xpcs) {
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dev_warn(dev, "No XPCS found\n");
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err = -ENODEV;
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goto no_xpcs_found;
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@ -560,6 +554,11 @@ int stmmac_mdio_unregister(struct net_device *ndev)
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if (!priv->mii)
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return 0;
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if (priv->hw->xpcs) {
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mdio_device_free(priv->hw->xpcs->mdiodev);
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xpcs_destroy(priv->hw->xpcs);
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}
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mdiobus_unregister(priv->mii);
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priv->mii->priv = NULL;
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mdiobus_free(priv->mii);
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@ -12,10 +12,7 @@
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#include <linux/phylink.h>
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#include <linux/workqueue.h>
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#define SYNOPSYS_XPCS_USXGMII_ID 0x7996ced0
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#define SYNOPSYS_XPCS_10GKR_ID 0x7996ced0
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#define SYNOPSYS_XPCS_XLGMII_ID 0x7996ced0
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#define SYNOPSYS_XPCS_SGMII_ID 0x7996ced0
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#define SYNOPSYS_XPCS_ID 0x7996ced0
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#define SYNOPSYS_XPCS_MASK 0xffffffff
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/* Vendor regs access */
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@ -103,6 +100,9 @@
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/* VR MII EEE Control 1 defines */
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#define DW_VR_MII_EEE_TRN_LPI BIT(0) /* Transparent Mode Enable */
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#define phylink_pcs_to_xpcs(pl_pcs) \
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container_of((pl_pcs), struct mdio_xpcs_args, pcs)
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static const int xpcs_usxgmii_features[] = {
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ETHTOOL_LINK_MODE_Pause_BIT,
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ETHTOOL_LINK_MODE_Asym_Pause_BIT,
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@ -163,70 +163,100 @@ static const int xpcs_sgmii_features[] = {
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static const phy_interface_t xpcs_usxgmii_interfaces[] = {
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PHY_INTERFACE_MODE_USXGMII,
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PHY_INTERFACE_MODE_MAX,
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};
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static const phy_interface_t xpcs_10gkr_interfaces[] = {
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PHY_INTERFACE_MODE_10GKR,
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PHY_INTERFACE_MODE_MAX,
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};
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static const phy_interface_t xpcs_xlgmii_interfaces[] = {
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PHY_INTERFACE_MODE_XLGMII,
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PHY_INTERFACE_MODE_MAX,
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};
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static const phy_interface_t xpcs_sgmii_interfaces[] = {
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PHY_INTERFACE_MODE_SGMII,
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PHY_INTERFACE_MODE_MAX,
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};
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static struct xpcs_id {
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u32 id;
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u32 mask;
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enum {
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DW_XPCS_USXGMII,
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DW_XPCS_10GKR,
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DW_XPCS_XLGMII,
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DW_XPCS_SGMII,
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DW_XPCS_INTERFACE_MAX,
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};
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struct xpcs_compat {
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const int *supported;
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const phy_interface_t *interface;
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int num_interfaces;
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int an_mode;
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} xpcs_id_list[] = {
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{
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.id = SYNOPSYS_XPCS_USXGMII_ID,
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.mask = SYNOPSYS_XPCS_MASK,
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.supported = xpcs_usxgmii_features,
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.interface = xpcs_usxgmii_interfaces,
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.an_mode = DW_AN_C73,
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}, {
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.id = SYNOPSYS_XPCS_10GKR_ID,
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.mask = SYNOPSYS_XPCS_MASK,
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.supported = xpcs_10gkr_features,
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.interface = xpcs_10gkr_interfaces,
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.an_mode = DW_AN_C73,
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}, {
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.id = SYNOPSYS_XPCS_XLGMII_ID,
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.mask = SYNOPSYS_XPCS_MASK,
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.supported = xpcs_xlgmii_features,
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.interface = xpcs_xlgmii_interfaces,
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.an_mode = DW_AN_C73,
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}, {
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.id = SYNOPSYS_XPCS_SGMII_ID,
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.mask = SYNOPSYS_XPCS_MASK,
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.supported = xpcs_sgmii_features,
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.interface = xpcs_sgmii_interfaces,
|
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.an_mode = DW_AN_C37_SGMII,
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},
|
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};
|
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|
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struct xpcs_id {
|
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u32 id;
|
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u32 mask;
|
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const struct xpcs_compat *compat;
|
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};
|
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|
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static const struct xpcs_compat *xpcs_find_compat(const struct xpcs_id *id,
|
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phy_interface_t interface)
|
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{
|
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int i, j;
|
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|
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for (i = 0; i < DW_XPCS_INTERFACE_MAX; i++) {
|
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const struct xpcs_compat *compat = &id->compat[i];
|
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|
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for (j = 0; j < compat->num_interfaces; j++)
|
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if (compat->interface[j] == interface)
|
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return compat;
|
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}
|
||||
|
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return NULL;
|
||||
}
|
||||
|
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int xpcs_get_an_mode(struct mdio_xpcs_args *xpcs, phy_interface_t interface)
|
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{
|
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const struct xpcs_compat *compat;
|
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|
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compat = xpcs_find_compat(xpcs->id, interface);
|
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if (!compat)
|
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return -ENODEV;
|
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|
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return compat->an_mode;
|
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}
|
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EXPORT_SYMBOL_GPL(xpcs_get_an_mode);
|
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|
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static bool __xpcs_linkmode_supported(const struct xpcs_compat *compat,
|
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enum ethtool_link_mode_bit_indices linkmode)
|
||||
{
|
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int i;
|
||||
|
||||
for (i = 0; compat->supported[i] != __ETHTOOL_LINK_MODE_MASK_NBITS; i++)
|
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if (compat->supported[i] == linkmode)
|
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return true;
|
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|
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return false;
|
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}
|
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|
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#define xpcs_linkmode_supported(compat, mode) \
|
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__xpcs_linkmode_supported(compat, ETHTOOL_LINK_MODE_ ## mode ## _BIT)
|
||||
|
||||
static int xpcs_read(struct mdio_xpcs_args *xpcs, int dev, u32 reg)
|
||||
{
|
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u32 reg_addr = MII_ADDR_C45 | dev << 16 | reg;
|
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u32 reg_addr = mdiobus_c45_addr(dev, reg);
|
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struct mii_bus *bus = xpcs->mdiodev->bus;
|
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int addr = xpcs->mdiodev->addr;
|
||||
|
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return mdiobus_read(xpcs->bus, xpcs->addr, reg_addr);
|
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return mdiobus_read(bus, addr, reg_addr);
|
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}
|
||||
|
||||
static int xpcs_write(struct mdio_xpcs_args *xpcs, int dev, u32 reg, u16 val)
|
||||
{
|
||||
u32 reg_addr = MII_ADDR_C45 | dev << 16 | reg;
|
||||
u32 reg_addr = mdiobus_c45_addr(dev, reg);
|
||||
struct mii_bus *bus = xpcs->mdiodev->bus;
|
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int addr = xpcs->mdiodev->addr;
|
||||
|
||||
return mdiobus_write(xpcs->bus, xpcs->addr, reg_addr, val);
|
||||
return mdiobus_write(bus, addr, reg_addr, val);
|
||||
}
|
||||
|
||||
static int xpcs_read_vendor(struct mdio_xpcs_args *xpcs, int dev, u32 reg)
|
||||
|
|
@ -266,11 +296,12 @@ static int xpcs_poll_reset(struct mdio_xpcs_args *xpcs, int dev)
|
|||
return (ret & MDIO_CTRL1_RESET) ? -ETIMEDOUT : 0;
|
||||
}
|
||||
|
||||
static int xpcs_soft_reset(struct mdio_xpcs_args *xpcs)
|
||||
static int xpcs_soft_reset(struct mdio_xpcs_args *xpcs,
|
||||
const struct xpcs_compat *compat)
|
||||
{
|
||||
int ret, dev;
|
||||
|
||||
switch (xpcs->an_mode) {
|
||||
switch (compat->an_mode) {
|
||||
case DW_AN_C73:
|
||||
dev = MDIO_MMD_PCS;
|
||||
break;
|
||||
|
|
@ -291,7 +322,7 @@ static int xpcs_soft_reset(struct mdio_xpcs_args *xpcs)
|
|||
#define xpcs_warn(__xpcs, __state, __args...) \
|
||||
({ \
|
||||
if ((__state)->link) \
|
||||
dev_warn(&(__xpcs)->bus->dev, ##__args); \
|
||||
dev_warn(&(__xpcs)->mdiodev->dev, ##__args); \
|
||||
})
|
||||
|
||||
static int xpcs_read_fault_c73(struct mdio_xpcs_args *xpcs,
|
||||
|
|
@ -385,7 +416,7 @@ static int xpcs_get_max_usxgmii_speed(const unsigned long *supported)
|
|||
return max;
|
||||
}
|
||||
|
||||
static int xpcs_config_usxgmii(struct mdio_xpcs_args *xpcs, int speed)
|
||||
static void xpcs_config_usxgmii(struct mdio_xpcs_args *xpcs, int speed)
|
||||
{
|
||||
int ret, speed_sel;
|
||||
|
||||
|
|
@ -410,36 +441,44 @@ static int xpcs_config_usxgmii(struct mdio_xpcs_args *xpcs, int speed)
|
|||
break;
|
||||
default:
|
||||
/* Nothing to do here */
|
||||
return -EINVAL;
|
||||
return;
|
||||
}
|
||||
|
||||
ret = xpcs_read_vpcs(xpcs, MDIO_CTRL1);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
goto out;
|
||||
|
||||
ret = xpcs_write_vpcs(xpcs, MDIO_CTRL1, ret | DW_USXGMII_EN);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
goto out;
|
||||
|
||||
ret = xpcs_read(xpcs, MDIO_MMD_VEND2, MDIO_CTRL1);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
goto out;
|
||||
|
||||
ret &= ~DW_USXGMII_SS_MASK;
|
||||
ret |= speed_sel | DW_USXGMII_FULL;
|
||||
|
||||
ret = xpcs_write(xpcs, MDIO_MMD_VEND2, MDIO_CTRL1, ret);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
goto out;
|
||||
|
||||
ret = xpcs_read_vpcs(xpcs, MDIO_CTRL1);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
goto out;
|
||||
|
||||
return xpcs_write_vpcs(xpcs, MDIO_CTRL1, ret | DW_USXGMII_RST);
|
||||
ret = xpcs_write_vpcs(xpcs, MDIO_CTRL1, ret | DW_USXGMII_RST);
|
||||
if (ret < 0)
|
||||
goto out;
|
||||
|
||||
return;
|
||||
|
||||
out:
|
||||
pr_err("%s: XPCS access returned %pe\n", __func__, ERR_PTR(ret));
|
||||
}
|
||||
|
||||
static int _xpcs_config_aneg_c73(struct mdio_xpcs_args *xpcs)
|
||||
static int _xpcs_config_aneg_c73(struct mdio_xpcs_args *xpcs,
|
||||
const struct xpcs_compat *compat)
|
||||
{
|
||||
int ret, adv;
|
||||
|
||||
|
|
@ -451,7 +490,7 @@ static int _xpcs_config_aneg_c73(struct mdio_xpcs_args *xpcs)
|
|||
|
||||
/* SR_AN_ADV3 */
|
||||
adv = 0;
|
||||
if (phylink_test(xpcs->supported, 2500baseX_Full))
|
||||
if (xpcs_linkmode_supported(compat, 2500baseX_Full))
|
||||
adv |= DW_C73_2500KX;
|
||||
|
||||
/* TODO: 5000baseKR */
|
||||
|
|
@ -462,11 +501,11 @@ static int _xpcs_config_aneg_c73(struct mdio_xpcs_args *xpcs)
|
|||
|
||||
/* SR_AN_ADV2 */
|
||||
adv = 0;
|
||||
if (phylink_test(xpcs->supported, 1000baseKX_Full))
|
||||
if (xpcs_linkmode_supported(compat, 1000baseKX_Full))
|
||||
adv |= DW_C73_1000KX;
|
||||
if (phylink_test(xpcs->supported, 10000baseKX4_Full))
|
||||
if (xpcs_linkmode_supported(compat, 10000baseKX4_Full))
|
||||
adv |= DW_C73_10000KX4;
|
||||
if (phylink_test(xpcs->supported, 10000baseKR_Full))
|
||||
if (xpcs_linkmode_supported(compat, 10000baseKR_Full))
|
||||
adv |= DW_C73_10000KR;
|
||||
|
||||
ret = xpcs_write(xpcs, MDIO_MMD_AN, DW_SR_AN_ADV2, adv);
|
||||
|
|
@ -475,19 +514,20 @@ static int _xpcs_config_aneg_c73(struct mdio_xpcs_args *xpcs)
|
|||
|
||||
/* SR_AN_ADV1 */
|
||||
adv = DW_C73_AN_ADV_SF;
|
||||
if (phylink_test(xpcs->supported, Pause))
|
||||
if (xpcs_linkmode_supported(compat, Pause))
|
||||
adv |= DW_C73_PAUSE;
|
||||
if (phylink_test(xpcs->supported, Asym_Pause))
|
||||
if (xpcs_linkmode_supported(compat, Asym_Pause))
|
||||
adv |= DW_C73_ASYM_PAUSE;
|
||||
|
||||
return xpcs_write(xpcs, MDIO_MMD_AN, DW_SR_AN_ADV1, adv);
|
||||
}
|
||||
|
||||
static int xpcs_config_aneg_c73(struct mdio_xpcs_args *xpcs)
|
||||
static int xpcs_config_aneg_c73(struct mdio_xpcs_args *xpcs,
|
||||
const struct xpcs_compat *compat)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = _xpcs_config_aneg_c73(xpcs);
|
||||
ret = _xpcs_config_aneg_c73(xpcs, compat);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
|
|
@ -501,7 +541,8 @@ static int xpcs_config_aneg_c73(struct mdio_xpcs_args *xpcs)
|
|||
}
|
||||
|
||||
static int xpcs_aneg_done_c73(struct mdio_xpcs_args *xpcs,
|
||||
struct phylink_link_state *state)
|
||||
struct phylink_link_state *state,
|
||||
const struct xpcs_compat *compat)
|
||||
{
|
||||
int ret;
|
||||
|
||||
|
|
@ -516,7 +557,7 @@ static int xpcs_aneg_done_c73(struct mdio_xpcs_args *xpcs,
|
|||
|
||||
/* Check if Aneg outcome is valid */
|
||||
if (!(ret & DW_C73_AN_ADV_SF)) {
|
||||
xpcs_config_aneg_c73(xpcs);
|
||||
xpcs_config_aneg_c73(xpcs, compat);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -658,17 +699,38 @@ static void xpcs_resolve_pma(struct mdio_xpcs_args *xpcs,
|
|||
}
|
||||
}
|
||||
|
||||
static int xpcs_validate(struct mdio_xpcs_args *xpcs,
|
||||
unsigned long *supported,
|
||||
struct phylink_link_state *state)
|
||||
void xpcs_validate(struct mdio_xpcs_args *xpcs, unsigned long *supported,
|
||||
struct phylink_link_state *state)
|
||||
{
|
||||
linkmode_and(supported, supported, xpcs->supported);
|
||||
linkmode_and(state->advertising, state->advertising, xpcs->supported);
|
||||
return 0;
|
||||
}
|
||||
__ETHTOOL_DECLARE_LINK_MODE_MASK(xpcs_supported);
|
||||
const struct xpcs_compat *compat;
|
||||
int i;
|
||||
|
||||
static int xpcs_config_eee(struct mdio_xpcs_args *xpcs, int mult_fact_100ns,
|
||||
int enable)
|
||||
/* phylink expects us to report all supported modes with
|
||||
* PHY_INTERFACE_MODE_NA, just don't limit the supported and
|
||||
* advertising masks and exit.
|
||||
*/
|
||||
if (state->interface == PHY_INTERFACE_MODE_NA)
|
||||
return;
|
||||
|
||||
bitmap_zero(xpcs_supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
|
||||
|
||||
compat = xpcs_find_compat(xpcs->id, state->interface);
|
||||
|
||||
/* Populate the supported link modes for this
|
||||
* PHY interface type
|
||||
*/
|
||||
if (compat)
|
||||
for (i = 0; compat->supported[i] != __ETHTOOL_LINK_MODE_MASK_NBITS; i++)
|
||||
set_bit(compat->supported[i], xpcs_supported);
|
||||
|
||||
linkmode_and(supported, supported, xpcs_supported);
|
||||
linkmode_and(state->advertising, state->advertising, xpcs_supported);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(xpcs_validate);
|
||||
|
||||
int xpcs_config_eee(struct mdio_xpcs_args *xpcs, int mult_fact_100ns,
|
||||
int enable)
|
||||
{
|
||||
int ret;
|
||||
|
||||
|
|
@ -699,6 +761,7 @@ static int xpcs_config_eee(struct mdio_xpcs_args *xpcs, int mult_fact_100ns,
|
|||
ret |= DW_VR_MII_EEE_TRN_LPI;
|
||||
return xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_EEE_MCTRL1, ret);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(xpcs_config_eee);
|
||||
|
||||
static int xpcs_config_aneg_c37_sgmii(struct mdio_xpcs_args *xpcs)
|
||||
{
|
||||
|
|
@ -741,15 +804,20 @@ static int xpcs_config_aneg_c37_sgmii(struct mdio_xpcs_args *xpcs)
|
|||
return xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_DIG_CTRL1, ret);
|
||||
}
|
||||
|
||||
static int xpcs_config(struct mdio_xpcs_args *xpcs,
|
||||
const struct phylink_link_state *state)
|
||||
static int xpcs_do_config(struct mdio_xpcs_args *xpcs,
|
||||
phy_interface_t interface, unsigned int mode)
|
||||
{
|
||||
const struct xpcs_compat *compat;
|
||||
int ret;
|
||||
|
||||
switch (xpcs->an_mode) {
|
||||
compat = xpcs_find_compat(xpcs->id, interface);
|
||||
if (!compat)
|
||||
return -ENODEV;
|
||||
|
||||
switch (compat->an_mode) {
|
||||
case DW_AN_C73:
|
||||
if (state->an_enabled) {
|
||||
ret = xpcs_config_aneg_c73(xpcs);
|
||||
if (phylink_autoneg_inband(mode)) {
|
||||
ret = xpcs_config_aneg_c73(xpcs, compat);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -766,8 +834,19 @@ static int xpcs_config(struct mdio_xpcs_args *xpcs,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int xpcs_config(struct phylink_pcs *pcs, unsigned int mode,
|
||||
phy_interface_t interface,
|
||||
const unsigned long *advertising,
|
||||
bool permit_pause_to_mac)
|
||||
{
|
||||
struct mdio_xpcs_args *xpcs = phylink_pcs_to_xpcs(pcs);
|
||||
|
||||
return xpcs_do_config(xpcs, interface, mode);
|
||||
}
|
||||
|
||||
static int xpcs_get_state_c73(struct mdio_xpcs_args *xpcs,
|
||||
struct phylink_link_state *state)
|
||||
struct phylink_link_state *state,
|
||||
const struct xpcs_compat *compat)
|
||||
{
|
||||
int ret;
|
||||
|
||||
|
|
@ -777,16 +856,16 @@ static int xpcs_get_state_c73(struct mdio_xpcs_args *xpcs,
|
|||
/* ... and then we check the faults. */
|
||||
ret = xpcs_read_fault_c73(xpcs, state);
|
||||
if (ret) {
|
||||
ret = xpcs_soft_reset(xpcs);
|
||||
ret = xpcs_soft_reset(xpcs, compat);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
state->link = 0;
|
||||
|
||||
return xpcs_config(xpcs, state);
|
||||
return xpcs_do_config(xpcs, state->interface, MLO_AN_INBAND);
|
||||
}
|
||||
|
||||
if (state->an_enabled && xpcs_aneg_done_c73(xpcs, state)) {
|
||||
if (state->an_enabled && xpcs_aneg_done_c73(xpcs, state, compat)) {
|
||||
state->an_complete = true;
|
||||
xpcs_read_lpa_c73(xpcs, state);
|
||||
xpcs_resolve_lpa_c73(xpcs, state);
|
||||
|
|
@ -840,36 +919,45 @@ static int xpcs_get_state_c37_sgmii(struct mdio_xpcs_args *xpcs,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int xpcs_get_state(struct mdio_xpcs_args *xpcs,
|
||||
struct phylink_link_state *state)
|
||||
static void xpcs_get_state(struct phylink_pcs *pcs,
|
||||
struct phylink_link_state *state)
|
||||
{
|
||||
struct mdio_xpcs_args *xpcs = phylink_pcs_to_xpcs(pcs);
|
||||
const struct xpcs_compat *compat;
|
||||
int ret;
|
||||
|
||||
switch (xpcs->an_mode) {
|
||||
compat = xpcs_find_compat(xpcs->id, state->interface);
|
||||
if (!compat)
|
||||
return;
|
||||
|
||||
switch (compat->an_mode) {
|
||||
case DW_AN_C73:
|
||||
ret = xpcs_get_state_c73(xpcs, state);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = xpcs_get_state_c73(xpcs, state, compat);
|
||||
if (ret) {
|
||||
pr_err("xpcs_get_state_c73 returned %pe\n",
|
||||
ERR_PTR(ret));
|
||||
return;
|
||||
}
|
||||
break;
|
||||
case DW_AN_C37_SGMII:
|
||||
ret = xpcs_get_state_c37_sgmii(xpcs, state);
|
||||
if (ret)
|
||||
return ret;
|
||||
if (ret) {
|
||||
pr_err("xpcs_get_state_c37_sgmii returned %pe\n",
|
||||
ERR_PTR(ret));
|
||||
}
|
||||
break;
|
||||
default:
|
||||
return -1;
|
||||
return;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int xpcs_link_up(struct mdio_xpcs_args *xpcs, int speed,
|
||||
phy_interface_t interface)
|
||||
static void xpcs_link_up(struct phylink_pcs *pcs, unsigned int mode,
|
||||
phy_interface_t interface, int speed, int duplex)
|
||||
{
|
||||
struct mdio_xpcs_args *xpcs = phylink_pcs_to_xpcs(pcs);
|
||||
|
||||
if (interface == PHY_INTERFACE_MODE_USXGMII)
|
||||
return xpcs_config_usxgmii(xpcs, speed);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static u32 xpcs_get_id(struct mdio_xpcs_args *xpcs)
|
||||
|
|
@ -910,61 +998,100 @@ static u32 xpcs_get_id(struct mdio_xpcs_args *xpcs)
|
|||
return 0xffffffff;
|
||||
}
|
||||
|
||||
static bool xpcs_check_features(struct mdio_xpcs_args *xpcs,
|
||||
struct xpcs_id *match,
|
||||
phy_interface_t interface)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; match->interface[i] != PHY_INTERFACE_MODE_MAX; i++) {
|
||||
if (match->interface[i] == interface)
|
||||
break;
|
||||
}
|
||||
|
||||
if (match->interface[i] == PHY_INTERFACE_MODE_MAX)
|
||||
return false;
|
||||
|
||||
for (i = 0; match->supported[i] != __ETHTOOL_LINK_MODE_MASK_NBITS; i++)
|
||||
set_bit(match->supported[i], xpcs->supported);
|
||||
|
||||
xpcs->an_mode = match->an_mode;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
static int xpcs_probe(struct mdio_xpcs_args *xpcs, phy_interface_t interface)
|
||||
{
|
||||
u32 xpcs_id = xpcs_get_id(xpcs);
|
||||
struct xpcs_id *match = NULL;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(xpcs_id_list); i++) {
|
||||
struct xpcs_id *entry = &xpcs_id_list[i];
|
||||
|
||||
if ((xpcs_id & entry->mask) == entry->id) {
|
||||
match = entry;
|
||||
|
||||
if (xpcs_check_features(xpcs, match, interface))
|
||||
return xpcs_soft_reset(xpcs);
|
||||
}
|
||||
}
|
||||
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
static struct mdio_xpcs_ops xpcs_ops = {
|
||||
.validate = xpcs_validate,
|
||||
.config = xpcs_config,
|
||||
.get_state = xpcs_get_state,
|
||||
.link_up = xpcs_link_up,
|
||||
.probe = xpcs_probe,
|
||||
.config_eee = xpcs_config_eee,
|
||||
static const struct xpcs_compat synopsys_xpcs_compat[DW_XPCS_INTERFACE_MAX] = {
|
||||
[DW_XPCS_USXGMII] = {
|
||||
.supported = xpcs_usxgmii_features,
|
||||
.interface = xpcs_usxgmii_interfaces,
|
||||
.num_interfaces = ARRAY_SIZE(xpcs_usxgmii_interfaces),
|
||||
.an_mode = DW_AN_C73,
|
||||
},
|
||||
[DW_XPCS_10GKR] = {
|
||||
.supported = xpcs_10gkr_features,
|
||||
.interface = xpcs_10gkr_interfaces,
|
||||
.num_interfaces = ARRAY_SIZE(xpcs_10gkr_interfaces),
|
||||
.an_mode = DW_AN_C73,
|
||||
},
|
||||
[DW_XPCS_XLGMII] = {
|
||||
.supported = xpcs_xlgmii_features,
|
||||
.interface = xpcs_xlgmii_interfaces,
|
||||
.num_interfaces = ARRAY_SIZE(xpcs_xlgmii_interfaces),
|
||||
.an_mode = DW_AN_C73,
|
||||
},
|
||||
[DW_XPCS_SGMII] = {
|
||||
.supported = xpcs_sgmii_features,
|
||||
.interface = xpcs_sgmii_interfaces,
|
||||
.num_interfaces = ARRAY_SIZE(xpcs_sgmii_interfaces),
|
||||
.an_mode = DW_AN_C37_SGMII,
|
||||
},
|
||||
};
|
||||
|
||||
struct mdio_xpcs_ops *mdio_xpcs_get_ops(void)
|
||||
static const struct xpcs_id xpcs_id_list[] = {
|
||||
{
|
||||
.id = SYNOPSYS_XPCS_ID,
|
||||
.mask = SYNOPSYS_XPCS_MASK,
|
||||
.compat = synopsys_xpcs_compat,
|
||||
},
|
||||
};
|
||||
|
||||
static const struct phylink_pcs_ops xpcs_phylink_ops = {
|
||||
.pcs_config = xpcs_config,
|
||||
.pcs_get_state = xpcs_get_state,
|
||||
.pcs_link_up = xpcs_link_up,
|
||||
};
|
||||
|
||||
struct mdio_xpcs_args *xpcs_create(struct mdio_device *mdiodev,
|
||||
phy_interface_t interface)
|
||||
{
|
||||
return &xpcs_ops;
|
||||
struct mdio_xpcs_args *xpcs;
|
||||
u32 xpcs_id;
|
||||
int i, ret;
|
||||
|
||||
xpcs = kzalloc(sizeof(*xpcs), GFP_KERNEL);
|
||||
if (!xpcs)
|
||||
return NULL;
|
||||
|
||||
xpcs->mdiodev = mdiodev;
|
||||
|
||||
xpcs_id = xpcs_get_id(xpcs);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(xpcs_id_list); i++) {
|
||||
const struct xpcs_id *entry = &xpcs_id_list[i];
|
||||
const struct xpcs_compat *compat;
|
||||
|
||||
if ((xpcs_id & entry->mask) != entry->id)
|
||||
continue;
|
||||
|
||||
xpcs->id = entry;
|
||||
|
||||
compat = xpcs_find_compat(entry, interface);
|
||||
if (!compat) {
|
||||
ret = -ENODEV;
|
||||
goto out;
|
||||
}
|
||||
|
||||
xpcs->pcs.ops = &xpcs_phylink_ops;
|
||||
xpcs->pcs.poll = true;
|
||||
|
||||
ret = xpcs_soft_reset(xpcs, compat);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
return xpcs;
|
||||
}
|
||||
|
||||
ret = -ENODEV;
|
||||
|
||||
out:
|
||||
kfree(xpcs);
|
||||
|
||||
return ERR_PTR(ret);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(mdio_xpcs_get_ops);
|
||||
EXPORT_SYMBOL_GPL(xpcs_create);
|
||||
|
||||
void xpcs_destroy(struct mdio_xpcs_args *xpcs)
|
||||
{
|
||||
kfree(xpcs);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(xpcs_destroy);
|
||||
|
||||
MODULE_LICENSE("GPL v2");
|
||||
|
|
|
|||
|
|
@ -14,35 +14,21 @@
|
|||
#define DW_AN_C73 1
|
||||
#define DW_AN_C37_SGMII 2
|
||||
|
||||
struct xpcs_id;
|
||||
|
||||
struct mdio_xpcs_args {
|
||||
__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
|
||||
struct mii_bus *bus;
|
||||
int addr;
|
||||
int an_mode;
|
||||
struct mdio_device *mdiodev;
|
||||
const struct xpcs_id *id;
|
||||
struct phylink_pcs pcs;
|
||||
};
|
||||
|
||||
struct mdio_xpcs_ops {
|
||||
int (*validate)(struct mdio_xpcs_args *xpcs,
|
||||
unsigned long *supported,
|
||||
struct phylink_link_state *state);
|
||||
int (*config)(struct mdio_xpcs_args *xpcs,
|
||||
const struct phylink_link_state *state);
|
||||
int (*get_state)(struct mdio_xpcs_args *xpcs,
|
||||
struct phylink_link_state *state);
|
||||
int (*link_up)(struct mdio_xpcs_args *xpcs, int speed,
|
||||
phy_interface_t interface);
|
||||
int (*probe)(struct mdio_xpcs_args *xpcs, phy_interface_t interface);
|
||||
int (*config_eee)(struct mdio_xpcs_args *xpcs, int mult_fact_100ns,
|
||||
int enable);
|
||||
};
|
||||
|
||||
#if IS_ENABLED(CONFIG_PCS_XPCS)
|
||||
struct mdio_xpcs_ops *mdio_xpcs_get_ops(void);
|
||||
#else
|
||||
static inline struct mdio_xpcs_ops *mdio_xpcs_get_ops(void)
|
||||
{
|
||||
return NULL;
|
||||
}
|
||||
#endif
|
||||
int xpcs_get_an_mode(struct mdio_xpcs_args *xpcs, phy_interface_t interface);
|
||||
void xpcs_validate(struct mdio_xpcs_args *xpcs, unsigned long *supported,
|
||||
struct phylink_link_state *state);
|
||||
int xpcs_config_eee(struct mdio_xpcs_args *xpcs, int mult_fact_100ns,
|
||||
int enable);
|
||||
struct mdio_xpcs_args *xpcs_create(struct mdio_device *mdiodev,
|
||||
phy_interface_t interface);
|
||||
void xpcs_destroy(struct mdio_xpcs_args *xpcs);
|
||||
|
||||
#endif /* __LINUX_PCS_XPCS_H */
|
||||
|
|
|
|||
Loading…
Reference in New Issue