staging:vt6655:mac: Whitespace cleanups
Neatening only. git diff -w shows no differences. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
d82adcabc6
commit
c3504bfd11
File diff suppressed because it is too large
Load Diff
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@ -604,20 +604,20 @@
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#define MISCFIFO_SYNDATASIZE 21
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// enabled mask value of irq
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#define IMR_MASK_VALUE (IMR_SOFTTIMER1 | \
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IMR_RXDMA1 | \
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IMR_RXNOBUF | \
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IMR_MIBNEARFULL | \
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IMR_SOFTINT | \
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IMR_FETALERR | \
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IMR_WATCHDOG | \
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IMR_SOFTTIMER | \
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IMR_GPIO | \
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IMR_TBTT | \
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IMR_RXDMA0 | \
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IMR_BNTX | \
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IMR_AC0DMA | \
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IMR_TXDMA0)
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#define IMR_MASK_VALUE (IMR_SOFTTIMER1 | \
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IMR_RXDMA1 | \
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IMR_RXNOBUF | \
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IMR_MIBNEARFULL | \
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IMR_SOFTINT | \
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IMR_FETALERR | \
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IMR_WATCHDOG | \
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IMR_SOFTTIMER | \
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IMR_GPIO | \
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IMR_TBTT | \
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IMR_RXDMA0 | \
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IMR_BNTX | \
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IMR_AC0DMA | \
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IMR_TXDMA0)
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// max time out delay time
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#define W_MAX_TIMEOUT 0xFFF0U //
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@ -637,412 +637,412 @@
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/*--------------------- Export Macros ------------------------------*/
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#define MACvRegBitsOn(dwIoBase, byRegOfs, byBits) \
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{ \
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unsigned char byData; \
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VNSvInPortB(dwIoBase + byRegOfs, &byData); \
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VNSvOutPortB(dwIoBase + byRegOfs, byData | (byBits)); \
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}
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#define MACvRegBitsOn(dwIoBase, byRegOfs, byBits) \
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{ \
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unsigned char byData; \
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VNSvInPortB(dwIoBase + byRegOfs, &byData); \
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VNSvOutPortB(dwIoBase + byRegOfs, byData | (byBits)); \
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}
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#define MACvWordRegBitsOn(dwIoBase, byRegOfs, wBits) \
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{ \
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unsigned short wData; \
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VNSvInPortW(dwIoBase + byRegOfs, &wData); \
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VNSvOutPortW(dwIoBase + byRegOfs, wData | (wBits)); \
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}
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#define MACvWordRegBitsOn(dwIoBase, byRegOfs, wBits) \
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{ \
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unsigned short wData; \
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VNSvInPortW(dwIoBase + byRegOfs, &wData); \
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VNSvOutPortW(dwIoBase + byRegOfs, wData | (wBits)); \
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}
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#define MACvDWordRegBitsOn(dwIoBase, byRegOfs, dwBits) \
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{ \
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unsigned long dwData; \
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VNSvInPortD(dwIoBase + byRegOfs, &dwData); \
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VNSvOutPortD(dwIoBase + byRegOfs, dwData | (dwBits)); \
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}
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#define MACvDWordRegBitsOn(dwIoBase, byRegOfs, dwBits) \
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{ \
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unsigned long dwData; \
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VNSvInPortD(dwIoBase + byRegOfs, &dwData); \
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VNSvOutPortD(dwIoBase + byRegOfs, dwData | (dwBits)); \
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}
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#define MACvRegBitsOnEx(dwIoBase, byRegOfs, byMask, byBits) \
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{ \
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unsigned char byData; \
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VNSvInPortB(dwIoBase + byRegOfs, &byData); \
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byData &= byMask; \
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VNSvOutPortB(dwIoBase + byRegOfs, byData | (byBits)); \
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}
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#define MACvRegBitsOnEx(dwIoBase, byRegOfs, byMask, byBits) \
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{ \
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unsigned char byData; \
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VNSvInPortB(dwIoBase + byRegOfs, &byData); \
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byData &= byMask; \
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VNSvOutPortB(dwIoBase + byRegOfs, byData | (byBits)); \
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}
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#define MACvRegBitsOff(dwIoBase, byRegOfs, byBits) \
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{ \
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unsigned char byData; \
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VNSvInPortB(dwIoBase + byRegOfs, &byData); \
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VNSvOutPortB(dwIoBase + byRegOfs, byData & ~(byBits)); \
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}
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#define MACvRegBitsOff(dwIoBase, byRegOfs, byBits) \
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{ \
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unsigned char byData; \
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VNSvInPortB(dwIoBase + byRegOfs, &byData); \
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VNSvOutPortB(dwIoBase + byRegOfs, byData & ~(byBits)); \
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}
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#define MACvWordRegBitsOff(dwIoBase, byRegOfs, wBits) \
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{ \
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unsigned short wData; \
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VNSvInPortW(dwIoBase + byRegOfs, &wData); \
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VNSvOutPortW(dwIoBase + byRegOfs, wData & ~(wBits)); \
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}
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#define MACvWordRegBitsOff(dwIoBase, byRegOfs, wBits) \
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{ \
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unsigned short wData; \
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VNSvInPortW(dwIoBase + byRegOfs, &wData); \
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VNSvOutPortW(dwIoBase + byRegOfs, wData & ~(wBits)); \
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}
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#define MACvDWordRegBitsOff(dwIoBase, byRegOfs, dwBits) \
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{ \
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unsigned long dwData; \
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VNSvInPortD(dwIoBase + byRegOfs, &dwData); \
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VNSvOutPortD(dwIoBase + byRegOfs, dwData & ~(dwBits)); \
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}
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#define MACvDWordRegBitsOff(dwIoBase, byRegOfs, dwBits) \
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{ \
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unsigned long dwData; \
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VNSvInPortD(dwIoBase + byRegOfs, &dwData); \
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VNSvOutPortD(dwIoBase + byRegOfs, dwData & ~(dwBits)); \
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}
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#define MACvGetCurrRx0DescAddr(dwIoBase, pdwCurrDescAddr) \
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{ \
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VNSvInPortD(dwIoBase + MAC_REG_RXDMAPTR0, \
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(unsigned long *)pdwCurrDescAddr); \
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}
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#define MACvGetCurrRx0DescAddr(dwIoBase, pdwCurrDescAddr) \
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{ \
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VNSvInPortD(dwIoBase + MAC_REG_RXDMAPTR0, \
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(unsigned long *)pdwCurrDescAddr); \
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}
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#define MACvGetCurrRx1DescAddr(dwIoBase, pdwCurrDescAddr) \
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{ \
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VNSvInPortD(dwIoBase + MAC_REG_RXDMAPTR1, \
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(unsigned long *)pdwCurrDescAddr); \
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}
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#define MACvGetCurrRx1DescAddr(dwIoBase, pdwCurrDescAddr) \
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{ \
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VNSvInPortD(dwIoBase + MAC_REG_RXDMAPTR1, \
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(unsigned long *)pdwCurrDescAddr); \
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}
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#define MACvGetCurrTx0DescAddr(dwIoBase, pdwCurrDescAddr) \
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{ \
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VNSvInPortD(dwIoBase + MAC_REG_TXDMAPTR0, \
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(unsigned long *)pdwCurrDescAddr); \
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}
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#define MACvGetCurrTx0DescAddr(dwIoBase, pdwCurrDescAddr) \
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{ \
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VNSvInPortD(dwIoBase + MAC_REG_TXDMAPTR0, \
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(unsigned long *)pdwCurrDescAddr); \
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}
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#define MACvGetCurrAC0DescAddr(dwIoBase, pdwCurrDescAddr) \
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{ \
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VNSvInPortD(dwIoBase + MAC_REG_AC0DMAPTR, \
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(unsigned long *)pdwCurrDescAddr); \
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}
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#define MACvGetCurrAC0DescAddr(dwIoBase, pdwCurrDescAddr) \
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{ \
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VNSvInPortD(dwIoBase + MAC_REG_AC0DMAPTR, \
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(unsigned long *)pdwCurrDescAddr); \
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}
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#define MACvGetCurrSyncDescAddr(dwIoBase, pdwCurrDescAddr) \
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{ \
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VNSvInPortD(dwIoBase + MAC_REG_SYNCDMAPTR, \
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(unsigned long *)pdwCurrDescAddr); \
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}
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#define MACvGetCurrSyncDescAddr(dwIoBase, pdwCurrDescAddr) \
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{ \
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VNSvInPortD(dwIoBase + MAC_REG_SYNCDMAPTR, \
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(unsigned long *)pdwCurrDescAddr); \
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}
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#define MACvGetCurrATIMDescAddr(dwIoBase, pdwCurrDescAddr) \
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{ \
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VNSvInPortD(dwIoBase + MAC_REG_ATIMDMAPTR, \
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(unsigned long *)pdwCurrDescAddr); \
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} \
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#define MACvGetCurrATIMDescAddr(dwIoBase, pdwCurrDescAddr) \
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{ \
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VNSvInPortD(dwIoBase + MAC_REG_ATIMDMAPTR, \
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(unsigned long *)pdwCurrDescAddr); \
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} \
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// set the chip with current BCN tx descriptor address
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#define MACvSetCurrBCNTxDescAddr(dwIoBase, dwCurrDescAddr) \
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{ \
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VNSvOutPortD(dwIoBase + MAC_REG_BCNDMAPTR, \
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dwCurrDescAddr); \
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}
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#define MACvSetCurrBCNTxDescAddr(dwIoBase, dwCurrDescAddr) \
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{ \
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VNSvOutPortD(dwIoBase + MAC_REG_BCNDMAPTR, \
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dwCurrDescAddr); \
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}
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// set the chip with current BCN length
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#define MACvSetCurrBCNLength(dwIoBase, wCurrBCNLength) \
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{ \
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VNSvOutPortW(dwIoBase + MAC_REG_BCNDMACTL+2, \
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wCurrBCNLength); \
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}
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#define MACvSetCurrBCNLength(dwIoBase, wCurrBCNLength) \
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{ \
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VNSvOutPortW(dwIoBase + MAC_REG_BCNDMACTL+2, \
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wCurrBCNLength); \
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}
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#define MACvReadBSSIDAddress(dwIoBase, pbyEtherAddr) \
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{ \
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VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 1); \
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VNSvInPortB(dwIoBase + MAC_REG_BSSID0, \
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(unsigned char *)pbyEtherAddr); \
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VNSvInPortB(dwIoBase + MAC_REG_BSSID0 + 1, \
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pbyEtherAddr + 1); \
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VNSvInPortB(dwIoBase + MAC_REG_BSSID0 + 2, \
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pbyEtherAddr + 2); \
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VNSvInPortB(dwIoBase + MAC_REG_BSSID0 + 3, \
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pbyEtherAddr + 3); \
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VNSvInPortB(dwIoBase + MAC_REG_BSSID0 + 4, \
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pbyEtherAddr + 4); \
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VNSvInPortB(dwIoBase + MAC_REG_BSSID0 + 5, \
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pbyEtherAddr + 5); \
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VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 0); \
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}
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#define MACvReadBSSIDAddress(dwIoBase, pbyEtherAddr) \
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{ \
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VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 1); \
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VNSvInPortB(dwIoBase + MAC_REG_BSSID0, \
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(unsigned char *)pbyEtherAddr); \
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VNSvInPortB(dwIoBase + MAC_REG_BSSID0 + 1, \
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pbyEtherAddr + 1); \
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VNSvInPortB(dwIoBase + MAC_REG_BSSID0 + 2, \
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pbyEtherAddr + 2); \
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VNSvInPortB(dwIoBase + MAC_REG_BSSID0 + 3, \
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pbyEtherAddr + 3); \
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VNSvInPortB(dwIoBase + MAC_REG_BSSID0 + 4, \
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pbyEtherAddr + 4); \
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VNSvInPortB(dwIoBase + MAC_REG_BSSID0 + 5, \
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pbyEtherAddr + 5); \
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VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 0); \
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}
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#define MACvWriteBSSIDAddress(dwIoBase, pbyEtherAddr) \
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{ \
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VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 1); \
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VNSvOutPortB(dwIoBase + MAC_REG_BSSID0, \
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*(pbyEtherAddr)); \
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VNSvOutPortB(dwIoBase + MAC_REG_BSSID0 + 1, \
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*(pbyEtherAddr + 1)); \
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VNSvOutPortB(dwIoBase + MAC_REG_BSSID0 + 2, \
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*(pbyEtherAddr + 2)); \
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VNSvOutPortB(dwIoBase + MAC_REG_BSSID0 + 3, \
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*(pbyEtherAddr + 3)); \
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VNSvOutPortB(dwIoBase + MAC_REG_BSSID0 + 4, \
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*(pbyEtherAddr + 4)); \
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VNSvOutPortB(dwIoBase + MAC_REG_BSSID0 + 5, \
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*(pbyEtherAddr + 5)); \
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VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 0); \
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}
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#define MACvWriteBSSIDAddress(dwIoBase, pbyEtherAddr) \
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{ \
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VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 1); \
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VNSvOutPortB(dwIoBase + MAC_REG_BSSID0, \
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*(pbyEtherAddr)); \
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VNSvOutPortB(dwIoBase + MAC_REG_BSSID0 + 1, \
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*(pbyEtherAddr + 1)); \
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VNSvOutPortB(dwIoBase + MAC_REG_BSSID0 + 2, \
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*(pbyEtherAddr + 2)); \
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VNSvOutPortB(dwIoBase + MAC_REG_BSSID0 + 3, \
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*(pbyEtherAddr + 3)); \
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VNSvOutPortB(dwIoBase + MAC_REG_BSSID0 + 4, \
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*(pbyEtherAddr + 4)); \
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VNSvOutPortB(dwIoBase + MAC_REG_BSSID0 + 5, \
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*(pbyEtherAddr + 5)); \
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VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 0); \
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}
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#define MACvReadEtherAddress(dwIoBase, pbyEtherAddr) \
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{ \
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VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 1); \
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VNSvInPortB(dwIoBase + MAC_REG_PAR0, \
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(unsigned char *)pbyEtherAddr); \
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VNSvInPortB(dwIoBase + MAC_REG_PAR0 + 1, \
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pbyEtherAddr + 1); \
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VNSvInPortB(dwIoBase + MAC_REG_PAR0 + 2, \
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pbyEtherAddr + 2); \
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VNSvInPortB(dwIoBase + MAC_REG_PAR0 + 3, \
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pbyEtherAddr + 3); \
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VNSvInPortB(dwIoBase + MAC_REG_PAR0 + 4, \
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pbyEtherAddr + 4); \
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VNSvInPortB(dwIoBase + MAC_REG_PAR0 + 5, \
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pbyEtherAddr + 5); \
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VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 0); \
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}
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#define MACvReadEtherAddress(dwIoBase, pbyEtherAddr) \
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{ \
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VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 1); \
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VNSvInPortB(dwIoBase + MAC_REG_PAR0, \
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(unsigned char *)pbyEtherAddr); \
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VNSvInPortB(dwIoBase + MAC_REG_PAR0 + 1, \
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pbyEtherAddr + 1); \
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VNSvInPortB(dwIoBase + MAC_REG_PAR0 + 2, \
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pbyEtherAddr + 2); \
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VNSvInPortB(dwIoBase + MAC_REG_PAR0 + 3, \
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pbyEtherAddr + 3); \
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VNSvInPortB(dwIoBase + MAC_REG_PAR0 + 4, \
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pbyEtherAddr + 4); \
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VNSvInPortB(dwIoBase + MAC_REG_PAR0 + 5, \
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pbyEtherAddr + 5); \
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VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 0); \
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}
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#define MACvWriteEtherAddress(dwIoBase, pbyEtherAddr) \
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{ \
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VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 1); \
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VNSvOutPortB(dwIoBase + MAC_REG_PAR0, \
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*pbyEtherAddr); \
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VNSvOutPortB(dwIoBase + MAC_REG_PAR0 + 1, \
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*(pbyEtherAddr + 1)); \
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VNSvOutPortB(dwIoBase + MAC_REG_PAR0 + 2, \
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*(pbyEtherAddr + 2)); \
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VNSvOutPortB(dwIoBase + MAC_REG_PAR0 + 3, \
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*(pbyEtherAddr + 3)); \
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VNSvOutPortB(dwIoBase + MAC_REG_PAR0 + 4, \
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*(pbyEtherAddr + 4)); \
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VNSvOutPortB(dwIoBase + MAC_REG_PAR0 + 5, \
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*(pbyEtherAddr + 5)); \
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VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 0); \
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}
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#define MACvWriteEtherAddress(dwIoBase, pbyEtherAddr) \
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{ \
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VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 1); \
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VNSvOutPortB(dwIoBase + MAC_REG_PAR0, \
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*pbyEtherAddr); \
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VNSvOutPortB(dwIoBase + MAC_REG_PAR0 + 1, \
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*(pbyEtherAddr + 1)); \
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VNSvOutPortB(dwIoBase + MAC_REG_PAR0 + 2, \
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*(pbyEtherAddr + 2)); \
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VNSvOutPortB(dwIoBase + MAC_REG_PAR0 + 3, \
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*(pbyEtherAddr + 3)); \
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VNSvOutPortB(dwIoBase + MAC_REG_PAR0 + 4, \
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*(pbyEtherAddr + 4)); \
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VNSvOutPortB(dwIoBase + MAC_REG_PAR0 + 5, \
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*(pbyEtherAddr + 5)); \
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VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 0); \
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}
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#define MACvClearISR(dwIoBase) \
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{ \
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VNSvOutPortD(dwIoBase + MAC_REG_ISR, IMR_MASK_VALUE); \
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}
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#define MACvClearISR(dwIoBase) \
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{ \
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VNSvOutPortD(dwIoBase + MAC_REG_ISR, IMR_MASK_VALUE); \
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}
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#define MACvStart(dwIoBase) \
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{ \
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VNSvOutPortB(dwIoBase + MAC_REG_HOSTCR, \
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(HOSTCR_MACEN | HOSTCR_RXON | HOSTCR_TXON)); \
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}
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#define MACvStart(dwIoBase) \
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{ \
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VNSvOutPortB(dwIoBase + MAC_REG_HOSTCR, \
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(HOSTCR_MACEN | HOSTCR_RXON | HOSTCR_TXON)); \
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}
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#define MACvRx0PerPktMode(dwIoBase) \
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{ \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, RX_PERPKT); \
|
||||
}
|
||||
#define MACvRx0PerPktMode(dwIoBase) \
|
||||
{ \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, RX_PERPKT); \
|
||||
}
|
||||
|
||||
#define MACvRx0BufferFillMode(dwIoBase) \
|
||||
{ \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, RX_PERPKTCLR); \
|
||||
}
|
||||
#define MACvRx0BufferFillMode(dwIoBase) \
|
||||
{ \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, RX_PERPKTCLR); \
|
||||
}
|
||||
|
||||
#define MACvRx1PerPktMode(dwIoBase) \
|
||||
{ \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, RX_PERPKT); \
|
||||
}
|
||||
#define MACvRx1PerPktMode(dwIoBase) \
|
||||
{ \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, RX_PERPKT); \
|
||||
}
|
||||
|
||||
#define MACvRx1BufferFillMode(dwIoBase) \
|
||||
{ \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, RX_PERPKTCLR); \
|
||||
}
|
||||
#define MACvRx1BufferFillMode(dwIoBase) \
|
||||
{ \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, RX_PERPKTCLR); \
|
||||
}
|
||||
|
||||
#define MACvRxOn(dwIoBase) \
|
||||
{ \
|
||||
MACvRegBitsOn(dwIoBase, MAC_REG_HOSTCR, HOSTCR_RXON); \
|
||||
}
|
||||
#define MACvRxOn(dwIoBase) \
|
||||
{ \
|
||||
MACvRegBitsOn(dwIoBase, MAC_REG_HOSTCR, HOSTCR_RXON); \
|
||||
}
|
||||
|
||||
#define MACvReceive0(dwIoBase) \
|
||||
{ \
|
||||
unsigned long dwData; \
|
||||
VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL0, &dwData); \
|
||||
if (dwData & DMACTL_RUN) { \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_WAKE);\
|
||||
} \
|
||||
else { \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_RUN); \
|
||||
} \
|
||||
}
|
||||
#define MACvReceive0(dwIoBase) \
|
||||
{ \
|
||||
unsigned long dwData; \
|
||||
VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL0, &dwData); \
|
||||
if (dwData & DMACTL_RUN) { \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_WAKE); \
|
||||
} \
|
||||
else { \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_RUN); \
|
||||
} \
|
||||
}
|
||||
|
||||
#define MACvReceive1(dwIoBase) \
|
||||
{ \
|
||||
unsigned long dwData; \
|
||||
VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL1, &dwData); \
|
||||
if (dwData & DMACTL_RUN) { \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_WAKE);\
|
||||
} \
|
||||
else { \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_RUN); \
|
||||
} \
|
||||
}
|
||||
#define MACvReceive1(dwIoBase) \
|
||||
{ \
|
||||
unsigned long dwData; \
|
||||
VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL1, &dwData); \
|
||||
if (dwData & DMACTL_RUN) { \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_WAKE); \
|
||||
} \
|
||||
else { \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_RUN); \
|
||||
} \
|
||||
}
|
||||
|
||||
#define MACvTxOn(dwIoBase) \
|
||||
{ \
|
||||
MACvRegBitsOn(dwIoBase, MAC_REG_HOSTCR, HOSTCR_TXON); \
|
||||
}
|
||||
#define MACvTxOn(dwIoBase) \
|
||||
{ \
|
||||
MACvRegBitsOn(dwIoBase, MAC_REG_HOSTCR, HOSTCR_TXON); \
|
||||
}
|
||||
|
||||
#define MACvTransmit0(dwIoBase) \
|
||||
{ \
|
||||
unsigned long dwData; \
|
||||
VNSvInPortD(dwIoBase + MAC_REG_TXDMACTL0, &dwData); \
|
||||
if (dwData & DMACTL_RUN) { \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_WAKE);\
|
||||
} \
|
||||
else { \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_RUN); \
|
||||
} \
|
||||
}
|
||||
#define MACvTransmit0(dwIoBase) \
|
||||
{ \
|
||||
unsigned long dwData; \
|
||||
VNSvInPortD(dwIoBase + MAC_REG_TXDMACTL0, &dwData); \
|
||||
if (dwData & DMACTL_RUN) { \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_WAKE); \
|
||||
} \
|
||||
else { \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_RUN); \
|
||||
} \
|
||||
}
|
||||
|
||||
#define MACvTransmitAC0(dwIoBase) \
|
||||
{ \
|
||||
unsigned long dwData; \
|
||||
VNSvInPortD(dwIoBase + MAC_REG_AC0DMACTL, &dwData); \
|
||||
if (dwData & DMACTL_RUN) { \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_WAKE);\
|
||||
} \
|
||||
else { \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_RUN); \
|
||||
} \
|
||||
}
|
||||
#define MACvTransmitAC0(dwIoBase) \
|
||||
{ \
|
||||
unsigned long dwData; \
|
||||
VNSvInPortD(dwIoBase + MAC_REG_AC0DMACTL, &dwData); \
|
||||
if (dwData & DMACTL_RUN) { \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_WAKE); \
|
||||
} \
|
||||
else { \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_RUN); \
|
||||
} \
|
||||
}
|
||||
|
||||
#define MACvTransmitSYNC(dwIoBase) \
|
||||
{ \
|
||||
unsigned long dwData; \
|
||||
VNSvInPortD(dwIoBase + MAC_REG_SYNCDMACTL, &dwData); \
|
||||
if (dwData & DMACTL_RUN) { \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_SYNCDMACTL, DMACTL_WAKE);\
|
||||
} \
|
||||
else { \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_SYNCDMACTL, DMACTL_RUN); \
|
||||
} \
|
||||
}
|
||||
#define MACvTransmitSYNC(dwIoBase) \
|
||||
{ \
|
||||
unsigned long dwData; \
|
||||
VNSvInPortD(dwIoBase + MAC_REG_SYNCDMACTL, &dwData); \
|
||||
if (dwData & DMACTL_RUN) { \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_SYNCDMACTL, DMACTL_WAKE); \
|
||||
} \
|
||||
else { \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_SYNCDMACTL, DMACTL_RUN); \
|
||||
} \
|
||||
}
|
||||
|
||||
#define MACvTransmitATIM(dwIoBase) \
|
||||
{ \
|
||||
unsigned long dwData; \
|
||||
VNSvInPortD(dwIoBase + MAC_REG_ATIMDMACTL, &dwData); \
|
||||
if (dwData & DMACTL_RUN) { \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_ATIMDMACTL, DMACTL_WAKE);\
|
||||
} \
|
||||
else { \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_ATIMDMACTL, DMACTL_RUN); \
|
||||
} \
|
||||
}
|
||||
#define MACvTransmitATIM(dwIoBase) \
|
||||
{ \
|
||||
unsigned long dwData; \
|
||||
VNSvInPortD(dwIoBase + MAC_REG_ATIMDMACTL, &dwData); \
|
||||
if (dwData & DMACTL_RUN) { \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_ATIMDMACTL, DMACTL_WAKE); \
|
||||
} \
|
||||
else { \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_ATIMDMACTL, DMACTL_RUN); \
|
||||
} \
|
||||
}
|
||||
|
||||
#define MACvTransmitBCN(dwIoBase) \
|
||||
{ \
|
||||
VNSvOutPortB(dwIoBase + MAC_REG_BCNDMACTL, BEACON_READY); \
|
||||
}
|
||||
#define MACvTransmitBCN(dwIoBase) \
|
||||
{ \
|
||||
VNSvOutPortB(dwIoBase + MAC_REG_BCNDMACTL, BEACON_READY); \
|
||||
}
|
||||
|
||||
#define MACvClearStckDS(dwIoBase) \
|
||||
{ \
|
||||
unsigned char byOrgValue; \
|
||||
VNSvInPortB(dwIoBase + MAC_REG_STICKHW, &byOrgValue); \
|
||||
byOrgValue = byOrgValue & 0xFC; \
|
||||
VNSvOutPortB(dwIoBase + MAC_REG_STICKHW, byOrgValue); \
|
||||
}
|
||||
#define MACvClearStckDS(dwIoBase) \
|
||||
{ \
|
||||
unsigned char byOrgValue; \
|
||||
VNSvInPortB(dwIoBase + MAC_REG_STICKHW, &byOrgValue); \
|
||||
byOrgValue = byOrgValue & 0xFC; \
|
||||
VNSvOutPortB(dwIoBase + MAC_REG_STICKHW, byOrgValue); \
|
||||
}
|
||||
|
||||
#define MACvReadISR(dwIoBase, pdwValue) \
|
||||
{ \
|
||||
VNSvInPortD(dwIoBase + MAC_REG_ISR, pdwValue); \
|
||||
}
|
||||
#define MACvReadISR(dwIoBase, pdwValue) \
|
||||
{ \
|
||||
VNSvInPortD(dwIoBase + MAC_REG_ISR, pdwValue); \
|
||||
}
|
||||
|
||||
#define MACvWriteISR(dwIoBase, dwValue) \
|
||||
{ \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_ISR, dwValue); \
|
||||
}
|
||||
#define MACvWriteISR(dwIoBase, dwValue) \
|
||||
{ \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_ISR, dwValue); \
|
||||
}
|
||||
|
||||
#define MACvIntEnable(dwIoBase, dwMask) \
|
||||
{ \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_IMR, dwMask); \
|
||||
}
|
||||
#define MACvIntEnable(dwIoBase, dwMask) \
|
||||
{ \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_IMR, dwMask); \
|
||||
}
|
||||
|
||||
#define MACvIntDisable(dwIoBase) \
|
||||
{ \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_IMR, 0); \
|
||||
}
|
||||
#define MACvIntDisable(dwIoBase) \
|
||||
{ \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_IMR, 0); \
|
||||
}
|
||||
|
||||
#define MACvSelectPage0(dwIoBase) \
|
||||
{ \
|
||||
VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 0); \
|
||||
}
|
||||
#define MACvSelectPage1(dwIoBase) \
|
||||
{ \
|
||||
VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 1); \
|
||||
}
|
||||
#define MACvSelectPage0(dwIoBase) \
|
||||
{ \
|
||||
VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 0); \
|
||||
}
|
||||
#define MACvSelectPage1(dwIoBase) \
|
||||
{ \
|
||||
VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 1); \
|
||||
}
|
||||
|
||||
#define MACvReadMIBCounter(dwIoBase, pdwCounter) \
|
||||
{ \
|
||||
VNSvInPortD(dwIoBase + MAC_REG_MIBCNTR , pdwCounter); \
|
||||
}
|
||||
#define MACvReadMIBCounter(dwIoBase, pdwCounter) \
|
||||
{ \
|
||||
VNSvInPortD(dwIoBase + MAC_REG_MIBCNTR , pdwCounter); \
|
||||
}
|
||||
|
||||
#define MACvPwrEvntDisable(dwIoBase) \
|
||||
{ \
|
||||
VNSvOutPortW(dwIoBase + MAC_REG_WAKEUPEN0, 0x0000); \
|
||||
}
|
||||
#define MACvPwrEvntDisable(dwIoBase) \
|
||||
{ \
|
||||
VNSvOutPortW(dwIoBase + MAC_REG_WAKEUPEN0, 0x0000); \
|
||||
}
|
||||
|
||||
#define MACvEnableProtectMD(dwIoBase) \
|
||||
{ \
|
||||
unsigned long dwOrgValue; \
|
||||
VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue); \
|
||||
dwOrgValue = dwOrgValue | EnCFG_ProtectMd; \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_ENCFG, dwOrgValue); \
|
||||
}
|
||||
#define MACvEnableProtectMD(dwIoBase) \
|
||||
{ \
|
||||
unsigned long dwOrgValue; \
|
||||
VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue); \
|
||||
dwOrgValue = dwOrgValue | EnCFG_ProtectMd; \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_ENCFG, dwOrgValue); \
|
||||
}
|
||||
|
||||
#define MACvDisableProtectMD(dwIoBase) \
|
||||
{ \
|
||||
unsigned long dwOrgValue; \
|
||||
VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue); \
|
||||
dwOrgValue = dwOrgValue & ~EnCFG_ProtectMd; \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_ENCFG, dwOrgValue); \
|
||||
}
|
||||
#define MACvDisableProtectMD(dwIoBase) \
|
||||
{ \
|
||||
unsigned long dwOrgValue; \
|
||||
VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue); \
|
||||
dwOrgValue = dwOrgValue & ~EnCFG_ProtectMd; \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_ENCFG, dwOrgValue); \
|
||||
}
|
||||
|
||||
#define MACvEnableBarkerPreambleMd(dwIoBase) \
|
||||
{ \
|
||||
unsigned long dwOrgValue; \
|
||||
VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue); \
|
||||
dwOrgValue = dwOrgValue | EnCFG_BarkerPream; \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_ENCFG, dwOrgValue); \
|
||||
}
|
||||
#define MACvEnableBarkerPreambleMd(dwIoBase) \
|
||||
{ \
|
||||
unsigned long dwOrgValue; \
|
||||
VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue); \
|
||||
dwOrgValue = dwOrgValue | EnCFG_BarkerPream; \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_ENCFG, dwOrgValue); \
|
||||
}
|
||||
|
||||
#define MACvDisableBarkerPreambleMd(dwIoBase) \
|
||||
{ \
|
||||
unsigned long dwOrgValue; \
|
||||
VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue); \
|
||||
dwOrgValue = dwOrgValue & ~EnCFG_BarkerPream; \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_ENCFG, dwOrgValue); \
|
||||
}
|
||||
#define MACvDisableBarkerPreambleMd(dwIoBase) \
|
||||
{ \
|
||||
unsigned long dwOrgValue; \
|
||||
VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue); \
|
||||
dwOrgValue = dwOrgValue & ~EnCFG_BarkerPream; \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_ENCFG, dwOrgValue); \
|
||||
}
|
||||
|
||||
#define MACvSetBBType(dwIoBase, byTyp) \
|
||||
{ \
|
||||
unsigned long dwOrgValue; \
|
||||
VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue); \
|
||||
dwOrgValue = dwOrgValue & ~EnCFG_BBType_MASK; \
|
||||
dwOrgValue = dwOrgValue | (unsigned long) byTyp; \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_ENCFG, dwOrgValue); \
|
||||
}
|
||||
#define MACvSetBBType(dwIoBase, byTyp) \
|
||||
{ \
|
||||
unsigned long dwOrgValue; \
|
||||
VNSvInPortD(dwIoBase + MAC_REG_ENCFG , &dwOrgValue); \
|
||||
dwOrgValue = dwOrgValue & ~EnCFG_BBType_MASK; \
|
||||
dwOrgValue = dwOrgValue | (unsigned long) byTyp; \
|
||||
VNSvOutPortD(dwIoBase + MAC_REG_ENCFG, dwOrgValue); \
|
||||
}
|
||||
|
||||
#define MACvReadATIMW(dwIoBase, pwCounter) \
|
||||
{ \
|
||||
VNSvInPortW(dwIoBase + MAC_REG_AIDATIM , pwCounter); \
|
||||
}
|
||||
#define MACvReadATIMW(dwIoBase, pwCounter) \
|
||||
{ \
|
||||
VNSvInPortW(dwIoBase + MAC_REG_AIDATIM , pwCounter); \
|
||||
}
|
||||
|
||||
#define MACvWriteATIMW(dwIoBase, wCounter) \
|
||||
{ \
|
||||
VNSvOutPortW(dwIoBase + MAC_REG_AIDATIM , wCounter); \
|
||||
}
|
||||
#define MACvWriteATIMW(dwIoBase, wCounter) \
|
||||
{ \
|
||||
VNSvOutPortW(dwIoBase + MAC_REG_AIDATIM , wCounter); \
|
||||
}
|
||||
|
||||
#define MACvWriteCRC16_128(dwIoBase, byRegOfs, wCRC) \
|
||||
{ \
|
||||
VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 1); \
|
||||
VNSvOutPortW(dwIoBase + byRegOfs, wCRC); \
|
||||
VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 0); \
|
||||
}
|
||||
#define MACvWriteCRC16_128(dwIoBase, byRegOfs, wCRC) \
|
||||
{ \
|
||||
VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 1); \
|
||||
VNSvOutPortW(dwIoBase + byRegOfs, wCRC); \
|
||||
VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 0); \
|
||||
}
|
||||
|
||||
#define MACvGPIOIn(dwIoBase, pbyValue) \
|
||||
{ \
|
||||
VNSvInPortB(dwIoBase + MAC_REG_GPIOCTL1, pbyValue); \
|
||||
}
|
||||
#define MACvGPIOIn(dwIoBase, pbyValue) \
|
||||
{ \
|
||||
VNSvInPortB(dwIoBase + MAC_REG_GPIOCTL1, pbyValue); \
|
||||
}
|
||||
|
||||
#define MACvSetRFLE_LatchBase(dwIoBase) \
|
||||
{ \
|
||||
MACvWordRegBitsOn(dwIoBase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_RFLEOPT); \
|
||||
}
|
||||
{ \
|
||||
MACvWordRegBitsOn(dwIoBase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_RFLEOPT); \
|
||||
}
|
||||
|
||||
/*--------------------- Export Classes ----------------------------*/
|
||||
|
||||
|
@ -1107,7 +1107,7 @@ void MACvOneShotTimer1MicroSec(unsigned long dwIoBase, unsigned int uDelayTime);
|
|||
|
||||
void MACvSetMISCFifo(unsigned long dwIoBase, unsigned short wOffset, unsigned long dwData);
|
||||
|
||||
bool MACbTxDMAOff (unsigned long dwIoBase, unsigned int idx);
|
||||
bool MACbTxDMAOff(unsigned long dwIoBase, unsigned int idx);
|
||||
|
||||
void MACvClearBusSusInd(unsigned long dwIoBase);
|
||||
void MACvEnableBusSusEn(unsigned long dwIoBase);
|
||||
|
@ -1116,14 +1116,14 @@ bool MACbFlushSYNCFifo(unsigned long dwIoBase);
|
|||
bool MACbPSWakeup(unsigned long dwIoBase);
|
||||
|
||||
void MACvSetKeyEntry(unsigned long dwIoBase, unsigned short wKeyCtl, unsigned int uEntryIdx,
|
||||
unsigned int uKeyIdx, unsigned char *pbyAddr, unsigned long *pdwKey, unsigned char byLocalID);
|
||||
unsigned int uKeyIdx, unsigned char *pbyAddr, unsigned long *pdwKey, unsigned char byLocalID);
|
||||
void MACvDisableKeyEntry(unsigned long dwIoBase, unsigned int uEntryIdx);
|
||||
void MACvSetDefaultKeyEntry(unsigned long dwIoBase, unsigned int uKeyLen,
|
||||
unsigned int uKeyIdx, unsigned long *pdwKey, unsigned char byLocalID);
|
||||
unsigned int uKeyIdx, unsigned long *pdwKey, unsigned char byLocalID);
|
||||
//void MACvEnableDefaultKey(unsigned long dwIoBase, unsigned char byLocalID);
|
||||
void MACvDisableDefaultKey(unsigned long dwIoBase);
|
||||
void MACvSetDefaultTKIPKeyEntry(unsigned long dwIoBase, unsigned int uKeyLen,
|
||||
unsigned int uKeyIdx, unsigned long *pdwKey, unsigned char byLocalID);
|
||||
unsigned int uKeyIdx, unsigned long *pdwKey, unsigned char byLocalID);
|
||||
void MACvSetDefaultKeyCtl(unsigned long dwIoBase, unsigned short wKeyCtl, unsigned int uEntryIdx, unsigned char byLocalID);
|
||||
|
||||
#endif // __MAC_H__
|
||||
|
|
Loading…
Reference in New Issue