media: hantro: add support for separate control block
On i.MX8MQ/MM a separate control block contains registers for per-core resets, clock gating, and fuse register control. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
This commit is contained in:
parent
f855fc2c0d
commit
c330d37113
|
@ -167,6 +167,7 @@ hantro_vdev_to_func(struct video_device *vdev)
|
|||
* @reg_bases: Mapped addresses of VPU registers.
|
||||
* @enc_base: Mapped address of VPU encoder register for convenience.
|
||||
* @dec_base: Mapped address of VPU decoder register for convenience.
|
||||
* @ctrl_base: Mapped address of VPU control block.
|
||||
* @vpu_mutex: Mutex to synchronize V4L2 calls.
|
||||
* @irqlock: Spinlock to synchronize access to data structures
|
||||
* shared with interrupt handlers.
|
||||
|
@ -185,6 +186,7 @@ struct hantro_dev {
|
|||
void __iomem **reg_bases;
|
||||
void __iomem *enc_base;
|
||||
void __iomem *dec_base;
|
||||
void __iomem *ctrl_base;
|
||||
|
||||
struct mutex vpu_mutex; /* video_device lock */
|
||||
spinlock_t irqlock;
|
||||
|
|
Loading…
Reference in New Issue