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mailbox: qcom: Add support for SDX55 APCS IPC 

In SDX55, the IPC bits are located in the APCS GCC block. Also, this block
can provide clock functionality. Hence, add support for IPC with correct
offset and name of the clock provider.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
This commit is contained in:
Manivannan Sadhasivam 2021-01-18 09:41:53 +05:30 committed by Jassi Brar
parent 0d17014e91
commit c319f78cba
1 changed files with 6 additions and 1 deletions
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7
drivers/mailbox/qcom-apcs-ipc-mailbox.c
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@ -61,11 +61,15 @@ static const struct qcom_apcs_ipc_data apps_shared_apcs_data = {
.offset = 12, .clk_name = NULL
};
static const struct qcom_apcs_ipc_data sdx55_apcs_data = {
.offset = 0x1008, .clk_name = "qcom-sdx55-acps-clk"
};
static const struct regmap_config apcs_regmap_config = {
.reg_bits = 32,
.reg_stride = 4,
.val_bits = 32,
.max_register = 0xFFC,
.max_register = 0x1008,
.fast_io = true,
};
@ -163,6 +167,7 @@ static const struct of_device_id qcom_apcs_ipc_of_match[] = {
{ .compatible = "qcom,sdm660-apcs-hmss-global", .data = &sdm660_apcs_data },
{ .compatible = "qcom,sdm845-apss-shared", .data = &apps_shared_apcs_data },
{ .compatible = "qcom,sm8150-apss-shared", .data = &apps_shared_apcs_data },
{ .compatible = "qcom,sdx55-apcs-gcc", .data = &sdx55_apcs_data },
{}
};
MODULE_DEVICE_TABLE(of, qcom_apcs_ipc_of_match);