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drm/amd/display: TPS4 logic typo fix 

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Charlene Liu 2017-03-03 15:16:03 -05:00 committed by Alex Deucher
parent 5ac3d3c9b7
commit c30267f502
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
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@ -921,8 +921,8 @@ static inline bool perform_link_training_int(
* If the upstream DPTX and downstream DPRX both support TPS4,
* TPS4 must be used instead of POST_LT_ADJ_REQ.
*/
if (link->dpcd_caps.max_ln_count.bits.POST_LT_ADJ_REQ_SUPPORTED != 1 &&
get_supported_tp(link) == HW_DP_TRAINING_PATTERN_4)
if (link->dpcd_caps.max_ln_count.bits.POST_LT_ADJ_REQ_SUPPORTED != 1 ||
get_supported_tp(link) == HW_DP_TRAINING_PATTERN_4)
return status;
if (status &&