[BNX2]: Add delay before reading firmware version.
The management firmware may still be loading during bnx2_init_one() because of the D3hot -> D0 transition and the firmware version may not be available without waiting a bit. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -4143,10 +4143,6 @@ bnx2_init_chip(struct bnx2 *bp)
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REG_WR(bp, BNX2_HC_ATTN_BITS_ENABLE, STATUS_ATTN_EVENTS);
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if (REG_RD_IND(bp, bp->shmem_base + BNX2_PORT_FEATURE) &
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BNX2_PORT_FEATURE_ASF_ENABLED)
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bp->flags |= ASF_ENABLE_FLAG;
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/* Initialize the receive filter. */
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bnx2_set_rx_mode(bp->dev);
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@ -6645,6 +6641,18 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
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if (i != 2)
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bp->fw_version[j++] = '.';
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}
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if (REG_RD_IND(bp, bp->shmem_base + BNX2_PORT_FEATURE) &
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BNX2_PORT_FEATURE_ASF_ENABLED) {
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bp->flags |= ASF_ENABLE_FLAG;
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for (i = 0; i < 30; i++) {
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reg = REG_RD_IND(bp, bp->shmem_base +
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BNX2_BC_STATE_CONDITION);
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if (reg & BNX2_CONDITION_MFW_RUN_MASK)
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break;
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msleep(10);
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}
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}
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reg = REG_RD_IND(bp, bp->shmem_base + BNX2_BC_STATE_CONDITION);
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reg &= BNX2_CONDITION_MFW_RUN_MASK;
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if (reg != BNX2_CONDITION_MFW_RUN_UNKNOWN &&
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