riscv: introduce nops and __nops macros for NOP sequences
NOP sequences tend to get used for padding out alternative sections
This change adds macros for generating these sequences as both inline
asm blocks, but also as strings suitable for embedding in other asm
blocks directly.
It essentially mimics similar functionality from arm64 introduced by
Wil Deacon in commit f99a250cb6
("arm64: barriers: introduce nops
and __nops macros for NOP sequences").
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20220607143059.1054074-2-heiko@sntech.de
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
This commit is contained in:
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@ -67,4 +67,19 @@
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#error "Unexpected __SIZEOF_SHORT__"
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#error "Unexpected __SIZEOF_SHORT__"
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#endif
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#endif
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#ifdef __ASSEMBLY__
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/* Common assembly source macros */
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/*
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* NOP sequence
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*/
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.macro nops, num
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.rept \num
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nop
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.endr
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.endm
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#endif /* __ASSEMBLY__ */
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#endif /* _ASM_RISCV_ASM_H */
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#endif /* _ASM_RISCV_ASM_H */
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@ -13,6 +13,8 @@
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#ifndef __ASSEMBLY__
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#ifndef __ASSEMBLY__
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#define nop() __asm__ __volatile__ ("nop")
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#define nop() __asm__ __volatile__ ("nop")
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#define __nops(n) ".rept " #n "\nnop\n.endr\n"
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#define nops(n) __asm__ __volatile__ (__nops(n))
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#define RISCV_FENCE(p, s) \
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#define RISCV_FENCE(p, s) \
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__asm__ __volatile__ ("fence " #p "," #s : : : "memory")
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__asm__ __volatile__ ("fence " #p "," #s : : : "memory")
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